JPS6059746A - Aligning method of coordinate system in prober - Google Patents
Aligning method of coordinate system in proberInfo
- Publication number
- JPS6059746A JPS6059746A JP58169034A JP16903483A JPS6059746A JP S6059746 A JPS6059746 A JP S6059746A JP 58169034 A JP58169034 A JP 58169034A JP 16903483 A JP16903483 A JP 16903483A JP S6059746 A JPS6059746 A JP S6059746A
- Authority
- JP
- Japan
- Prior art keywords
- probe
- prober
- coordinate system
- coordinates system
- measured
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はプローバーにおいて、プローブカードと、集積
回路用基板との両座標系を整合させる方法に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for aligning the coordinate systems of a probe card and an integrated circuit board in a prober.
共通の基板、例えばシリコンウェーハー、セラミクク基
板、プリント板等上に複数の集積回路が規則的に形成さ
れている被試験物を電気的に試験する場合、複数の探針
を有するプローブカードχ用いるプローバーが一般的に
使用されてい乙。When electrically testing a test object in which multiple integrated circuits are regularly formed on a common substrate, such as a silicon wafer, ceramic substrate, printed board, etc., a prober that uses a probe card χ having multiple probes is used. is commonly used.
通常、プローバーは被測定物とプローブカードとを相対
的に移動させ、被試験物中の任意の集積回路（以下これ
を被測定素子と称する）を選択し、選択された集積回路
の電極とプローブカードの探針とを接触させることによ
って集積回路を電気的に試験を行なうものである。Normally, a prober moves the object under test and a probe card relatively, selects an arbitrary integrated circuit (hereinafter referred to as an element under test) in the object under test, and connects the electrodes of the selected integrated circuit with the probe. The integrated circuit is electrically tested by bringing it into contact with the probe of the card.
第１図及び第２図は従来のプローバーにおける座標系の
説明図である。FIGS. 1 and 2 are explanatory diagrams of a coordinate system in a conventional prober.
第１図において、共通の基板上に隣接して複数形成され
ている被測定素子１，１・・上の複数の電極２．２・・
・と、図示しないプローブカードにと９つけられている
複数の探針３，３・ とが良好な電気的接続を得るため
には、少なくとも電極２の座標系Ｘ３Ｙ３と探針３の座
標系Ｘ２Ｙ２とが平行である必要がある。従来のプロー
バーでは被測定素子１（基板）はプローバーの座標系ｘ
、 ｙ、を基準として移動させられる構造となっている
。ところが、プローブカードは被測定素子１の品種等が
変わった場合等に交換する必要があるが、プローブカー
ド自身の製造誤差及びグローブカードをプローバーにダ
着する場合の取付は誤差等により第２図のように、プロ
ーバの座標系Ｘ、Ｙ工と探針３の座標系Ｘ２Ｙ２とは平
行な関係にはならないことが多い。この場合でもプロー
バーは被測定素子１の電極２の座標系Ｘ３Ｙ３を検出し
、プローバーの座標系Ｘ、 Ｙ、と平行な関係となるよ
う制御するため、探剥３と電極２との位置関係は不適切
なものとなり、単なるＸＹ移動のみでは正しい位置関係
に補正できない。このだめ従来のプローバーではプロー
ブカー ドの交換ごとにあらかじめ人手により探針３の
座標系Ｘ２Ｙ２をプローバーの座標ＸＩＹ工と平行関係
に合せ込む作業が必要であり、自動化をはかるうえで障
害となってい ／こ 。In FIG. 1, a plurality of electrodes 2, 2, . . . on devices to be measured 1, 1, . . . are formed adjacently on a common substrate.
In order to obtain a good electrical connection between the probes 3, 3 and 9 attached to a probe card (not shown), at least the coordinate system X3Y3 of the electrode 2 and the coordinate system X2Y2 of the probe 3 must be established. must be parallel. In a conventional prober, the device to be measured 1 (substrate) is in the coordinate system x of the prober.
, y, is the reference point. However, the probe card needs to be replaced when the type of the device under test 1 changes, etc., but due to manufacturing errors in the probe card itself and installation errors when attaching the globe card to the prober, as shown in Figure 2. As shown in the figure, the coordinate system X, Y of the prober and the coordinate system X2Y2 of the probe 3 are often not in a parallel relationship. Even in this case, the prober detects the coordinate system X3Y3 of the electrode 2 of the device to be measured 1 and controls it so that it is parallel to the coordinate system X, Y of the prober, so the positional relationship between the probe 3 and the electrode 2 is This becomes inappropriate and cannot be corrected to the correct positional relationship by mere XY movement. Unfortunately, with conventional probers, it is necessary to manually align the probe 3's coordinate system X2Y2 with the probe's coordinate system XIY in parallel each time the probe card is replaced, which is an obstacle to automation. /child .
本発明は前記問題点を解消するもので、共通の基板上に
形成された複数の集積回路のうち少なくとも１つを選択
し、該選択された集積回路上の複数の電極にグローブカ
ードの複数の探針を電気的に接続するプローバーにおい
て、前記プローブカードを定置させ、そのＸＹ座漂方向
を基準としｉ″ｌＩＪ記基板を相対的に移動させてプロ
ーブカードの探針の座標系に集積回路の電極の座標系を
整合させることを特徴とするプローバーにおける座標系
の整合方法である。The present invention solves the above problems by selecting at least one of a plurality of integrated circuits formed on a common substrate, and connecting a plurality of electrodes on the selected integrated circuit to a plurality of electrodes of a glove card. In a prober that electrically connects the probe, the probe card is fixed, and the integrated circuit is moved in the coordinate system of the probe of the probe card by relatively moving the i''lIJ board based on the XY drifting direction. This is a method for matching coordinate systems in a prober, characterized by matching coordinate systems of electrodes.
以下に本発明の一実施例を図により説明する。An embodiment of the present invention will be described below with reference to the drawings.
第３図は本発明によるプローバーの座標系を説明した図
である。第３図において、プローバーはプローブカード
の探針３の座標系Ｘ３Ｙ３を検出し、これに対して被測
定素子１の電極２の座標系Ｘ２Ｙ２が平行な関係になる
ように、被測定素子１（基板）を制御する。つ′まり、
第３図のように探針３の座標系Ｘ２Ｙ２がプローバーの
座標系Ｘ１ＹＩと平行関係にない場合、本発明は従来の
ようにプローブカードを回転させて探針３の座標系Ｘ２
Ｙ２をプローバーの座標系Ｘ、 Ｙ、と平行にするので
はなく、プローブカードを定置させ、そのＸＹ座標方向
を基準とし被測定素子１（基板）を回転させ電極２の座
標系Ｘ３Ｙ３を探針３の座標系Ｘ２Ｙ２と平行にし、次
いで被測定素子１を探針３の座標系Ｘ２Ｙ２上で移動さ
せることにより探針３と電極２との位置を一致させ、電
気的接触を得る。この後、他の被ｄＩす定素子１を測定
する場合は、単に探針３の座標系Ｘ２Ｙ２上で基板を平
行移動させ、新たな被測定素子１を選択しその電極２に
グローブカードの探６・１３を電気的に接触させて行な
う。FIG. 3 is a diagram explaining the coordinate system of the prober according to the present invention. In FIG. 3, the prober detects the coordinate system X3Y3 of the probe 3 of the probe card, and the device under test 1 ( control the board). In other words,
When the coordinate system X2Y2 of the probe 3 is not parallel to the coordinate system X1YI of the prober as shown in FIG.
Instead of making Y2 parallel to the coordinate system X, Y, of the prober, the probe card is fixed, and the device to be measured 1 (substrate) is rotated using the XY coordinate direction as a reference, and the coordinate system X3Y3 of electrode 2 is set as the probe. 3, and then move the device to be measured 1 on the coordinate system X2Y2 of the probe 3 to align the probe 3 and the electrode 2 and establish electrical contact. After this, when measuring another dI constant element 1, simply move the substrate in parallel on the coordinate system 6.13 are electrically connected.
とのように本発明によれば、プローブカードの探夕１の
座狩；系に直接集積回路の電極の座標系を整合させるた
め、従来人手により行なっていだ探針の座標系Ｘ２ Ｙ
２とプローバーの座標系Ｘ、 Ｙ、とをあわせこむ作業
が不要になり、自動化を推進して作業の効率を向上でき
、さらにプローブカードひいてはそノア、に接続されて
いる測定系をプローバーに対して水平面上で回転させる
機構も不侠となるため、プローバーの構造を簡素化する
ことができるという効果を有するものである。According to the present invention, in order to align the coordinate system of the electrodes of the integrated circuit directly with the coordinate system of the probe 1 of the probe card, the probe coordinate system X2 Y, which was conventionally performed manually, is
This eliminates the need to align the X and Y coordinate systems of the probe card and the prober, promoting automation and improving work efficiency. Since the mechanism for rotating the prober on a horizontal plane is also cumbersome, this has the effect that the structure of the prober can be simplified.
なお、実施例では各々１０個の電極を有する被測定素子
が物理的にＸＹ方向に連続しているものを１０本の探針
で測定するものとして説明したが、電極、探針の数は任
意でよいし、例えば２０本の探針で２個の被測定素子を
同時に測定する場合についでも適用できることはいう寸
でもない。又、必ずしも被測定素子同士が接近して密に
設けられている必要はなく、要は被測定素子が同一の座
標系上に規則的に配置されていればよいものである。In addition, in the example, the device to be measured, each having 10 electrodes, was explained as being physically continuous in the X and Y directions and was measured using 10 probes, but the number of electrodes and probes is arbitrary. However, it cannot be said that it can be applied even when two devices to be measured are measured simultaneously using, for example, 20 probes. Furthermore, the elements to be measured do not necessarily have to be closely arranged close to each other, as long as the elements to be measured are regularly arranged on the same coordinate system.
第１図及び第２図は従来のプローバーにおける座標系の
説明図、第３図は本発明のプローバーにおける座標系の
説明図である。
図において、１は共通の基板上に複数個形成されでいる
被測定素子、２は電極、３は探針であシ、Ｘ１Ｙ、はプ
ローバーの座標系、Ｘ２Ｙ２は探針の座標系、Ｘ３Ｙ３
は電極の座標系である。
將許出願人 日本電気株式会社
代理人 弁理士 菅 野 中 ）
第１図
第２図1 and 2 are explanatory diagrams of a coordinate system in a conventional prober, and FIG. 3 is an explanatory diagram of a coordinate system in a prober of the present invention. In the figure, 1 is a plurality of devices to be measured formed on a common substrate, 2 is an electrode, 3 is a probe, X1Y is the coordinate system of the prober, X2Y2 is the coordinate system of the probe, X3Y3
is the coordinate system of the electrode. Applicant NEC Corporation Patent attorney Naka Kanno) Figure 1 Figure 2
Claims (1)
のうち少なくとも１つを選択し、該選択された集積回路
上の複数の電極にプローブカードの複数の探針を電気的
に接続するプローバーにおいて、前記プローブカードを
定置させ、そのＸ ’Ｙ座標方向を基準とし前記基板を
相対的に移動させてグローブカードの探針の座標系に集
積回路の電極の座標系を整合させることを特徴とするプ
ローバーにおける座標系の整合方法。(1) Select at least one of the integrated circuits formed on a common substrate, and electrically connect the probes of the probe card to the electrodes on the selected integrated circuit. In the prober, the probe card is placed in a fixed position, and the substrate is relatively moved with respect to the X'Y coordinate direction of the probe card to align the coordinate system of the electrodes of the integrated circuit with the coordinate system of the probe of the glove card. Coordinate system matching method in the featured prober.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58169034A JPS6059746A (en) | 1983-09-13 | 1983-09-13 | Aligning method of coordinate system in prober |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58169034A JPS6059746A (en) | 1983-09-13 | 1983-09-13 | Aligning method of coordinate system in prober |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6059746A true JPS6059746A (en) | 1985-04-06 |
Family
ID=15879090
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58169034A Pending JPS6059746A (en) | 1983-09-13 | 1983-09-13 | Aligning method of coordinate system in prober |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6059746A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4966520A (en) * | 1988-11-02 | 1990-10-30 | Tokyo Electron Limited | Method of positioning objects to be measured |
| CN110187259A (en) * | 2019-06-10 | 2019-08-30 | 德淮半导体有限公司 | A kind of adjustment system and method for adjustment preventing probe mark shift in wafer test |
| CN114019343A (en) * | 2021-09-16 | 2022-02-08 | 中国船舶重工集团公司第七0九研究所 | Calibration adapter plate positioning device of large-scale integrated circuit test system |
-
1983
- 1983-09-13 JP JP58169034A patent/JPS6059746A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4966520A (en) * | 1988-11-02 | 1990-10-30 | Tokyo Electron Limited | Method of positioning objects to be measured |
| CN110187259A (en) * | 2019-06-10 | 2019-08-30 | 德淮半导体有限公司 | A kind of adjustment system and method for adjustment preventing probe mark shift in wafer test |
| CN114019343A (en) * | 2021-09-16 | 2022-02-08 | 中国船舶重工集团公司第七0九研究所 | Calibration adapter plate positioning device of large-scale integrated circuit test system |
| CN114019343B (en) * | 2021-09-16 | 2024-05-14 | 中国船舶重工集团公司第七0九研究所 | Calibration adapter plate positioning device of large-scale integrated circuit test system |
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