JPS6039869A - Structure of semiconductor superlattice - Google Patents

Structure of semiconductor superlattice

Info

Publication number
JPS6039869A
JPS6039869A JP58146703A JP14670383A JPS6039869A JP S6039869 A JPS6039869 A JP S6039869A JP 58146703 A JP58146703 A JP 58146703A JP 14670383 A JP14670383 A JP 14670383A JP S6039869 A JPS6039869 A JP S6039869A
Authority
JP
Japan
Prior art keywords
layer
doped
algaas
layers
gaas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58146703A
Other languages
Japanese (ja)
Other versions
JPH0121631B2 (en
Inventor
Shunichi Muto
俊一 武藤
Tomonori Ishikawa
石川 知則
Kazuhiro Kondo
和博 近藤
Masahiko Sasa
佐々 誠彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
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Agency of Industrial Science and Technology
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Priority to JP58146703A priority Critical patent/JPS6039869A/en
Publication of JPS6039869A publication Critical patent/JPS6039869A/en
Publication of JPH0121631B2 publication Critical patent/JPH0121631B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • H01L29/151Compositional structures
    • H01L29/152Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
    • H01L29/155Comprising only semiconductor materials

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To improve conductivity in the lateral direction by laminating first GaAs layers and AlGaAs layers, second AlGaAs layers to which a doner impurity is doped, third AlGaAs layers, second GaAs layers and fourth AlGaAs layers having specific thickness at plural periods. CONSTITUTION:In modulated doped AlGaAs/GaAs superlattice structure, a non- doped GaAs layer 11, a non-doped AlGaAs spacer layer 12, an N type AlGaAs electron supply layer 13 to which a doner impurity is doped, a non-doped AlGaAs spacer layer 14, a non-doped GaAs layer 15 and a non-doped AlGaAs barrier layer 16 are laminated in succession, and the period is repeated. A two- element electron gas 17 is formed near the interface with the AlGaAs spacer layer 12 of the non-doped GaAs layer 11 and a two-element electron gas 18 near the interface with the AlGaAs spacer layer 14 of the non-doped GaAs layer 15. The thickness of the AlGaAs barrier layer 16 is brought to 5nm of less in order to restrict thickness per one period.

Description

【発明の詳細な説明】 (,1発明の技術分野 本発明は半導体超格子構造1%にヘテロ接合界面に平行
な方向に大きい導電率を有する変調ドープ砒化アルミニ
ウム・ガリウム/砒化ガリウム系半導体超格子構造に関
する。
Detailed Description of the Invention (1) Technical Field of the Invention The present invention relates to a modulated doped aluminum gallium arsenide/gallium arsenide based semiconductor superlattice having a semiconductor superlattice structure of 1% and a large electrical conductivity in the direction parallel to the heterojunction interface. Regarding structure.

(1)) 技術の背景 社会の情報化か急速に進展しつつあるが1次世代への飛
躍を考えるときその基礎となるべきエレクトロニクス技
術には幾つかの限界が予測きれる。
(1)) Background of technology Information society is rapidly progressing, but when we think about making the leap to the next generation, we can foresee some limitations in the electronics technology that will form the basis of it.

すなわち基本とな・、)デバイス(素子)の動作速度集
積密度或いは波長帯域等には材料物性によ/】限界があ
り、このデバイスの限界によってシステム、の進展が制
約されることとなる、。
In other words, there is a fundamental limit to the operating speed, integration density, wavelength band, etc. of a device (element) depending on the physical properties of the material, and this device limit will restrict the progress of the system.

この材料物性に基づく限界を打破する可能性が人工的に
創造される超格子結晶構造に期待されている。すなわち
異なる材料よりなる単原子層乃至数10w、子層程度の
層を周期的に成長させた超格子構造に訃いては1通常の
結晶で(−1ポテンシヤル場の周期がその格子定数で定
まるのに対して、前記周期で定“まるこれより太きい周
期が形成されて電子の負質量すなわち負性抵抗が観測さ
れるなど新しい可能性がうかがわれる・この様な可能性
を有する超格子構造によって新機能素子1例えf−i新
型超高速トランジス〃、高感度かつ高効率の可視光紗、
紫外線、X線の変換素子、或いは光双安定論理素子など
が実現されることとなろう、(c)従来技術と問題点 超格子構造によって先に述べた如く9通常の固体内にお
ける原子間隔より大きい周期で2次元的な周期ボテンシ
ャルを形成することかできるが。
Artificially created superlattice crystal structures are expected to have the potential to overcome these limitations based on material properties. In other words, in a superlattice structure in which monoatomic layers to several tens of nanometers of sublayers made of different materials are grown periodically, in a normal crystal (-1 the period of the potential field is determined by its lattice constant). On the other hand, a new possibility is suggested, such as the formation of a wider period determined by the above period and the observation of negative mass of electrons, that is, negative resistance.A superlattice structure with such a possibility. One new functional element is the fi-i new type of ultra-high-speed transistor, a highly sensitive and highly efficient visible light gauze,
Ultraviolet and X-ray conversion elements, optical bistable logic elements, etc. will be realized. (c) Prior art and problems As mentioned above, the superlattice structure will reduce the atomic spacing in a normal solid. However, it is possible to form a two-dimensional periodic botential with a large period.

この2次・元的なポテンシャルによつ−C2次元状態の
電子すなわち2次元電子ガスを実現することができる、 従来の通常の半導体デバイスで1キヤリアはドナーやア
クセプタ不純物が添加され、したがってそれらの不純物
が存在している領域内を移動する1、移動に際してキャ
リアは格子振動および不純物イオンによって散乱を受け
るが、格子振で11による散乱の確率を小さくしてキャ
リアの移動度を大きくするためIC低温にすると、不純
物イオンによるクーロン散乱の確率が大きくなつ1キヤ
リアの移動度は期待するように大きくはならない。
Due to this two-dimensional/dimensional potential, electrons in the -C two-dimensional state, that is, two-dimensional electron gas, can be realized. When carriers move in a region where impurities exist, they are scattered by lattice vibrations and impurity ions, but in order to reduce the probability of scattering by 11 due to lattice vibrations and increase carrier mobility, IC low temperature is used. When this happens, the probability of Coulomb scattering due to impurity ions increases, and the mobility of one carrier does not become as large as expected.

不純物イオンは所要の多数キャリアを得るために必要で
あるがキャリアが移動する領域と同じ領域に加える必要
はなく、不純物が添加される領域とキャリアが移動する
領域とを空間的に分離すれば、不純物散乱効果を抑制し
てキャリアの移動度を大きくすることができる。
Although impurity ions are necessary to obtain the required majority carriers, they do not need to be added to the same region where the carriers move; if the region where the impurity is added and the region where the carriers move are spatially separated, The carrier mobility can be increased by suppressing the impurity scattering effect.

前記2次元電rガスはこの不純物から空間的に分離され
たギヤリアであり、これを実現す、ルン代費的構造(4
1次のとおりである。すなわち、ノンドーグの砒化ガリ
ウノ、(CJhΔe)層上に、ドナー不純物としてシリ
コノ(Sl)を添加した砒化アルミニラ11ガリウム(
At1aAθ)WIを成長させると。
The two-dimensional electric gas is a gear which is spatially separated from this impurity, and a structure similar to that of a run (4) is used to realize this.
The first order is as follows. That is, on a non-doped gallium arsenide (CJhΔe) layer, a layer of aluminum 11 gallium arsenide (CJhΔe) doped with silicon (Sl) as a donor impurity was formed.
When At1aAθ)WI is grown.

AtGaΔρ層内の【71から供給された電子は禁制帯
幅が小さく電子に対するボテンシャルエネルギーが小さ
い(]aA11層側に煮Gして、ヘモロ接合界面近傍V
r、2次元電子ガスが形成される この梯なS1選択ド
ープΔt(IaAs/QnAeシングルへ7−ロ構造結
晶では、既に例えば温度77(K)において2次元電子
ガス移動度/’n=11.7,000(cJ/V、+(
)程度の値がイυられでいる、 上記のS1選択ドープΔ/、On/1.S/i、la、
Arシングルへテロ構造を積層して超格子構造を形成す
るならは、へテロ接合界面に平行な方向(以下横方向と
略称する)について高電子移動度、従って高導電率の半
導体基体が得られるものと期待される。
Electrons supplied from [71 in the AtGaΔρ layer have a small forbidden band width and low potential energy for electrons (]aA11 layer side, and V near the hemojunction interface.
r, a two-dimensional electron gas is formed.In this stepped S1 selective doping Δt (IaAs/QnAe single to seven-ro structure crystal, the two-dimensional electron gas mobility/'n=11. 7,000 (cJ/V, +(
) of the above S1 selective doping Δ/, On/1. S/i, la,
If a superlattice structure is formed by stacking Ar single heterostructures, a semiconductor substrate with high electron mobility in the direction parallel to the heterojunction interface (hereinafter referred to as lateral direction) and therefore high conductivity can be obtained. It is expected that

第1図はこの目的で形成された変調ドーグn −A t
 o a As /e e、 AE+超格子構造の伝導
帯のコーネルギーバンド図である。図に示す如く本従来
例の超格(、−” )程[Kドーグしたn型A !0.
3 (l a 0.7 hsbi 1:電子供給層3.
ノンドーグのA l 0.3 (J a、 0.7ΔG
スペーサ層40組合わせを1周期として構成されて、2
次元電子ガス7及Q・8が形成されている。なおエピタ
キシャル結晶成長は図中矢印で示す如く、スペーサ層2
→電子供給層3◆スペーサ層4の方向に行なわれている
・ 前記の超格子構造1(おいてね二、その1周期内ヲC2
層の2次元電子カス7及υ・8が形成される。第1の2
次元電子ガス7は先に成長さ−d/cノンドープGaA
o層1上にAA(]aAf1層2及び3を成長したヘテ
ロ接合界面に形成され、第2の2次元電子ガス8は先)
C成長さ・毬7’(A4GaAe層3及び4上にGaA
θ層1を成長したヘテlff接合界面に形成されている
FIG. 1 shows a modulated dog n −A t formed for this purpose.
o a As /e e, is a Corergie band diagram of the conduction band of the AE+ superlattice structure. As shown in the figure, the super case (,-") of this conventional example [K-dawg n-type A!0.
3 (l a 0.7 hsbi 1: electron supply layer 3.
Nondawg A l 0.3 (J a, 0.7ΔG
40 combinations of spacer layers constitute one period,
Dimensional electron gases 7 and Q.8 are formed. The epitaxial crystal growth is performed on the spacer layer 2 as shown by the arrow in the figure.
→ Electron supply layer 3 ◆ Spacer layer 4
Two-dimensional electronic debris 7 and υ·8 of the layer are formed. 1st 2
Dimensional electron gas 7 is first grown -d/c non-doped GaA
Formed at the heterojunction interface where AA(]aAf1 layers 2 and 3 are grown on the o layer 1, and the second two-dimensional electron gas 8 is grown first)
C growth layer 7' (GaA on A4GaAe layers 3 and 4)
It is formed at the hetero lff junction interface where the θ layer 1 is grown.

この2種の2次元可、子ガス7及び8け、それぞれが単
独に形成すJ1メー場合にその電子移動度が大きく異な
ること/I測測定れている、すなわち前記第1の構成の
2次元電子ガス番1先に述べた如くμn=110.00
0 (elvv、LI) j?j一度の電子移動度カ実
現jれるのに対しで、前記第2の構成の2次元電子ガス
はその電子秤i’i!I j!’、3 :r r+ =
 10.0001cl/V 、F+ )程度と著しく低
い1.この後者に1、・け乙電子f8動度の低下は、n
型A l [J a、 r□r e 電子供給層中のド
ナー不純物例えばSIZ・−・ア1」接合界面を越えて
2次元電子ガスの領域Vこ1−C拡散すること(7−よ
ると考えられる、 先に第1図に示り、、Al超格子414造において、各
層の厚さを]/1′−プのGthΔr3層1について1
. =25(nm)、ノン・ドーグのAtca、t1*
 42及0・4についてt2=t4−G (nm3. 
n型At(laΔS電子供給層3につい千t* ”10
 〔nxn〕、従って1周期あたりの厚さT=47(+
1m) とし、こノ1をに口0周期積層した例につい1
.槓方向導質率σ、2次元電子ガス7及び8の電子移動
度μ7及びμs、並びに電子面濃1in7及びn8’i
i:温吐77〔K」において測定して次の如き結果が得
ら#tているσ ≠1.lX10’ (S−m’ 〕μ
7−20,000 〔cl/’V−s 3n7≠6 x
 10” (m−2:1 μa ’i”lO,000(c11/”V−e)。
When these two types of two-dimensional gases 7 and 8 are formed independently, their electron mobilities are significantly different. Electronic gas number 1 As mentioned earlier, μn = 110.00
0 (elvv, LI) j? In contrast, the two-dimensional electron gas of the second configuration realizes the electron mobility i'i! I j! ', 3: r r+ =
10.0001cl/V, F+), which is extremely low. In this latter case, 1, the decrease in electronic f8 movement is n
type A l [J a, r□re donor impurity in the electron supply layer, e.g. SIZ・-・A1” Diffusion of the two-dimensional electron gas region V 1-C beyond the junction interface (according to 7- As shown in Fig. 1 above, in the Al superlattice 414 structure, the thickness of each layer is given by ]/1'-GthΔr3 for layer 1
.. =25 (nm), non-dawg Atca, t1*
42 and 0.4 t2=t4-G (nm3.
n-type At (laΔS 1,000t* ”10 per electron supply layer 3
[nxn], therefore the thickness per period T = 47 (+
1m), and for an example of laminating this 1 with 0 cycles, 1
.. conductivity σ in the radial direction, electron mobilities μ7 and μs of the two-dimensional electron gases 7 and 8, and electron surface concentrations 1in7 and n8'i
i: Measured at a temperature of 77 [K] and obtained the following results: σ ≠ 1. lX10'(S-m' 〕μ
7-20,000 [cl/'V-s 3n7≠6 x
10" (m-2:1 μa'i"lO,000(c11/"V-e).

n、≠2x l Q121−tri−’ 〕またノンド
ープのGaAs1悼1の厚さt、==80(nmlとし
その他の層VCついてd前記従来例と同一の厚さとして
、1周期あたりの厚さT−102(nmlとした例につ
いてt」、次の如き結果が得られている σ Fl、3 x 103(8・an−’ 〕μ、≠1
00.000 (crA、/ V □ (1) 。
n, ≠ 2x l Q121-tri-'] Also, the thickness of the non-doped GaAs1 layer t, ==80 (nml), and the thickness of the other layers VC is the same as that of the conventional example, and the thickness per period is T-102 (t for the example with nml), the following results are obtained σ Fl, 3 x 103 (8・an-' ] μ, ≠ 1
00.000 (crA, / V □ (1).

n7≠6 X 10” (crn−’ )す≠10,0
00 CerA/ V U〕。
n7≠6×10” (crn-')su≠10,0
00 CerA/VU].

n @ :2 x 1012 〔am−q−)ただし、
横方向導電率σは亀仔の電荷をeとして、電子移動度μ
7.μ8.電子面濃度n7.n8及び−周期あたりの厚
さTとの間に次式に示す関係が成立する。
n @ :2 x 1012 [am-q-) However,
The lateral conductivity σ is the electron mobility μ
7. μ8. Electronic surface concentration n7. The following relationship holds true between n8 and the thickness T per -period.

σ−e (/l 7.n 7 + tr 8.n 8)
 /T前記従来例についてT、ilられた横方向導電率
σ−11乃至1.3 x I O’ (S−cnI−+
 3 は、GaAs単結晶について得られる上限値σF
O,8x 1 o3(S −cm−+ )よりは高いが
超格子構造に対する期待を満足させるものとはいえ乃い
σ-e (/l 7.n 7 + tr 8.n 8)
/T for the conventional example T,il lateral conductivity σ-11 to 1.3 x I O' (S-cnI-+
3 is the upper limit value σF obtained for GaAs single crystal
Although it is higher than O,8x 1 o3 (S -cm-+ ), it does not satisfy expectations for a superlattice structure.

前記測定値を検討すると、 T=47 (n+r+3゜
城′ t、=25[nmlの例においては前記第1の構造2次
元電子ガス7の電子移動度がμ7−20,000(e4
7V−++ J と大幅【て低下することによって、捷
だ’r=to2(nmlj、 tl−80(nmlの例
においては2次元電子ガス7の電子移動度はμ7≠10
0,000〔cry/ V−0)どほぼ正常であるが、
−周期あたりの厚さTの増加にJ:つて、横方向導電率
σが低下してい・−)・ し+ =25 (11111Jの例Vこおける第1の溝
底の2次元電子ガス7り電子*tkbeの低下は、ノン
ドープの1・aA8f’41の上下両界面が接近してい
るために2次元電子ガス相互間の干渉を生ずることによ
ると判断され= tr −80(nr+−]の例におい
てはこの2次元電子ノiス相互間が分IIflされて、
第1の構成の2次元電子ガス7の電子移動度が正常な値
を示すと判1析されろ、 (cl)発明の目的 本発明は、横方向導電率が前記現状より向上された変調
ドープA 、I G Fl、 A 8 /G n、 A
 R超格子構造を提供することを目的とする、 Iρ)発明の構成 本発明の前記目的は、第1の砒化ガリウム層と第1の砒
化下ルミニウム・ガリウム層と、ドナー不純物がドープ
された第2の砒化アルミニウム・ガリウム層と、第3の
砒化アルミニウム・ガリウム層と、第2の砒化ガリウム
層と、厚さが5(nm)以下の第4の砒化アルミニウム
・ガリウJ一層とが順次積層されて前記第1の砒化ガリ
ウム層に戻る周期が複数周期含まれてなら半導体超格子
構造により達成される。
Considering the above measurement values, in the example of T=47 (n+r+3° Castle' t,=25 [nml), the electron mobility of the first structured two-dimensional electron gas 7 is μ7-20,000 (e4
7V-++ J, and the electron mobility of the two-dimensional electron gas 7 is μ7≠10
0,000 [cry/V-0] is almost normal, but
- As the thickness T per period increases, the lateral conductivity σ decreases. The decrease in electron *tkbe is determined to be due to the interference between two-dimensional electron gases due to the proximity of both the upper and lower interfaces of non-doped 1.aA8f'41.Example of = tr -80(nr+-) In this case, the two-dimensional electronic noise is divided by IIfl,
It is analyzed that the electron mobility of the two-dimensional electron gas 7 of the first configuration shows a normal value. A , I G Fl, A 8 /G n, A
Iρ) Structure of the Invention Aiming to provide an R superlattice structure. A second aluminum arsenide/gallium arsenide layer, a third aluminum arsenide/gallium layer, a second gallium arsenide layer, and a fourth aluminum arsenide/gallium J layer having a thickness of 5 (nm) or less are sequentially laminated. A semiconductor superlattice structure is achieved by including a plurality of periods in which the gallium arsenide layer returns to the first gallium arsenide layer.

(イ)発明の実施例 以下本発明づ:実施例により図面を参照して具体的に説
明する。Kc2図は9本発明による変調ドープA/、G
aAl1/Ga、Aa超格子構造の実施例の伝導帯のエ
ネルギーバンド図である。図に示す如く本実施例の超格
子構造は、ノンドープのGaAs層11゜ノンドーグの
AtO,3Ga0.7Asスペ一サ層12.Siを2 
x l O” (c+++−3)程度にドーグしたn型
ΔtQ、3 G a、 Q、7 A s 電子供給#1
3.ノンドープのAtO,3GaO,7Asスペ一サ層
14.ノンドープの(Jn、 A 6層15及びノンド
ープのA t O,3G a O,7A Elバリア層
16が順次積層されて前記ノンドープの0aAS層11
に戻る周期が繰返えされて・、前記第1の構成の2次元
電子ガス17がノンドープのG a、 A e層11の
AtGaAs スペーサ層12との界面近傍にまた前記
第2の構成の2次元電子ガス18かノンドープのGaA
s層15のAtGaAeスペーサ層14との層面4傍に
形成されている。
(a) Embodiments of the Invention The present invention will now be described in detail by way of embodiments with reference to the drawings. Kc2 diagram is 9 Modulation doped A/, G according to the present invention
aAl1/Ga, is an energy band diagram of the conduction band of an example of the Aa superlattice structure. As shown in the figure, the superlattice structure of this embodiment includes a non-doped GaAs layer 11°, a non-doped AtO, 3Ga0.7As spacer layer 12. Si 2
x l O” (c+++-3) n-type ΔtQ, 3 Ga, Q, 7 A s Electron supply #1
3. Non-doped AtO, 3GaO, 7As spacer layer 14. A non-doped (Jn, A 6 layer 15) and a non-doped AtO, 3G a O, 7A El barrier layer 16 are sequentially stacked to form the non-doped 0aAS layer 11.
The cycle of returning to is repeated, and the two-dimensional electron gas 17 of the first configuration is added to the non-doped Ga, Ae layer 11 near the interface with the AtGaAs spacer layer 12, and the two-dimensional electron gas 17 of the second configuration is Dimensional electron gas 18 or non-doped GaA
It is formed near the layer surface 4 of the s-layer 15 with the AtGaAe spacer layer 14 .

本実施例においては前記半導体層11乃至16は分子線
エピタキシャル成長方法によって成長しており、各層の
厚さはノンドープのGaAs層11及び15Vcついて
tII≠tII+≠10(nm)、ノンドープの、Af
GaA日 スペーサ層12及(に 14 &てついてt
+2:t+*≠(i(nm)、n型A4GaAe電子供
給層13じついてt13己10(nm1.ノンドーグ゛
のAtGa/l バリア層16についてtto ?’5
 (nm〕としている、従って1周期あたりの厚さT=
47(nm)で前記第1の従来例と同一である。この構
造を数10周期繰返した本実施例について、前記従来例
と同様に温度77(K)において測定した結果、下記の
横方向導電率σ、電子移動度μm7及び1118.並び
に電子面濃度n17及びn18が得られている。
In this embodiment, the semiconductor layers 11 to 16 are grown by the molecular beam epitaxial growth method, and the thickness of each layer is tII≠tII+≠10 (nm) for the non-doped GaAs layers 11 and 15Vc, and the thickness of the non-doped Af
GaA spacer layer 12 and 14 &
+2: t+*≠(i (nm), n-type A4GaAe electron supply layer 13 and t13 self 10 (nm 1.
(nm), therefore, the thickness per period T =
47 (nm), which is the same as the first conventional example. This example, in which this structure was repeated several dozen times, was measured at a temperature of 77 (K) in the same way as the conventional example, and the results were as follows: lateral conductivity σ, electron mobility μm7, and 1118. In addition, electronic surface concentrations n17 and n18 are obtained.

σ ≠2.7X103 (S−圀−リ μm7≠100,000 (cd/’V−B)。σ ≠ 2.7X103 (S-Kori-Li μm7≠100,000 (cd/'V-B).

n17≠6 x 10” Ccrs−” )μm8=1
0,000 (cd/V−s 〕n18t2xlo” 
Ccm−2) 本実施例においては横方向導電率が前記従来例に比較し
て約2倍に増大している。この増大は1周期あたりの厚
さを増力けることなく2次元電子ガス17と18との間
14797層16を設けることによって両者間が分離さ
れたことrこよる効果である 本実施例においては先に述べた如く厚さ約5(nmlの
A t 0.3ua (1,7A e層をバリア層とし
ておりその組成比かスペーサ層及び電子供給層と同一で
あるが、これらの各AIGaA6層が同一組成比である
ことは必要条件ではない。バリア層の効果はバリア幅ず
なわち厚さとバリア高さすなわちAtxGal−XAI
IとGaAs との伝導帯のエネルギー差の平方根との
積によって定まるから、バリア層とするAtXGa 1
−XAFIの組成比Xと厚さとの組恰わせを選択“〕る
ことによって所要の効果を得ることができる。ただしバ
リア層の厚さは1周期あたりの厚さを抑制するために5
(nm、I以下とすることが望ましい、。
n17≠6 x 10” Ccrs-”)μm8=1
0,000 (cd/V-s]n18t2xlo”
Ccm-2) In this example, the lateral conductivity is approximately twice as high as that of the conventional example. This increase is due to the fact that the two-dimensional electron gases 17 and 18 are separated by providing the 14797 layer 16 between them without increasing the thickness per cycle. As mentioned above, the thickness is about 5 (nml) and the A t 0.3 ua (1,7 A) layer is used as a barrier layer, and its composition ratio is the same as that of the spacer layer and the electron supply layer, but each of these AIGaA6 layers is the same. The composition ratio is not a necessary condition.The effectiveness of the barrier layer depends on the barrier width, that is, the thickness, and the barrier height, that is, AtxGal-XAI
Since it is determined by the product of I and the square root of the energy difference in the conduction band of GaAs, the barrier layer AtXGa 1
- The desired effect can be obtained by selecting a combination of the composition ratio X of XAFI and the thickness.However, the thickness of the barrier layer is set to 5.
(It is desirable that it be less than nm, I.

(g) 発明の詳細 な説明した如く本発明によれば、変調ドーグn−AtG
aAs/GaAs超格子構造において、高電子移動度の
2次元電子ガスと低電子移動度の2次元電子ガスとの間
の干渉が1周期あたりの厚さを増加することなく分離さ
れて、ペテロ接合面に平向な方向の導電度の増大が実現
される。
(g) According to the present invention, as described in the detailed description of the invention, the modulated Dawg n-AtG
In the aAs/GaAs superlattice structure, the interference between the two-dimensional electron gas with high electron mobility and the two-dimensional electron gas with low electron mobility is separated without increasing the thickness per period, resulting in a Peter junction. An increase in conductivity in the direction parallel to the plane is achieved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は変調ドープn−AtGaAs/GaAo超格子
構造の従来例のエネルギーバンド図、第2図は本発明の
実施例のエネルギーバンド図である、図において、11
及び15はノンドーグのGaAn層、12及び14θノ
ンドープのAt(laΔ0スペーザ層、13にIn型A
L()aAs電子供給層、16はノンドープ「υAtG
aA3 バリア層、17は第1の構成の2次元電子ガス
、18は第2の構成の2次元電子ガスを示す。
FIG. 1 is an energy band diagram of a conventional example of a modulation-doped n-AtGaAs/GaAo superlattice structure, and FIG. 2 is an energy band diagram of an embodiment of the present invention.
and 15 are non-doped GaAn layers, 12 and 14θ non-doped At (laΔ0 spacer layers, 13 is In-type A
L()aAs electron supply layer, 16 is non-doped “υAtG
aA3 barrier layer; 17 indicates the two-dimensional electron gas of the first configuration; and 18 indicates the two-dimensional electron gas of the second configuration.

Claims (1)

【特許請求の範囲】 第1の砒化ガリウム層と、第1の砒化゛アルミニウム・
・ガリウム層と、ドナー不純物7.5・ドープされた第
2の砒化アルミニウム ガリウム層と、第3の砒化アル
ミニウム・ガリウム層と、第2の砒化ガリウム層と、厚
さが5〔nIn〕以下の第4の砒化アルミニウム・ガリ
ウム層とが順次積層されて前記第1の砒化ガリウム層に
戻る周期が複数周期含首れてなることを特徴とする半導
体超格子構造。
[Claims] A first gallium arsenide layer and a first aluminum arsenide layer.
・Gallium layer, second aluminum arsenide doped with donor impurity 7.5 gallium layer, third aluminum gallium arsenide layer, second gallium arsenide layer, with a thickness of 5 [nIn] or less A semiconductor superlattice structure comprising a plurality of periods in which a fourth aluminum-gallium arsenide layer is sequentially stacked and returns to the first gallium arsenide layer.
JP58146703A 1983-08-12 1983-08-12 Structure of semiconductor superlattice Granted JPS6039869A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58146703A JPS6039869A (en) 1983-08-12 1983-08-12 Structure of semiconductor superlattice

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58146703A JPS6039869A (en) 1983-08-12 1983-08-12 Structure of semiconductor superlattice

Publications (2)

Publication Number Publication Date
JPS6039869A true JPS6039869A (en) 1985-03-01
JPH0121631B2 JPH0121631B2 (en) 1989-04-21

Family

ID=15413636

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58146703A Granted JPS6039869A (en) 1983-08-12 1983-08-12 Structure of semiconductor superlattice

Country Status (1)

Country Link
JP (1) JPS6039869A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63501459A (en) * 1985-11-22 1988-06-02 ザ ゼネラル エレクトリツク カンパニ−,ピ−.エル.シ− semiconductor equipment
JPH04260339A (en) * 1990-10-19 1992-09-16 Philips Gloeilampenfab:Nv Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63501459A (en) * 1985-11-22 1988-06-02 ザ ゼネラル エレクトリツク カンパニ−,ピ−.エル.シ− semiconductor equipment
JPH04260339A (en) * 1990-10-19 1992-09-16 Philips Gloeilampenfab:Nv Semiconductor device

Also Published As

Publication number Publication date
JPH0121631B2 (en) 1989-04-21

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