JPH0121631B2 - - Google Patents

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Publication number
JPH0121631B2
JPH0121631B2 JP58146703A JP14670383A JPH0121631B2 JP H0121631 B2 JPH0121631 B2 JP H0121631B2 JP 58146703 A JP58146703 A JP 58146703A JP 14670383 A JP14670383 A JP 14670383A JP H0121631 B2 JPH0121631 B2 JP H0121631B2
Authority
JP
Japan
Prior art keywords
layer
doped
gallium arsenide
dimensional electron
algaas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58146703A
Other languages
Japanese (ja)
Other versions
JPS6039869A (en
Inventor
Shunichi Muto
Tomonori Ishikawa
Kazuhiro Kondo
Masahiko Sasa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP58146703A priority Critical patent/JPS6039869A/en
Publication of JPS6039869A publication Critical patent/JPS6039869A/en
Publication of JPH0121631B2 publication Critical patent/JPH0121631B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • H01L29/151Compositional structures
    • H01L29/152Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
    • H01L29/155Comprising only semiconductor materials

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Recrystallisation Techniques (AREA)

Description

【発明の詳細な説明】 (a) 発明の技術分野 本発明は半導体超格子構造、特にヘテロ接合界
面に平行な方向に大きい導電率を有する変調ドー
プ砒化アルミニウム・ガリウム/砒化ガリウム系
半導体超格子構造に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a semiconductor superlattice structure, particularly a modulated doped aluminum gallium arsenide/gallium arsenide based semiconductor superlattice structure having high conductivity in the direction parallel to the heterojunction interface. Regarding.

(b) 技術の背景 社会の情報化が急速に進展しつつあるが、次世
代への飛躍を考えるときその基礎となるべきエレ
クトロニクス技術には幾つかの限界が予測され
る。すなわち基本となるデバイス(素子)の動作
速度集積密度或いは波長帯域等には材料物性によ
る限界があり、このデバイスの限界によつてシス
テムの進展が制約されることとなる。
(b) Background of the technology The informationization of society is progressing rapidly, but when considering the leap to the next generation, there are some limitations to the electronics technology that should form the basis. That is, there are limits to the operating speed, integration density, wavelength band, etc. of the basic device (element) due to the physical properties of the material, and the progress of the system is restricted by the limits of the device.

この材料物性に基づく限界を打破する可能性が
人工的に創造される超格子結晶構造に期待されて
いる。すなわち異なる材料よりなる単原子層乃至
数10原子層程度の層を周期的に成長させた超格子
構造においては、通常の結晶ではポテンシヤル場
の周期がその格子定数で定まるのに対して、前記
周期で定まるこれより大きい周期が形成されて電
子の負質量すなわち負性抵抗が観測されるなど新
しい可能性がうかがわれる。この様な可能性を有
する超格子構造によつて新機能素子、例えば新型
超高速トランジスタ、高感度かつ高効率の可視光
線、紫外線、X線の変換素子、或いは光双安定論
理素子などが実現されることとなろう。
Artificially created superlattice crystal structures are expected to have the potential to overcome these limitations based on material properties. In other words, in a superlattice structure in which monoatomic layers to several tens of atomic layers made of different materials are grown periodically, the period of the potential field is determined by the lattice constant of a normal crystal, whereas the period of the potential field is determined by its lattice constant. A new possibility is suggested, such as the formation of a period larger than this determined by , and the observation of negative mass of electrons, that is, negative resistance. Superlattice structures with such potential can be used to realize new functional devices, such as new ultrahigh-speed transistors, highly sensitive and efficient visible light, ultraviolet, and X-ray conversion devices, or optical bistable logic devices. It will happen.

(c) 従来技術と問題点 超格子構造によつて先に述べた如く、通常の固
体内における原子間隔より大きい周期で2次元的
な周期ポテンシヤルを形成することができるが、
この2次元的なポテンシヤルによつて2次元状態
の電子すなわち2次元電子ガスを実現することが
できる。
(c) Prior art and problems As mentioned above, the superlattice structure allows the formation of a two-dimensional periodic potential with a period larger than the atomic spacing in a normal solid.
This two-dimensional potential makes it possible to realize two-dimensional electrons, that is, a two-dimensional electron gas.

従来の通常の半導体デバイスではキヤリアはド
ナーやアクセプタ不純物が添加され、したがつて
それらの不純物が存在している領域内を移動す
る。移動に際してキヤリアは格子振動および不純
物イオンによつて散乱を受けるが、格子振動によ
る散乱の確率を小さくしてキヤリアの移動度を大
きくするために低温にすると、不純物イオンによ
るクーロン散乱の確率が大きくなつてキヤリアの
移動度は期待するように大きくはならない。
In conventional conventional semiconductor devices, carriers are doped with donor and acceptor impurities and therefore migrate within regions where these impurities are present. When moving, carriers are scattered by lattice vibrations and impurity ions, but if the temperature is lowered to reduce the probability of scattering due to lattice vibrations and increase carrier mobility, the probability of Coulomb scattering by impurity ions increases. Therefore, carrier mobility does not increase as expected.

不純物イオンは所要の多数キヤリアを得るため
に必要であるキヤリアが移動する領域と同じ領域
に加える必要はなく、不純物が添加される領域と
キヤリアが移動する領域とを空間的に分離すれ
ば、不純物散乱効果を抑制してキヤリアの移動度
を大きくすることができる。
Impurity ions do not need to be added to the same region where the carriers move, which is necessary to obtain the required number of carriers, but if the region where the impurity is added and the region where the carriers move are spatially separated, the impurity ions can be added to the same region where the carriers move. The mobility of the carrier can be increased by suppressing the scattering effect.

前記2次元電子ガスはこの不純物から空間的に
分離されたキヤリアであり、これを実現する代表
的構造は次のとおりである。すなわち、ノンドー
プの砒化ガリウム(GaAs)層上に、ドナー不純
物としてシリコン(Si)を添加した砒化アルミニ
ウムガリウム(AlGaAs)層を成長させると、
AlGaAs層内のSiから供給された電子は禁制帯幅
が小さく電子に対するポテンシヤルエネルギーが
小さいGaAs層側に遷移して、ヘテロ接合界面近
傍に2次元電子ガスが形成される。この様なSi選
択ドープAlGaAs/GaAsシングルヘテロ構造結
晶では、既に例えば温度77〔K〕において2次元
電子ガス移動度μn=117000〔cm2/V.S〕程度の値が
得られている。
The two-dimensional electron gas is a carrier spatially separated from the impurities, and a typical structure for realizing this is as follows. That is, when an aluminum gallium arsenide (AlGaAs) layer doped with silicon (Si) as a donor impurity is grown on a non-doped gallium arsenide (GaAs) layer,
Electrons supplied from Si in the AlGaAs layer transit to the GaAs layer side, which has a smaller forbidden band width and lower potential energy for electrons, and a two-dimensional electron gas is formed near the heterojunction interface. In such a Si selectively doped AlGaAs/GaAs single heterostructure crystal, a two-dimensional electron gas mobility μn=117000 [cm 2 /VS] has already been obtained at a temperature of 77 [K], for example.

上記のSi選択ドープAlGaAs/GaAsシングル
ヘテロ構造を積層して超格子構造を形成するなら
ば、ヘテロ接合界面に平行な方向(以下横方向と
略称する)について高電子移動度、従つて高導電
率の半導体基体が得られるものと期待される。
If the above Si selectively doped AlGaAs/GaAs single heterostructure is stacked to form a superlattice structure, it will have high electron mobility in the direction parallel to the heterojunction interface (hereinafter referred to as lateral direction), and therefore high conductivity. It is expected that a semiconductor substrate of 100% can be obtained.

第1図はこの目的で形成された変調ドープn―
AlGaAs/GaAs超格子構造の伝導帯のエネルギ

バンド図である。図に示す如く従来例の超格子構
造は、ノンドープのGaAs層1、ノンドープの
Al0.3Ga0.7Asスペーサ層2、Siを2×1018〔cm-3
程度にドープしたn型Al0.3Ga0.7As電子供給層
3、ノンドープのAl0.3Ga0.7Asスペーサ層4の
組合わせを1周期として構成されて、2次元電子
ガス7及び8が形成されている。なおエピタキシ
ヤル結晶成長は図中矢印で示す如く、スペーサ層
2→電子供給層3→スペーサ層4の方向に行なわ
れている。
Figure 1 shows a modulation doped n-
FIG. 2 is an energy band diagram of a conduction band of an AlGaAs/GaAs superlattice structure. As shown in the figure, the conventional superlattice structure consists of a non-doped GaAs layer 1 and a non-doped GaAs layer 1.
Al0.3Ga0.7As spacer layer 2, Si 2×10 18 [cm -3 ]
Two-dimensional electron gases 7 and 8 are formed by a combination of a moderately doped n-type Al0.3Ga0.7As electron supply layer 3 and a non-doped Al0.3Ga0.7As spacer layer 4 in one period. Incidentally, epitaxial crystal growth is performed in the direction of spacer layer 2→electron supply layer 3→spacer layer 4, as shown by arrows in the figure.

前記の超格子構造においては、その1周期内に
2層の2次元電子ガス7及び8が形成される。第
1の2次元電子ガス7は先に成長させたノンドー
プGaAs層1上にAlGaAs層2及び3を成長した
ヘテロ接合界面に形成され、第2の2次元電子ガ
ス8は先に成長させたAlGaAs層3及び4上に
GaAs層1を成長したヘテロ接合界面に形成され
ている。
In the superlattice structure described above, two layers of two-dimensional electron gases 7 and 8 are formed within one period. The first two-dimensional electron gas 7 is formed at the heterojunction interface where the AlGaAs layers 2 and 3 are grown on the previously grown non-doped GaAs layer 1, and the second two-dimensional electron gas 8 is formed on the previously grown AlGaAs layer 1. on layers 3 and 4
It is formed at the heterojunction interface where the GaAs layer 1 is grown.

この2種の2次元電子ガス7及び8は、それぞ
れが単独に形成された場合にその電子移動度が大
きく異なることが測定されている。すなわち前記
第1の構成の2種元電子ガスは先に述べた如く
μn=110000〔cm2/V・s〕程度の電子移動度が実現さ
れるのに対して、前記第2の構成の2次元電子ガ
スはその電子移動度μn=10000〔cm2/V.s〕程度と著
しく低い。この後者における電子移動度の低下
は、n型AlGaAs電子供給層中のドナー不純物例
えばSiがヘテロ接合界面を越えて2次元電子ガス
の領域にまで拡散することによると考えられる。
It has been measured that these two types of two-dimensional electron gases 7 and 8 have greatly different electron mobilities when each is formed individually. In other words, the two-element electron gas of the first configuration achieves an electron mobility of approximately μn=110000 [cm 2 /V・s] as described above, whereas the two-element electron gas of the second configuration Dimensional electron gas has an extremely low electron mobility of about μn=10000 [cm 2 /Vs]. This latter decrease in electron mobility is thought to be due to donor impurities such as Si in the n-type AlGaAs electron supply layer diffusing into the two-dimensional electron gas region beyond the heterojunction interface.

先に第1図に示した超格子構造において、各層
の厚さをノンドープのGaAs層1についてt1=25
〔nm〕、ノンドープのAlGaAs層2及び4につい
てt2=t4=6〔mn〕、n型AlGaAs電子供給層3に
ついてt3=10〔nm〕、従つて1周期あたりの厚さ
T=47〔nm〕とし、これをを数10周期積層した例
について、横方向導電率σ、2次元電子ガス7及
び8の電子移動度μ7及びμ8、並びに電子面濃
度n7及びn8を温度77〔K〕において測定して
次の如き結果が得られている。
In the superlattice structure shown in FIG. 1, the thickness of each layer is t 1 = 25 for non-doped GaAs layer 1.
[nm], t 2 = t 4 = 6 [mn] for non-doped AlGaAs layers 2 and 4, t 3 = 10 [nm] for n-type AlGaAs electron supply layer 3, therefore thickness per period T = 47 [nm], and for an example in which several ten cycles of these are stacked, the lateral conductivity σ, the electron mobilities μ7 and μ8 of the two-dimensional electron gases 7 and 8, and the electron surface concentrations n7 and n8 are expressed as the temperature 77 [K] The following results were obtained by measurement.

σ≒1.1×103〔S・cm-1〕 μ7≒20000〔cm2/V・s〕 n7≒6×1011〔cm-2〕 μ8≒10000〔cm2/V.s〕、 n8≒2×1012〔cm-2〕 またノンドープのGaAs層1の厚さt1=80〔nm〕
としその他の層については前記従来例と同一の厚
さとして、1周期あたりの厚さT=102〔nm〕と
した例については次の如き結果が得られている。
σ≒1.1×10 3 [S・cm -1 ] μ 7 ≒20000 [cm 2 /V・s] n 7 ≒6×10 11 [cm -2 ] μ 8 ≒10000 [cm 2 /Vs], n 8 ≒2×10 12 [cm -2 ] Also, the thickness of the non-doped GaAs layer 1 t 1 = 80 [nm]
The following results were obtained for an example in which the thickness of the other layers was the same as in the conventional example, and the thickness per period was T=102 [nm].

σ≒1.3×103〔S・cm-1〕 μ7≒100000〔cm2/V・s〕、 n7≒6×1011〔cm-2〕 μ8≒10000〔cm2/V・s〕、 μ8≒2×1012〔cm-2〕 ただし、横方向導電率σは電子の電荷をeとし
て、電子移動度μ7,μ8、電子面濃度n7,n
8及び一周期あたりの厚さTとの間に次式に示す
関係が成立する。
σ≒1.3×10 3 [S・cm -1 ] μ 7 ≒100000 [cm 2 /V・s], n 7 ≒6×10 11 [cm -2 ] μ 8 ≒10000 [cm 2 /V・s] , μ 8 ≒2×10 12 [cm -2 ] However, the lateral conductivity σ is calculated using the electron charge as e, the electron mobility μ7, μ8, the electron surface concentration n7, n
8 and the thickness T per period, the relationship shown in the following equation holds true.

σ=e(μ7.n7+μ8.n8)/T 前記従来例について得られた横方向導電率σ=
1.1乃至1.3×103〔S・cm-1〕は、GaAs単結晶につ
いて得られる上限値σ≒0.8×103〔S・cm-1〕よ
りは高いが超格子構造に対する期待を満足させる
ものとはいえない。
σ=e(μ7.n7+μ8.n8)/T Lateral conductivity σ=obtained for the conventional example
1.1 to 1.3×10 3 [S·cm -1 ] is higher than the upper limit value σ≒0.8×10 3 [S·cm -1 ] obtained for GaAs single crystals, but it satisfies expectations for a superlattice structure. No, no.

前記測定値を検討すると、T=47〔nm〕、t1
25〔nm〕の例においては前記第1の構成の2次元
電子ガス7の電子移動度がμ7≒20000〔cm2/V・s〕と
大幅に低下することによつて、またT=102
〔nm〕、t1=80〔nm〕の例においては2次元電子
ガス7の電子移動度はμ7≒100000〔cm2/V・s〕とほ
ぼ正常であるが、一周期あたりの厚さTの増加に
よつ、横方向導電率σが低下している。
Considering the above measurement values, T = 47 [nm], t 1 =
In the example of 25 [nm], the electron mobility of the two-dimensional electron gas 7 of the first configuration is significantly reduced to μ7≒20000 [cm 2 /V・s], and T=102
[nm], t 1 = 80 [nm], the electron mobility of the two-dimensional electron gas 7 is μ7≒100000 [cm 2 /V・s], which is almost normal, but the thickness per period T Due to the increase in , the lateral conductivity σ decreases.

t1=25〔nm〕の例における第1の構成の2次元
電子ガス7の電子移動度の低下は、ノンドープの
GaAs層1の上下両界面が接近しているために2
次元電子ガス相互間の干渉を生ずることによると
判断され、t1=80〔nm〕の例においてはこの2次
元電子ガス相互間が分離されて、第1の構成の2
次元電子ガス7の電子移動度が正常な値を示すと
判断される。
In the example of t 1 = 25 [nm], the decrease in electron mobility of the two-dimensional electron gas 7 of the first configuration is due to the non-doped
Because both the upper and lower interfaces of GaAs layer 1 are close to each other, 2
It is determined that this is due to interference between the two-dimensional electron gases, and in the example of t 1 = 80 [nm], the two-dimensional electron gases are separated, and the two-dimensional electron gases of the first configuration are separated.
It is determined that the electron mobility of the dimensional electron gas 7 exhibits a normal value.

(d) 発明の目的 本発明は、横方向導電率が前記現状より向上さ
れた変調ドープAlGaAs/GaAs超格子構造を提供
することを目的とする。
(d) Object of the Invention The object of the present invention is to provide a modulation-doped AlGaAs/GaAs superlattice structure with improved lateral conductivity compared to the current state of the art.

(e) 発明の構成 本発明の前記目的は、第1の砒化ガリウム層と
第1の砒化アルミニウム・ガリウム層と、ドナー
不純物がドープされた第2の砒化アルミニウム・
ガリウム層と、第3の砒化アルミニウム・ガリウ
ム層と、第2の砒化ガリウム層と、厚さが5
〔nm〕以下の第4の砒化アルミニウム・ガリウム
層とが順次積層されて前記第1の砒化ガリウム層
に戻る周期が複数周期含まれてなる半導体超格子
構造により達成される。
(e) Structure of the Invention The object of the present invention is to provide a first gallium arsenide layer, a first aluminum gallium arsenide layer, and a second aluminum arsenide layer doped with donor impurities.
a gallium layer, a third aluminum gallium arsenide layer, and a second gallium arsenide layer with a thickness of 5
This is achieved by a semiconductor superlattice structure including a plurality of periods in which a fourth aluminum/gallium arsenide layer of less than [nm] is sequentially stacked and returns to the first gallium arsenide layer.

(f) 発明の実施例 以下本発明を実施例により図面を参照して具体
的に説明する。第2図は、本発明による変調ドー
プAlGaAs/GaAs超格子構造の実施例の伝導帯の
エネルギーバンド図である。図に示す如く本実施
例の超格子構造は、ノンドープのGaAs層11、
ノンドープのAl0.3Ga0.7Asスペーサ層12、Si
を2×1018〔cm-3〕程度にドープしたn型
Al0.3Ga0.7As電子供給層13、ノンドープの
Al0.3Ga0.7Asスペーサ層14、ノンドープの
GaAs層15及びノンドープのAl0.3Ga0.7Asバリ
ア層16が順次積層されて前記ノンドープの
GaAs層11に戻る周期が繰返えされて、前記第
1の構成の2次元電子ガス17がノンドープの
GaAs層11のAlGaAsスペーサ層12との界面
近傍にまた前記第2の構成の2次元電子ガス18
がノンドープのGaAs層15のAlGaAsスペーサ
層14との界面近傍に形成されている。
(f) Embodiments of the Invention The present invention will be specifically described below using embodiments with reference to the drawings. FIG. 2 is an energy band diagram of the conduction band of an embodiment of a modulation-doped AlGaAs/GaAs superlattice structure according to the present invention. As shown in the figure, the superlattice structure of this example includes a non-doped GaAs layer 11,
Non-doped Al0.3Ga0.7As spacer layer 12, Si
n-type doped to about 2×10 18 [cm -3 ]
Al0.3Ga0.7As electron supply layer 13, non-doped
Al0.3Ga0.7As spacer layer 14, non-doped
A GaAs layer 15 and a non-doped Al0.3Ga0.7As barrier layer 16 are sequentially laminated to form the non-doped
The cycle of returning to the GaAs layer 11 is repeated, and the two-dimensional electron gas 17 of the first configuration is transferred to the non-doped
Near the interface between the GaAs layer 11 and the AlGaAs spacer layer 12, there is also a two-dimensional electron gas 18 of the second configuration.
is formed near the interface between the non-doped GaAs layer 15 and the AlGaAs spacer layer 14.

本実施例においては前記半導体層11乃至16
は分子線エピタキシヤル成長方法によつて成長し
ており、各層の厚さはノンドープのGaAs層11
及び15についてt11≒t15≒10〔nm〕、ノンドープ
のAlGaAsスペーサ層12及び14についてt12
t14≒6〔nm〕、n型AlGaAs電子供給層13につ
いてt13≒10〔nm〕、ノンドープのAlGaAsバリア
層16についてt16≒5〔nm〕としている。従つ
て1周期あたりの厚さT=47〔nm〕で前記第1の
従来例と同一である。この構造を数10周期繰返し
た本実施例について、前記従来例と同様に温度77
〔K〕において測定した結果、下記の横方向導電
率σ、電子移動度μ17及びμ18、並びに電子
面濃度n17及びn18が得られている。
In this embodiment, the semiconductor layers 11 to 16
is grown by a molecular beam epitaxial growth method, and the thickness of each layer is 11.
and 15, t 11 ≒ t 15 ≒ 10 [nm], and t 12 ≒ for non-doped AlGaAs spacer layers 12 and 14.
t 14 ≈6 [nm], t 13 ≈10 [nm] for the n-type AlGaAs electron supply layer 13, and t 16 ≈5 [nm] for the non-doped AlGaAs barrier layer 16. Therefore, the thickness T per period is 47 [nm], which is the same as the first conventional example. Regarding this example in which this structure was repeated several tens of cycles, the temperature was 77°C as in the conventional example.
As a result of measurement in [K], the following lateral conductivity σ, electron mobilities μ17 and μ18, and electronic surface concentrations n17 and n18 were obtained.

σ≒2.7×103〔S・cm-1〕 μ17≒100000〔cm2/V・s〕、 n17≒6×1011〔cm-2〕 μ18=10000〔cm2/V・s〕 n18≒2×1012〔cm-2〕 本実施例においては横方向導電率が前記従来例
に比較して約2倍に増大している。この増大は1
周期あたりの厚さを増加することなく2次元電子
ガス17と18との間にバリア層16を設けるこ
とによつて両者間が分離されたことによる効果で
ある。
σ≒2.7×10 3 [S・cm -1 ] μ17≒100000 [cm 2 /V・s], n17≒6×10 11 [cm -2 ] μ18=10000 [cm 2 /V・s] n18≒2 ×10 12 [cm -2 ] In this example, the lateral conductivity is approximately twice as high as that of the conventional example. This increase is 1
This effect is due to the separation between the two-dimensional electron gases 17 and 18 by providing the barrier layer 16 between the two-dimensional electron gases 17 and 18 without increasing the thickness per period.

本実施例においては先に述べた如く厚さ約5
〔nm〕のAl0.3Ga0.7As層をバリア層としており
その組成比がスペーサ層及び電子供給層と同一で
あるが、これらの各AlGaAs層が同一組成比であ
ることは必要条件ではない。バリア層の効果はバ
リア幅すなわち厚さとバリア高さすなわち
AlxGa1―xAsとGaAsとの伝導帯のエネルギー
差の平方根との積によつて定まるから、バリア層
とするAlxGa1―xAsの組成比xと厚さとの組合
わせを選択することによつて所要の効果を得るこ
とができる。ただしバリア層の厚さは1周期あた
りの厚さを抑制するために5〔nm〕以下とするこ
とが望ましい。
In this example, the thickness is approximately 5 mm as described above.
[nm] Al0.3Ga0.7As layer is used as a barrier layer, and its composition ratio is the same as that of the spacer layer and the electron supply layer, but it is not a necessary condition that these AlGaAs layers have the same composition ratio. The effectiveness of the barrier layer depends on the barrier width, or thickness, and the barrier height, or
Since it is determined by the product of the square root of the conduction band energy difference between AlxGa1-xAs and GaAs, the desired effect can be obtained by selecting the combination of composition ratio x and thickness of AlxGa1-xAs used as the barrier layer. can be obtained. However, the thickness of the barrier layer is desirably 5 [nm] or less in order to suppress the thickness per period.

(g) 発明の効果 以上説明した如く本発明によれば、変調ドープ
n―AlGaAs/GaAs超格子構造において、高電子
移動度の2次元電子ガスと低電子移動度の2次元
電子ガスとの間の干渉が1周期あたりの厚さを増
加することなく分離されて、ヘテロ接合面に平向
な方向の導電度の増大が実現される。
(g) Effects of the Invention As explained above, according to the present invention, in the modulation-doped n-AlGaAs/GaAs superlattice structure, the gap between the two-dimensional electron gas with high electron mobility and the two-dimensional electron gas with low electron mobility interference is separated without increasing the thickness per period, and an increase in conductivity in the direction parallel to the heterojunction surface is achieved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は変調ドープn―AlGaAs/GaAs超格子
構造の従来例のエネルギーバンド図、第2図は本
発明の実施例のエネルギーバンド図である。 図において、11及び15はノンドープの
GaAs層、12及び14はノンドープのAlGaAs
スペーサ層、13はn型AlGaAs電子供給層、1
6はノンドープのAlGaAsバリア層、17は第1
の構成の2次元電子ガス、18は第2の構成の2
次元電子ガスを示す。
FIG. 1 is an energy band diagram of a conventional example of a modulation-doped n-AlGaAs/GaAs superlattice structure, and FIG. 2 is an energy band diagram of an embodiment of the present invention. In the figure, 11 and 15 are non-doped
GaAs layers 12 and 14 are non-doped AlGaAs
Spacer layer, 13 is n-type AlGaAs electron supply layer, 1
6 is a non-doped AlGaAs barrier layer, 17 is the first
2-dimensional electron gas with the configuration, 18 is 2 of the second configuration
Showing dimensional electron gas.

Claims (1)

【特許請求の範囲】 1 第1のノンドープ砒化ガリウム層と、第1の
ノンドープ砒化アルミニウム・ガリウム層と、ド
ナー不純物がドープされた第2の砒化アルミニウ
ム・ガリウム層と、第3のノンドープ砒化アルミ
ニウム・ガリウム層と、第2のノンドープ砒化ガ
リウム層と、厚さが5〔nm〕以下の第4のノンド
ープ砒化アルミニウム・ガリウム層とが順次積層
されて前記第1のノンドープ砒化ガリウム層に戻
る周期が複数周期含まれてなり、前記第2の砒化
アルミニウム・ガリウム層内のドナー不純物から
供給される電子は前記第1及び第3のノンドープ
砒化アルミニウム・ガリウム層を介して隣接する
第1及び第2のノンドープ砒化ガリウム層に遷移
してヘテロ接合界面近傍に2次元電子ガスを形成
し、且つ前記2次元電子ガスは前記ヘテロ接合界
面に平行な方向に導電路を形成していることを特
徴とする半導体超格子構造。
[Claims] 1. A first non-doped gallium arsenide layer, a first non-doped aluminum arsenide gallium layer, a second aluminum arsenide gallium arsenide layer doped with a donor impurity, and a third non-doped aluminum arsenide gallium arsenide layer. A gallium layer, a second non-doped gallium arsenide layer, and a fourth non-doped aluminum gallium arsenide layer having a thickness of 5 [nm] or less are sequentially stacked and return to the first non-doped gallium arsenide layer at multiple periods. The electrons supplied from the donor impurity in the second aluminum gallium arsenide layer are transferred to adjacent first and second non-doped aluminum arsenide layers via the first and third non-doped aluminum gallium arsenide layers. A semiconductor superstructure characterized in that a two-dimensional electron gas is formed near the heterojunction interface by transitioning to a gallium arsenide layer, and the two-dimensional electron gas forms a conductive path in a direction parallel to the heterojunction interface. Lattice structure.
JP58146703A 1983-08-12 1983-08-12 Structure of semiconductor superlattice Granted JPS6039869A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58146703A JPS6039869A (en) 1983-08-12 1983-08-12 Structure of semiconductor superlattice

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58146703A JPS6039869A (en) 1983-08-12 1983-08-12 Structure of semiconductor superlattice

Publications (2)

Publication Number Publication Date
JPS6039869A JPS6039869A (en) 1985-03-01
JPH0121631B2 true JPH0121631B2 (en) 1989-04-21

Family

ID=15413636

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58146703A Granted JPS6039869A (en) 1983-08-12 1983-08-12 Structure of semiconductor superlattice

Country Status (1)

Country Link
JP (1) JPS6039869A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1987003424A1 (en) * 1985-11-22 1987-06-04 The General Electric Company, P.L.C. Semiconductor devices
GB2248966A (en) * 1990-10-19 1992-04-22 Philips Electronic Associated Field effect semiconductor devices

Also Published As

Publication number Publication date
JPS6039869A (en) 1985-03-01

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