JPS60254621A - Thin film forming method - Google Patents

Thin film forming method

Info

Publication number
JPS60254621A
JPS60254621A JP11111684A JP11111684A JPS60254621A JP S60254621 A JPS60254621 A JP S60254621A JP 11111684 A JP11111684 A JP 11111684A JP 11111684 A JP11111684 A JP 11111684A JP S60254621 A JPS60254621 A JP S60254621A
Authority
JP
Japan
Prior art keywords
substrate
thin film
plasma
semiconductor substrate
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11111684A
Other languages
Japanese (ja)
Inventor
Akiyoshi Tamura
彰良 田村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP11111684A priority Critical patent/JPS60254621A/en
Publication of JPS60254621A publication Critical patent/JPS60254621A/en
Pending legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/505Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
    • C23C16/509Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges using internal electrodes
    • C23C16/5096Flat-bed apparatus

Abstract

PURPOSE:To form a thin film with a small interfacial level density over a compound semiconductor substrate, by a method in which, after the compound semiconductor substrate is treated by heating at a temperature of 200-450 deg.C in hydrogen plasma, a thin film is formed over the semiconductor substrate surface. CONSTITUTION:An N type GaAs substrate 2 being a sample is put in the plasma apparatus 1. After vacuum-evacuated, the plasma apparatus 1 is supplied with H2 gas to produce H2 plasma by applying high frequency electric power while heating the substrate 2 at a temperature of 200-450 deg.C by a heater 3. After the substrate 2 is left at this state for a predetermined time, SiH4 and NH3 gas is introduced to deposite an Si3N4 film over the substrate 2. By forming the Si3H4 film in this way, the interfacial level density can be decreased.

Description

【発明の詳細な説明】 産業上の利用分野 −本発明は化合物半導体基板上への薄膜形成方法に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application - The present invention relates to a method of forming a thin film on a compound semiconductor substrate.

従来例の構成とその問題点 化合物半導体と絶縁膜の界面特性は、SiとS i02
の界面に比して界面準位密度が多く、特にG a A 
sでは、反転層の形成が困難であった。このように界面
準位密度が多いのは、構成元素の損失によるダングリン
グボンドに起因している。
The structure of the conventional example and its problems The interface characteristics between the compound semiconductor and the insulating film are Si and Si02
The interface state density is higher than that of the interface of G a A
With s, it was difficult to form an inversion layer. This high density of interface states is due to dangling bonds due to loss of constituent elements.

発明の目的 本発明は、このような従来の問題に鑑み、化合物半導体
基板上への界面準位密度の少ない薄膜形成方法を提供す
るものである。
OBJECTS OF THE INVENTION In view of these conventional problems, the present invention provides a method for forming a thin film with a low density of interface states on a compound semiconductor substrate.

発明の構成 本発明は、水素プラズマ中で化合物半導体基板を200
℃〜460℃の温度で、処理した後、薄膜を形成するこ
とによシ界面準位密度の少ない薄膜形成方法を可能とす
るものである。
Structure of the Invention The present invention provides a method for heating a compound semiconductor substrate in a hydrogen plasma for 200 minutes.
By forming a thin film after processing at a temperature of .degree. C. to 460.degree. C., a method of forming a thin film with a low density of interface states can be achieved.

実施例の説明 以下、n型G a A a基板上へのSi3N4膜形成
方法を例にとって説明する。
DESCRIPTION OF EMBODIMENTS A method for forming a Si3N4 film on an n-type GaAa substrate will be described below as an example.

第1図に示すように、プラズマCVD装置1中に、試料
となるn型G a A s基板2を設置し、真空排気後
、H2ガスを導入しく約0.05 Torr )、基板
2を約350℃でヒーター3にて加熱しながら高周波(
13,56矧h)電源4(パワー60W)を印加してH
2プラズマを発生させ、約2時間放置後、ひき続いてS
iHとNH3ガスを導入し、基板2上にSi3N4膜を
堆積させるものである。5,6はガスの導入部、排気部
である。
As shown in FIG. 1, an n-type GaAs substrate 2 as a sample is placed in a plasma CVD apparatus 1, and after evacuation, H2 gas is introduced (approximately 0.05 Torr), and the substrate 2 is heated to approx. While heating with heater 3 at 350℃, high frequency (
13,56 h) Apply power supply 4 (power 60W) to H
2 Plasma is generated, left for about 2 hours, and then S
A Si3N4 film is deposited on the substrate 2 by introducing iH and NH3 gases. Reference numerals 5 and 6 are a gas introduction section and an exhaust section.

第2図はこうして得られたSi3N4膜とn型G a 
A sとの界面準位密度を、H2プラズマ処理をした試
料としなかった試料について比較したもの9である。
Figure 2 shows the Si3N4 film obtained in this way and the n-type Ga
Figure 9 compares the interface state density with As between a sample subjected to H2 plasma treatment and a sample not treated with H2 plasma.

界面準位密度は、2ケタも減少していることがわかる。It can be seen that the interface state density has decreased by two orders of magnitude.

これはH原子の拡散によりダングリングボンドの数が減
少したためである。
This is because the number of dangling bonds decreased due to the diffusion of H atoms.

なおH2プラズマ処理中の基板加熱温度としては、20
0℃〜460℃が良い。第3図は、n型G a A g
とSi3N4膜の最小界面準位密度と基板加熱温度との
関係を示しだものである。なおH2プラズマは0.05
 Torrパワー50W、2時間である。
The substrate heating temperature during H2 plasma processing is 20
0°C to 460°C is good. Figure 3 shows n-type G a A g
This figure shows the relationship between the minimum interface state density of the Si3N4 film and the substrate heating temperature. Note that H2 plasma is 0.05
Torr power 50W, 2 hours.

最小界面準位密度は200℃より低い温度域と460℃
より高い温度域で大きくなっている。この原因として、
低温域ではH2プラズマのダメージが残っているためで
、高温域では、GaAs中のAsの解離のためである。
The minimum interface state density is in the temperature range lower than 200℃ and 460℃
It becomes larger in the higher temperature range. The cause of this is
In the low temperature range, this is because damage from the H2 plasma remains, and in the high temperature range, this is due to the dissociation of As in GaAs.

同様な傾向は1nPとSi3N4膜の界面についても見
られた基板加熱温度としては、200℃〜450℃が良
い0第4図は、n型InPとプラズマCV D ’S 
L 3N4膜との界面特性について、本発明のプラズマ
H2処理(基板加熱温度300℃、 0.05Torr
、パワー50W、2時間)をしたものとしていないもの
を比較したものである。この場合も界面準位密度は2ク
タはど減少していることがわかる。なお、馬プラズマ中
ではなくH2ガス雰囲気中放置の試料については、以上
のような効果は見られなかった。
A similar tendency was observed for the interface between 1nP and Si3N4 films.As for the substrate heating temperature, 200°C to 450°C is good.0 Figure 4 shows the interface between n-type InP and plasma CVD'S.
Regarding the interface characteristics with the L3N4 film, the plasma H2 treatment of the present invention (substrate heating temperature 300°C, 0.05 Torr
, power 50W, 2 hours) and without. It can be seen that in this case as well, the interface state density decreases by two factors. Note that the above effect was not observed for the sample that was left in an H2 gas atmosphere instead of in horse plasma.

以上のように本発明の方法を用いれば、従来に比して、
界面準位密度を顕著に減少させることが可能である。な
お以上の説明では、絶縁膜形成について述べたが、金属
膜形成に関しても利用できることはいうまでもない。
As described above, if the method of the present invention is used, compared to the conventional method,
It is possible to significantly reduce the interface state density. In the above description, the formation of an insulating film has been described, but it goes without saying that the invention can also be used for forming a metal film.

発明の効果 以上のように本発明は、化合物半導体基板を、H2プラ
ズマ中で、2oO℃〜450℃の温度で処理した後、薄
膜を形成することにより、従来より界面準位密度の少な
い良好な界面特性を持った薄膜形成方法を実現するもの
である。
Effects of the Invention As described above, the present invention processes a compound semiconductor substrate in H2 plasma at a temperature of 200°C to 450°C, and then forms a thin film, thereby producing a compound semiconductor substrate with a lower density of interface states than before. This method realizes a method for forming a thin film with interfacial properties.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はプラズマCVD装置の概略図、第2図。 第4図はそれぞれn −GaAa 、 n −I nP
とSi3N4膜の界面準位密度分布を示す図、第3図は
、n −G a A sとSi3N4膜の最小界面準位
密度と基板加熱温度の関係を示す図である。 1・・・・・・CVD装置、2・・・・・・n型G a
 A s基板。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 第2図
FIG. 1 is a schematic diagram of a plasma CVD apparatus, and FIG. 2 is a schematic diagram of a plasma CVD apparatus. Figure 4 shows n-GaAa and n-I nP, respectively.
FIG. 3 is a diagram showing the relationship between the minimum interface state density and substrate heating temperature of n-GaAs and Si3N4 films. 1...CVD equipment, 2...n-type Ga
A s board. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2

Claims (1)

【特許請求の範囲】[Claims] 化合物半導体基板を水素プラズマ中で200℃〜450
℃の温度で加熱して処理した後、前記半導体基板表面に
薄膜を形成することを特徴とする薄膜形成方法。
Compound semiconductor substrate in hydrogen plasma at 200°C to 450°C
A method for forming a thin film, comprising forming a thin film on the surface of the semiconductor substrate after heating and processing at a temperature of °C.
JP11111684A 1984-05-31 1984-05-31 Thin film forming method Pending JPS60254621A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11111684A JPS60254621A (en) 1984-05-31 1984-05-31 Thin film forming method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11111684A JPS60254621A (en) 1984-05-31 1984-05-31 Thin film forming method

Publications (1)

Publication Number Publication Date
JPS60254621A true JPS60254621A (en) 1985-12-16

Family

ID=14552819

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11111684A Pending JPS60254621A (en) 1984-05-31 1984-05-31 Thin film forming method

Country Status (1)

Country Link
JP (1) JPS60254621A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0321023A (en) * 1989-05-31 1991-01-29 Mitel Corp Manufacture including formation of spin-on-glass film and product manufactured through said manufacture
WO2002043115A3 (en) * 2000-11-24 2002-08-22 Asm Inc Surface preparation prior to deposition
US6960537B2 (en) 2001-10-02 2005-11-01 Asm America, Inc. Incorporation of nitrogen into high k dielectric film
US8557702B2 (en) 2009-02-02 2013-10-15 Asm America, Inc. Plasma-enhanced atomic layers deposition of conductive material over dielectric layers

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0321023A (en) * 1989-05-31 1991-01-29 Mitel Corp Manufacture including formation of spin-on-glass film and product manufactured through said manufacture
WO2002043115A3 (en) * 2000-11-24 2002-08-22 Asm Inc Surface preparation prior to deposition
US6613695B2 (en) 2000-11-24 2003-09-02 Asm America, Inc. Surface preparation prior to deposition
US6958277B2 (en) 2000-11-24 2005-10-25 Asm America, Inc. Surface preparation prior to deposition
US7056835B2 (en) 2000-11-24 2006-06-06 Asm America, Inc. Surface preparation prior to deposition
US7476627B2 (en) 2000-11-24 2009-01-13 Asm America, Inc. Surface preparation prior to deposition
US6960537B2 (en) 2001-10-02 2005-11-01 Asm America, Inc. Incorporation of nitrogen into high k dielectric film
US7405453B2 (en) 2001-10-02 2008-07-29 Asm America, Inc. Incorporation of nitrogen into high k dielectric film
US7569284B2 (en) 2001-10-02 2009-08-04 Asm America, Inc. Incorporation of nitrogen into high k dielectric film
US8557702B2 (en) 2009-02-02 2013-10-15 Asm America, Inc. Plasma-enhanced atomic layers deposition of conductive material over dielectric layers
US9466574B2 (en) 2009-02-02 2016-10-11 Asm America, Inc. Plasma-enhanced atomic layer deposition of conductive material over dielectric layers

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