JPS60247760A - Data communication system - Google Patents

Data communication system

Info

Publication number
JPS60247760A
JPS60247760A JP59102522A JP10252284A JPS60247760A JP S60247760 A JPS60247760 A JP S60247760A JP 59102522 A JP59102522 A JP 59102522A JP 10252284 A JP10252284 A JP 10252284A JP S60247760 A JPS60247760 A JP S60247760A
Authority
JP
Japan
Prior art keywords
communication
signal
opposite station
adapter
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59102522A
Other languages
Japanese (ja)
Inventor
Sadao Mukoyama
向山　貞夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP59102522A priority Critical patent/JPS60247760A/en
Publication of JPS60247760A publication Critical patent/JPS60247760A/en
Pending legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4286—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a handshaking protocol, e.g. RS232C link

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)

Abstract

PURPOSE:To cope with communication abnormality due to a temporary deterioration in processing ability by providing an automatic recovery program which informing the communication control part of the opposite station computer of communication abnormality when it is detected and restarts communication processing after the initialization time of the opposite side. CONSTITUTION:If there is no answer signal 13 or abnormal received code from the opposite station in a transmission state, the automatic recovery program performs resending processing up to N times and when a failure in the continuation of communication is still caused, it is recognized that communication abnormality occurs and an adapter 10 is initialized. At the same time, a normal signal 14 is turned off and a terminal RTS is held at ''0'' to inform the opposite station of the communication abnormality through a terminal DCD of the opposite station. Then, a normal signal 14 is outputted from the terminal TRS again after the time required by the opposite station for initialization. Consequently, normal transmission and reception processing is restarted. On the other hand, the adapter 10 of the opposite station which receives an abnormal signal 15 sends out an interruption signal 11 to inform the result to an arithmetic part, and the arithmetic part initializes the adapter 10 and allow normal transmission and reception processing again.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は、コンピュータ間でデータの通信を行なうデー
タ通信システムに関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a data communication system for communicating data between computers.

〔発明の背景〕[Background of the invention]

コンピュータ間でデータ通信を行なうデータ通信システ
ムは、例えば、特開昭５８−２１４９５９号公報、特開
昭５８−２１７０６９号公報、特開昭５８−２１７０７
０号公報などに開示されるごとく、よく知られている３
゜ さて、送受信線のみにより通信を行なう全二重通信シス
テムにおいては、通信異常をソフト的に検出することは
できても相手方に異常を知らせ、自動的に回復すること
ができなかった。Data communication systems for performing data communication between computers are disclosed in, for example, Japanese Patent Application Laid-Open No. 58-214959, Japanese Patent Application Laid-Open No. 58-217069, and Japanese Patent Application Laid-Open No. 58-21707.
As disclosed in Publication No. 0, etc., the well-known 3
Now, in a full-duplex communication system in which communication is carried out only through transmitting and receiving lines, it is possible to detect a communication abnormality using software, but it is not possible to notify the other party of the abnormality and recover automatically.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、コンピュータ間のデータ通信における
一時的な処理能力低下による通信異常に対し、自動的に
異常回復を行なう機能を行なうデータ通信システムを提
供することである。SUMMARY OF THE INVENTION An object of the present invention is to provide a data communication system that automatically performs a function of recovering from a communication abnormality due to a temporary decrease in processing capacity in data communication between computers.

〔発明の概要〕[Summary of the invention]

本発明は、相手コンピュータが何等かの都合でデータを
受信しない場合、相手方に異常信号を出力し、相手方の
初期化プログラムを起動させ、自局側では初期化に要す
る時間を経た後で通信を再開させるようにしている。In the present invention, when the other party's computer does not receive data for some reason, it outputs an abnormality signal to the other party, starts the initialization program of the other party, and after the time required for initialization has elapsed, the local station resumes communication. I'm trying to restart it.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の実施例を第１図〜第６図を用いて説明す
る。第１図はマイクロコンピュータ間でデータの通信を
行なうデータ通信システム例を示す図である。すなわち
、８はマイクロコンピュータであり、それぞれ通信制御
部６を備えており、この通信制御部６を介してそれぞれ
のマイクロコンピュータが電気通信的に接続されている
。コンピュータ８は、通信制御部６をそれぞれプログラ
ム制御して相互のデータ交換を行なう。Embodiments of the present invention will be described below with reference to FIGS. 1 to 6. FIG. 1 is a diagram showing an example of a data communication system for communicating data between microcomputers. That is, 8 is a microcomputer, each of which is provided with a communication control section 6, and the respective microcomputers are electrically connected via this communication control section 6. The computer 8 controls each communication control section 6 by program to exchange data with each other.

第２図は、第１図におけるマイクロコンピュータ８の内
部構成を示すブロック図である。この図において、■は
プログラムを実行する演算部、２はプログラムを記憶す
る記憶部、３はプログラム実行時に必要なデータを記憶
する記憶部、４は外部の信号を取込むための入力部、５
は外部に信号を出力するための出力部である。６は他の
コンピュータとのデータ通信を行なうための通信制御部
であり、７は各機器間を結ぶシステムバスである。FIG. 2 is a block diagram showing the internal configuration of the microcomputer 8 in FIG. 1. In this figure, ■ is an arithmetic unit that executes the program, 2 is a storage unit that stores the program, 3 is a storage unit that stores data necessary when executing the program, 4 is an input unit that takes in external signals, and 5
is an output section for outputting a signal to the outside. 6 is a communication control unit for performing data communication with other computers, and 7 is a system bus that connects each device.

第３図は、通信制御部６を具体的に示した内部構成図で
ある。この図において、９はデータバス、１０は通信用
アダプタである。このアダプタとしては、■日立製作所
膜のＬＳＩ型式番号ＨＤ６８５０で、ｉ称ＡｃＩＡ（ア
シンクロナス・コミュニケーション・インターフェース
・アダプタの略）と呼ばれているＬＳＩが使用できる。FIG. 3 is an internal configuration diagram specifically showing the communication control section 6. As shown in FIG. In this figure, 9 is a data bus, and 10 is a communication adapter. As this adapter, an LSI manufactured by Hitachi, Ltd. with model number HD6850 and called i-name AcIA (abbreviation for asynchronous communication interface adapter) can be used.

１０’はデコーダである。通信用アダプタｌｏは、デコ
ーダ１０’を介して選択され、直列信号の送受信を行な
う。送受信完了時には、割込み信号１１により演算部ｌ
に知らせる。認は送信信号、１３は受信信号、１４は正
常信号、１５は異常信号である。なお、アダプタ１ｏに
おいて、ＴＸＤは送信端子、ＲｘＤは受信端子、ＲＴＳ
は正常時に″１″信号を出力する端子、ＤＣＤは異常信
号を入力する端子、Ｄｏ−Ｄ、は８ビツトのデータ入力
端子、ＩＲＱは割込信号を出力する端子である。10' is a decoder. Communication adapter lo is selected via decoder 10' and transmits and receives serial signals. When the transmission/reception is completed, the interrupt signal 11 causes the arithmetic unit l to
Let me know. 13 is a received signal, 14 is a normal signal, and 15 is an abnormal signal. In addition, in adapter 1o, TXD is a transmitting terminal, RxD is a receiving terminal, RTS
is a terminal that outputs a "1" signal during normal operation, DCD is a terminal that inputs an abnormal signal, Do-D is an 8-bit data input terminal, and IRQ is a terminal that outputs an interrupt signal.

第４図は第１図における通信制御部６同士の接続の様子
を示したものである。図から明らかなように、ＴＸＤ端
は相手のＲｘＤ端と接続され、ＲＴＳは相手のＤＣＤに
接続されている。したがって、相互にデータを送受信す
ることができ、また相手に異常信号１５を連絡すること
ができる。FIG. 4 shows how the communication control units 6 in FIG. 1 are connected to each other. As is clear from the figure, the TXD end is connected to the RxD end of the other party, and the RTS is connected to the DCD of the other party. Therefore, data can be exchanged with each other, and the abnormality signal 15 can be communicated to the other party.

第５図は正常に送受信を行なっている場合のタイミング
チャートである。マイクロコンピュータ８の電源１６が
オンされると、アダプタ１０が初期化され、同時に正常
信号がＲＴ８端子から出力される。双方のＲＴ８端子か
ら正常信号が出力されると、その後データ通信が行なわ
れる。FIG. 5 is a timing chart when transmission and reception are performed normally. When the power supply 16 of the microcomputer 8 is turned on, the adapter 10 is initialized and at the same time a normal signal is output from the RT8 terminal. When normal signals are output from both RT8 terminals, data communication is performed thereafter.

第６図は通信具・常発生時のタイミングチャートである
。第５図の場合と同様に初期化をした後、送信状態にお
いて相手局から応答信号（受信信号）１３がなかったか
、あるいは異常な受信コードが返送されてきた場合、Ｎ
回までの再送処理を行なう。FIG. 6 is a timing chart when the communication device normally occurs. After initialization in the same way as in the case of Fig. 5, if there is no response signal (reception signal) 13 from the other station in the transmitting state or an abnormal reception code is returned, N
The retransmission process is performed up to the maximum number of times.

それでも通信が継続できなくなると通信異常と認識し、
アダプタ１０を初期化する。これと同時に正常信号１４
をオフし、相手局に通信異常を連絡する。If communication is still unable to continue, it is recognized as a communication error, and
Initialize the adapter 10. At the same time, normal signal 14
turn off and notify the other station of the communication error.

これは、ＲＴＳ端子を”　ｏ　”とすることにより、相
手のＤＣＤ端子を介して相手局に連絡できる。その後、
一定の時間１７（相手局の初期化に要する時間）経過し
て再び正常信号１４をＲＴＳ端子から出力する。これに
より、通常の送受信処理が再開される。一方、異常信号
すを受信した相手局のアダプタ１０は、割込信号１１を
発し演算部ｌに知らせる。By setting the RTS terminal to "o", it is possible to contact the other station via the other party's DCD terminal. after that,
After a certain period of time 17 (time required for initialization of the partner station) has elapsed, the normal signal 14 is outputted from the RTS terminal again. As a result, normal transmission and reception processing is resumed. On the other hand, the adapter 10 of the partner station, which has received the abnormal signal, issues an interrupt signal 11 to notify the arithmetic unit l.

演算部ｌはこれを受けて、アダプタ１ｏを初期化し、再
び通常の送受信処理を可能にする。In response to this, the calculation unit 1 initializes the adapter 1o and enables normal transmission and reception processing again.

第７図は異常時における概略処理フローを示す図である
。第７図において、Ｐｌで示される処理を行なうプログ
ラムを自動回復プログラム、Ｐ２で示される処理を行な
うプログラムを初期化プログラムと呼ぶことにする。第
１図におけるマイクロコンピュータ８のそれぞれは、こ
のＰｌおよびＰ２が内部のメモリ２に実装されている。FIG. 7 is a diagram showing a schematic processing flow in the event of an abnormality. In FIG. 7, the program that performs the processing indicated by Pl will be referred to as an automatic recovery program, and the program that performs the processing indicated by P2 will be referred to as an initialization program. In each of the microcomputers 8 in FIG. 1, Pl and P2 are implemented in the internal memory 2.

いま、Ａ局側のマイクロコンピュータ８が第６図に示し
た如き状態で通信異常を検出したとすると、この異常検
出によりプログラムＰ１の処理がスタートする。すなわ
ち、自局の送受信処理を一時中断（ステップＦ１）し、
自局の通信用アダプタ１０を初期化する。そして、正常
信号１４をオフし、相手局（Ｂ局）に異常信号１５を出
力する（ステップＦ３）。この異常信号１５はＢ局の通
信用アダプタ１゜に入力され、°このアダプタ１０がこ
の信号に基づき割込信号１１を出力する。つまりＩＲＱ
端子電圧を０”にする。これによって、Ｂ局のマイクロ
コンピュータ８は、異常を検出することができる。これ
によりＢ局側でプログラムＰ２の処理がスタートする。Now, suppose that the microcomputer 8 on the A station side detects a communication abnormality in the state shown in FIG. 6. Upon detection of this abnormality, the processing of the program P1 is started. That is, the transmission and reception processing of the own station is temporarily suspended (step F1),
Initialize the communication adapter 10 of your own station. Then, the normal signal 14 is turned off and the abnormal signal 15 is output to the other station (station B) (step F3). This abnormality signal 15 is input to the communication adapter 1 of the B station, and the adapter 10 outputs an interrupt signal 11 based on this signal. In other words, IRQ
The terminal voltage is set to 0''. This allows the microcomputer 8 of the B station to detect an abnormality. This causes the B station to start processing the program P2.

さて、Ａ局側では、異常を相手局に′知らせた後、相手
局の初期化に要する時間を待ち（ステップＦ４）、その
後ＲＴＳ端子を１”にし、正常信号１４を相手局に出力
（ステップＦ５）し、通信処理を再開する。Ｂ局側では
、異常信号を検出（ステップＦｌｌ）Ｌ／たことにより
、自局の送受信処理を一時中断（ステップＦ１２）Ｌ、
通信用アダプタ１０を初期化して再開に備える（ステッ
プＦ１３）。Now, on the A station side, after notifying the other station of the abnormality, it waits for the time required for the other station to initialize (step F4), and then sets the RTS terminal to 1" and outputs the normal signal 14 to the other station (step F4). F5) and restarts the communication process.Since the B station detects an abnormal signal (step Fll), it temporarily suspends its own transmission and reception process (step F12).
The communication adapter 10 is initialized to prepare for restart (step F13).

つまり、それぞれのアダプタ１０を初期化し、通信可能
状態とする。このようにして、コンピュータ間のデータ
通信が可能となる。上述の説明は、Ａ局側のコンピュー
タ８が通信異常を検出した場合の処理について述べたが
、Ｂ局側のコンピュータ８が異常を検出した場合にも同
様の処理となる。That is, each adapter 10 is initialized and placed in a communicable state. In this way, data communication between computers is possible. The above description deals with the processing when the computer 8 on the A station side detects a communication abnormality, but the same processing occurs when the computer 8 on the B station side detects an abnormality.

この場合には、プログラムＰ１を実行するのはＢ局側の
コンピュータ８であり、プログラムＰ２を実行するのは
Ａ局側のコンピュータ８である。In this case, the computer 8 on the B station side executes the program P1, and the computer 8 on the A station side executes the program P2.

なお、コンピュータ８のいずれかが故障しているような
場合におけるテ゛−タ通信の異常の場合には、このよう
な方法によってもデータ通信の再開は不可能である。し
かし、この場合には、異常を検出した側のコンピュータ
８がプログラムＰ１を実行した後、データ通信（送信）
を行ない、再び異常を検出することによって、相手側コ
ンピュータ８のダウンを認識することができる。Note that in the event of an abnormality in data communication, such as when one of the computers 8 is out of order, it is impossible to restart data communication even with this method. However, in this case, after the computer 8 on the side that detected the abnormality executes the program P1, the data communication (transmission)
By doing this and detecting an abnormality again, it is possible to recognize that the other party's computer 8 is down.

この実施例によれば、コンピュータ８が異常ではないが
、一時的にテ゛−タ通信の処理能力低下があるような場
合、例えば他の重要度の高い処理を実行中に相手からの
データ伝送があり相手に応答できないような場合などに
おいて、コンピュータ間の通信が自動的に再開できる。According to this embodiment, when the computer 8 is not abnormal but there is a temporary decline in data communication processing capacity, for example, data transmission from the other party is interrupted while executing other highly important processing. Communication between computers can be automatically resumed in cases where the other party is unable to respond.

このような強制的とも言えるテ゛−タ通信の再開は、シ
ステム全体が複雑になり、機能分散を高度に進んだシス
テムにおいて、頻繁に起こる通信異常に基づくシステム
ダウン、あるいは機能低下を防（゛ことになり、システ
ムの信頼性を高める効果がある。Resuming data communication, which can be said to be forced, is necessary to prevent system failures or functional declines due to communication abnormalities that frequently occur in systems where the overall system is complex and functions are highly distributed. This has the effect of increasing system reliability.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、コンピュータ間の
データ通信における一時的な処理能力低下による通信異
常に対し、自動的に異常回復を行なうことができる。As described above, according to the present invention, it is possible to automatically recover from a communication abnormality due to a temporary decrease in processing capacity in data communication between computers.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はデータ通信システムの一例を示す図、第２図は
マイクロコノピユータの内部構成を示す図、第３図は通
信制御の内部構成を示す図、第４図は第１図における通
信制御部間の接続状態を示す図、第５図と＄６図は通信
のタイムチャートを示す図、第７図は異常時における処
理フローを示す図である。 １・・・・・・演算部、２．３・・・・・・記憶部、４
・・・・・入力部、５・・・・・・出力部、６・・・・
・・通信制御部、７・・・・・・システムパス、８・・
・・・マイクロコンピュータ、９・・データバス、１０
・・・・・・通信アダプタ、１０′・・・・・・デコー
ダ、１１・・・・・・割込信号、ｎ・・・・・・送信信
号、１３・・・・・受信信号、１４・・・・・・正常信
号、１５・・・・・・異常信号才２図 才１図Figure 1 is a diagram showing an example of a data communication system, Figure 2 is a diagram showing the internal configuration of a microcomputer, Figure 3 is a diagram showing the internal configuration of communication control, and Figure 4 is a diagram showing the communication in Figure 1. FIG. 5 and FIG. 6 are diagrams showing a communication time chart, and FIG. 7 is a diagram showing a processing flow in the event of an abnormality. 1... Arithmetic unit, 2.3... Memory unit, 4
...Input section, 5...Output section, 6...
...Communication control unit, 7...System path, 8...
...Microcomputer, 9...Data bus, 10
...Communication adapter, 10'...Decoder, 11...Interrupt signal, n...Transmission signal, 13...Reception signal, 14・・・・・・Normal signal, 15・・・Abnormal signal 2 figures 1 figure

Claims (1)

【特許請求の範囲】[Claims] １、　コンピュータ間でデータの通信を行なうデータ通
信システムにおいて、それぞれのコンピュータには相手
とのデータ通信を行なうための通信制御部を備え、通信
異常を検出したとき相手のコンピュータに通信異常を連
絡すると共に、相手のコンピュータの通信制御部の初期
化時間経過後に通信処理を再開させる自動回復プログラ
ムをそれぞれのコンピュータに実装し、該通信異常の連
絡を受けたとき自局の通信制御部の初期化を行なう初期
プログラムをそれぞれのコンピュータに実装したことを
特徴とするテ′−タ通信システム。1. In a data communication system that communicates data between computers, each computer is equipped with a communication control unit for communicating data with the other computer, and when a communication abnormality is detected, it notifies the other computer of the communication abnormality. At the same time, an automatic recovery program is installed on each computer that restarts the communication process after the initialization time of the communication control unit of the other party's computer has passed, and when the communication abnormality is notified, the communication control unit of the own station is initialized. 1. A data communication system characterized in that an initial program to be executed is implemented in each computer.
JP59102522A 1984-05-23 1984-05-23 Data communication system Pending JPS60247760A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59102522A JPS60247760A (en) 1984-05-23 1984-05-23 Data communication system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59102522A JPS60247760A (en) 1984-05-23 1984-05-23 Data communication system

Publications (1)

Publication Number Publication Date
JPS60247760A true JPS60247760A (en) 1985-12-07

Family

ID=14329668

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59102522A Pending JPS60247760A (en) 1984-05-23 1984-05-23 Data communication system

Country Status (1)

Country Link
JP (1) JPS60247760A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62179116A (en) * 1986-02-03 1987-08-06 Canon Inc Semiconductor manufacturing equipment
JPS63229555A (en) * 1987-03-19 1988-09-26 Fujitsu Ltd Recovering system for abnormality of communication
US7120846B2 (en) 1999-12-14 2006-10-10 Fujitsu Limited Data transmission device, data receiving device, data transfer device and method

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62179116A (en) * 1986-02-03 1987-08-06 Canon Inc Semiconductor manufacturing equipment
JPH0587007B2 (en) * 1986-02-03 1993-12-15 Canon Kk
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