JPS60189379A - Solid-state image pickup device - Google Patents
Solid-state image pickup deviceInfo
- Publication number
- JPS60189379A JPS60189379A JP59044355A JP4435584A JPS60189379A JP S60189379 A JPS60189379 A JP S60189379A JP 59044355 A JP59044355 A JP 59044355A JP 4435584 A JP4435584 A JP 4435584A JP S60189379 A JPS60189379 A JP S60189379A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- type
- photoelectric conversion
- signal
- amorphous silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は信号サンプリング領域と信号走査回路部を有す
る半導体基板あるいは絶縁性基板上に光電変換層を積層
結合した固体撮像装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a solid-state imaging device in which a photoelectric conversion layer is laminated and bonded on a semiconductor substrate or an insulating substrate having a signal sampling area and a signal scanning circuit section.
従来例の構成とその問題点
近年光電変換層を信号走査領域の上に積層した光電変換
装置は、集積度、光信号の開口率あるいは集光波長の最
適化等の点で特に光電膜積層型固体撮像装置として脚光
を浴びてきている。Conventional configurations and their problems In recent years, photoelectric conversion devices in which a photoelectric conversion layer is laminated on a signal scanning region have been developed using a photoelectric film lamination type in particular in terms of integration degree, aperture ratio of optical signals, or optimization of condensed wavelength. It has been attracting attention as a solid-state imaging device.
以下管に光電変換装置の一例として光電膜積層型固体撮
像装置について説明する。A photoelectric film stacked solid-state imaging device will be described below as an example of a photoelectric conversion device.
第１図は従来の２相駆動ＣＣＤ走査光電膜積層型固体撮
像装置の２絵素の断面構造図を示すものであり、１はＰ
型半導体基板である。２は２相駆動ＣＯＤ信号電荷走査
ライン、３は信号サンプリング領域、４は信号読み込み
ゲート領域、５はチャンネルストッパー、ｅは２相駆動
ＣＣＤ転送電極、７は結合配線多結晶シリコン、８は集
光用の３ 任゛
金属電極、９は光電変換層であり１０は透明電極である
。FIG. 1 shows a cross-sectional structural diagram of two pixels of a conventional two-phase drive CCD scanning photoelectric film stacked solid-state imaging device.
type semiconductor substrate. 2 is a two-phase drive COD signal charge scanning line, 3 is a signal sampling area, 4 is a signal reading gate area, 5 is a channel stopper, e is a two-phase drive CCD transfer electrode, 7 is a coupling wiring polycrystalline silicon, 8 is a light condenser 3 is an arbitrary metal electrode, 9 is a photoelectric conversion layer, and 10 is a transparent electrode.
以上のように構成された従来の２相駆動ＣＣＤ走査光電
膜積層型固体撮像装置について以下その動作について説
明する。The operation of the conventional two-phase drive CCD scanning photoelectric film stacked solid-state imaging device constructed as described above will be described below.
光の入射により光電変換層９で発生する信号電荷Ｑｓｉ
ｇは透明電極１ｏと金属電極８０間の初期設定電界によ
るドリフトフィールドにより金属電極８に集められ、更
に結合配線多結晶シリコン７をへて信号ザンプリング領
域３に蓄積され、２相駆動ＣＯＤ信号電荷走査ライン２
により転送出力される。Signal charge Qsi generated in the photoelectric conversion layer 9 due to the incidence of light
g is collected on the metal electrode 8 by the drift field caused by the initial setting electric field between the transparent electrode 1o and the metal electrode 80, and further passes through the coupling wiring polycrystalline silicon 7 and is accumulated in the signal sampling region 3, and is used for two-phase drive COD signal charge scanning. line 2
It is transferred and output by.
しかしながら上記の構成に於て、光電変換層９は複数個
の金属電極８の上の全面にＺｎ５ｅの高抵抗ｎ型層を堆
積し次でＰ型ＺｎＣｄＴｅの感光層を形成し、この２層
へテロ接合により光電変換をおこなっており、複数個の
二次元配置をもつ金属電極８の互々に対応する光信号の
横方向分離のためにｎ型Ｚｎ５ｅ層は１０’Ｊｃｍ程度
の高い抵抗層である必要がある。また感光層内での光信
号の横方向拡散を防ぐためにＰ型ＺｎＣｄＴｅ層も１０
Ｑｃ１ｎ以上の高抵抗であるため、結果として光信号
を全て有効に金属電極８に収集するためには高いドリフ
ト電界が必要となり、光電変換層９の駆動電圧が高くな
る。このため半導体基板上の信号電荷サンプリング領域
３の電位を高く設定することが不可欠となり、半導体信
号走査部のリーク電流の増大によるＳ／Ｎ比の低下およ
び近年のＩＣ低消費電力化の傾向とも相入れない大きな
問題を有する。However, in the above structure, the photoelectric conversion layer 9 is formed by depositing a high-resistance n-type layer of Zn5e on the entire surface of the plurality of metal electrodes 8, then forming a photosensitive layer of P-type ZnCdTe, and then depositing the photosensitive layer on these two layers. Photoelectric conversion is performed by a terojunction, and the n-type Zn5e layer is a high resistance layer of about 10'Jcm in order to horizontally separate the optical signals corresponding to the plurality of metal electrodes 8 having a two-dimensional arrangement. There needs to be. In addition, a P-type ZnCdTe layer of 10
Since the resistance is as high as Qc1n or more, a high drift electric field is required in order to effectively collect all optical signals on the metal electrode 8, and the driving voltage of the photoelectric conversion layer 9 becomes high. For this reason, it is essential to set the potential of the signal charge sampling region 3 on the semiconductor substrate high, which is compatible with the decrease in the S/N ratio due to the increase in leakage current in the semiconductor signal scanning section and the recent trend toward lower IC power consumption. I have a big problem that I can't get into.
発明の目的
本発明は上記従来の問題点を解消するもので、信号電荷
サンプリング領域と信号電荷走査手段を半導体活性領域
に形成した半導体基板あるいは絶縁性基板上に光電変換
層を積層した高感度高集積低電圧駆動の固体撮像装置を
提供することを目的とする。OBJECTS OF THE INVENTION The present invention solves the above-mentioned problems of the conventional technology. An object of the present invention is to provide an integrated low-voltage driven solid-state imaging device.
発明の構成
本発明は信号サンプリング領域と信号走査部を有する半
導体基板あるいは絶縁性基板と、これに積層されたる光
電変換部を備えた光電変換装置であり、前期信号サンプ
リング領域またそれ自身と近傍の光電変換部が他の光電
変換部領域の半導体伝導型と異なる構造をもち、局部的
な半導体接合により低電圧で高解像度の効果をうろこと
ができるものである。Structure of the Invention The present invention is a photoelectric conversion device comprising a semiconductor substrate or an insulating substrate having a signal sampling region and a signal scanning section, and a photoelectric conversion section laminated thereon. The photoelectric conversion section has a structure different from the semiconductor conduction type of other photoelectric conversion section regions, and the local semiconductor junction allows high resolution effects to be achieved at low voltage.
実施例の説明
第２図は本発明の第１の実施例における光電変換装置の
単位絵素の断面図を示すものである。第２図において、
１はＰ型半導体基板、２は２相駆動ＣＣＤ信号電荷走査
ライン、３は信号電荷サンプリング領域、４は信号読み
込みゲート領域、６はチャンネルストッパー、６は２相
駆動ＣＣＤ転送電極、７は結合配線多結晶シリコン、８
は集光用の金属電極、９はｎ型非晶質シリコン部、１０
はｉ型非晶質シリコン層、１１はＰ型非晶質シリコン層
、１２は透明電極であり、光電変換部は一例として非晶
質シリコンを上げる。DESCRIPTION OF EMBODIMENTS FIG. 2 shows a cross-sectional view of a unit pixel of a photoelectric conversion device according to a first embodiment of the present invention. In Figure 2,
1 is a P-type semiconductor substrate, 2 is a two-phase driving CCD signal charge scanning line, 3 is a signal charge sampling area, 4 is a signal reading gate area, 6 is a channel stopper, 6 is a two-phase driving CCD transfer electrode, 7 is a coupling wiring Polycrystalline silicon, 8
9 is a metal electrode for focusing light, 9 is an n-type amorphous silicon portion, 10 is
11 is an i-type amorphous silicon layer, 11 is a p-type amorphous silicon layer, and 12 is a transparent electrode, and the photoelectric conversion section is made of amorphous silicon as an example.
光電変換部の局部的な半導体接合の形成のためには比抵
抗１０’ｚ 以下のｎ型非晶質シリコン９を全面に形成
した後に金属電極８より少し大きい６、、、ｙ
パターンを出しエツチング処理を行い局部的なｎ型非晶
質シリコン部を形成する。次いで比抵抗１ｏ８Ωα程度
のｉ型およびＰ型非晶質シリコン層１０．１１を連続堆
積する。この時ｎ型とｉ型の界面に存在する自然酸化膜
等は非晶質シリコン堆積装置と結合をもってなる高周波
スパッタ装置等でエツチング処理を行い、スパッタダメ
ージ等は水素プラズマアニール等により回復させること
が可能である。In order to form a local semiconductor junction in the photoelectric conversion section, n-type amorphous silicon 9 with a specific resistance of 10'z or less is formed on the entire surface, and then a 6,...y pattern slightly larger than the metal electrode 8 is formed and etched. A treatment is performed to form local n-type amorphous silicon portions. Next, i-type and P-type amorphous silicon layers 10 and 11 having a specific resistance of about 108 Ωα are successively deposited. At this time, the natural oxide film existing at the interface between the n-type and i-type is etched using a high-frequency sputtering device coupled with an amorphous silicon deposition device, and sputter damage can be recovered by hydrogen plasma annealing. It is possible.
以上のように構成された本実施例の光電変換装置につい
て以下その動作を説明する。The operation of the photoelectric conversion device of this embodiment configured as described above will be described below.
第３図は光信号の動きを概念的に示すもので、ａ図は素
子の断面図、ｂ図はその半導体ノくンドモデルを表し、
１は半導体基板、８は集光用の金属電極を示し、第２図
の半導体上の走査回路は省略しである。次に９はｎ型非
晶質シリコン部、１０はｉ型非晶質シリコン層、１１は
Ｐ型非晶質シリコン層、１２は透明電極であり、１３は
入射光℃によって発生した信号電荷である。光ｆにより
発生する信号電荷１３は透明電極１２に印加される７・
に 、〜
電位によるドリフト電界Ｅ１ と、局部的Ａｎ型非晶質
シリコン部９とｉ型非晶質シリコン層１ｏの接合による
ビルトイン電圧による電界Ｅ２により各々の金属電極８
への力を受ける。即ち、第３図すのように局部的な接合
による部分的な電位ポケットが存在することになり、金
属電極８間の電気的分離が可能となり光信号の横方向へ
の拡散が折制された従来例のように横方向分離のだめの
比抵抗１ｏＱｃｒｎ程度の高抵抗層が不必要となる。Figure 3 conceptually shows the movement of an optical signal, where figure a is a cross-sectional view of the element, figure b is its semiconductor model,
Reference numeral 1 indicates a semiconductor substrate, 8 indicates a metal electrode for focusing light, and the scanning circuit on the semiconductor shown in FIG. 2 is omitted. Next, 9 is an n-type amorphous silicon part, 10 is an i-type amorphous silicon layer, 11 is a P-type amorphous silicon layer, 12 is a transparent electrode, and 13 is a signal charge generated by the incident light °C. be. The signal charge 13 generated by the light f is applied to the transparent electrode 12.
To, each metal electrode 8 is caused by a drift electric field E1 due to the electric potential and an electric field E2 due to a built-in voltage due to the junction between the local An-type amorphous silicon portion 9 and the i-type amorphous silicon layer 1o.
Receive the power to. In other words, as shown in Figure 3, a partial potential pocket exists due to local junctions, making it possible to electrically separate the metal electrodes 8 and suppress the lateral diffusion of the optical signal. Unlike the conventional example, a high resistance layer with a specific resistance of about 1oQcrn for lateral separation is unnecessary.
以上のように本実施例によれば、局部的な比抵抗１０９
ｍ以下のｎ型非晶質シリコン部をｎ型非晶質シリコンの
パターニングにより設けることにより、局部的半導体接
合が形成され光信号の横方向分離のための高抵抗層を設
けることなく接合ビルトイン電圧による横方向の絵素分
離を容易におこなえ、光電変換層を解像度をおとすこと
なく低電圧で駆動することが可能となり、走査回路を有
する半導体基板あるいは絶縁基板の低電圧化によりＳ／
Ｎ比の改善ならびに低消費電力化もおこなうことができ
る。As described above, according to this embodiment, the local resistivity 109
By patterning n-type amorphous silicon to form an n-type amorphous silicon region of less than m, a local semiconductor junction is formed and the junction built-in voltage can be reduced without providing a high-resistance layer for lateral separation of optical signals. It is now possible to easily separate picture elements in the lateral direction, and the photoelectric conversion layer can be driven at low voltage without reducing resolution.
It is also possible to improve the N ratio and reduce power consumption.
なお実施例においてｎ型非晶質シリコン部９はｎ型非晶
質シリコンを全面に堆積した後にパターニングにより局
部的に形成しているが、ｎ型非晶質シリコン部９はｎ型
多結晶シリコンをパターニングして形成するか、あるい
は更に水素化処理をほどこしたｎ型多結晶シリコンで形
成してもよい。In the embodiment, the n-type amorphous silicon portion 9 is formed locally by patterning after depositing n-type amorphous silicon on the entire surface, but the n-type amorphous silicon portion 9 is formed using n-type polycrystalline silicon. It may be formed by patterning or may be formed from n-type polycrystalline silicon which has been further hydrogenated.
また、ｎ型非晶質シリコン部９は集光用の金属電極８に
燐などのｎ型不純物をドープした後にｉ型非晶質シリコ
ンを堆積して、金属電極８からの拡散により局部的なｎ
型非晶質シリコン部を形成しても良い。In addition, the n-type amorphous silicon portion 9 is formed by doping the metal electrode 8 for condensing light with an n-type impurity such as phosphorus, and then depositing i-type amorphous silicon to form a localized area by diffusion from the metal electrode 8. n
A mold amorphous silicon portion may also be formed.
また実施例における結合配線多結晶シリコン７あるいは
集光用金属電極８は必ずしも必要ではなく、光電変換部
と信号電荷サンプリング領域３が結合をしていれば良い
。また実施例としてＣＣＤ２相駆動信号走査方式のもの
を例としたが、特にこの走査方式に限らずＭＯＳ型の信
号走査方式等の他のものでも良いことは言うまでもない
。Further, the coupling wiring polycrystalline silicon 7 or the condensing metal electrode 8 in the embodiment is not necessarily necessary, and it is sufficient if the photoelectric conversion section and the signal charge sampling region 3 are coupled. Furthermore, although the CCD two-phase drive signal scanning method was used as an example, it goes without saying that the scanning method is not limited to this, and other methods such as a MOS type signal scanning method may be used.
発明の効果
本発明の光電変換装置は信号電荷サンプリング９・ｉ
、＋
電極あるいは領域に接する光電変換層の部分のみがサン
プリング電極あるいは領域と同一の導電型をもち且つ絵
素ごとに分離されており、他の光電変換層の領域は前記
導電型以外の導電性を示す局部的な半導体接合をもって
なる光電変換層を信号走査回路上に積層することにより
、光信号の横方向分離のために高抵抗層を設けることな
く低電圧でしかも解像度の低下をきたすことなく集光率
の良い高感度低電圧駆動のＳ／Ｎの良い光電変換装置を
実現することができその実用的効果は太きい０Effects of the Invention The photoelectric conversion device of the present invention performs signal charge sampling 9.i
, + Only the portion of the photoelectric conversion layer in contact with the electrode or region has the same conductivity type as the sampling electrode or region and is separated for each picture element, and the other regions of the photoelectric conversion layer have conductivity of a conductivity type other than the above-mentioned conductivity type. By stacking a photoelectric conversion layer with localized semiconductor junctions on top of the signal scanning circuit, it is possible to perform lateral separation of optical signals at low voltage without providing a high-resistance layer and without deteriorating resolution. It is possible to realize a photoelectric conversion device with good light collection efficiency, high sensitivity, low voltage drive, and good S/N, and its practical effects are 0.
第１図は従来の固体撮像装置の２絵素の断面図、第２図
は本発明の一実施例における固体撮像装置の単位絵素の
断面図、第３図は光信号の動きの概念図であり、同図ａ
は素子断面図、同図すはその半導体バンドモデル図であ
る。
１・・・・・・半導体基板、９・・・・・・ｎ型非晶質
シリコン部、１ｏ・・・・・・ｌ型非晶質シリコン層、
１１・・・・・・Ｐ型非晶質シリコン層、１２・・・・
・・透明電極。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図
第２図Fig. 1 is a cross-sectional view of two picture elements of a conventional solid-state imaging device, Fig. 2 is a cross-sectional view of a unit pixel of a solid-state imaging device according to an embodiment of the present invention, and Fig. 3 is a conceptual diagram of the movement of an optical signal. , and the figure a
is a cross-sectional view of the device, and the same figure is a semiconductor band model diagram thereof. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 9... N-type amorphous silicon part, 1o... L-type amorphous silicon layer,
11... P-type amorphous silicon layer, 12...
...Transparent electrode. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2
Claims (2)
サンプリング電極あるいは領域と半導体活性領域に形成
した信号走査回路部を具備し、かつ前記信号サンプリン
グ電極あるいは領域と結合をもってなる光電変換層が局
部的な半導体接合により、おのおのの前記信号サンプリ
ング電極あるいは領域が絵素分離されてなる固体撮像装
置。(1) A semiconductor substrate or an insulating substrate is provided with a plurality of signal sampling electrodes or regions and a signal scanning circuit portion formed in a semiconductor active region, and a photoelectric conversion layer formed by coupling with the signal sampling electrodes or regions is locally formed. A solid-state imaging device in which each of the signal sampling electrodes or regions is separated into picture elements by a semiconductor junction.
極あるいは領域に接する前記光電変換層の部分のみが前
記信号サンプリング電極あるいは領域毎に分離されてお
り、かつ前記信号サンプリング電極あるいは領域と同一
の導電型（ｎ型又はｐａの導電性を示し比抵抗は１０４
Ω（７）以下でがっ他の光電変換層領域は前記導電型以
外の導電性を示すことを特徴とする特許請求の範囲第（
１）項記載の固体撮像装置。(2) In a local semiconductor junction, only the portion of the photoelectric conversion layer that is in contact with a signal charge sampling electrode or region is separated for each signal sampling electrode or region, and has the same conductivity as the signal sampling electrode or region. type (n-type or pa conductivity and specific resistance is 104
The other photoelectric conversion layer region exhibits conductivity of a conductivity type other than the above-mentioned conductivity type.
1) The solid-state imaging device described in section 1).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59044355A JPS60189379A (en) | 1984-03-08 | 1984-03-08 | Solid-state image pickup device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59044355A JPS60189379A (en) | 1984-03-08 | 1984-03-08 | Solid-state image pickup device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60189379A true JPS60189379A (en) | 1985-09-26 |
Family
ID=12689203
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59044355A Pending JPS60189379A (en) | 1984-03-08 | 1984-03-08 | Solid-state image pickup device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60189379A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001250935A (en) * | 1999-12-28 | 2001-09-14 | Xerox Corp | Amorphous silicon layer sensor and method of forming sensor |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5724171A (en) * | 1980-07-18 | 1982-02-08 | Matsushita Electric Ind Co Ltd | Solid state image sensor |
| JPS57106083A (en) * | 1980-12-23 | 1982-07-01 | Toshiba Corp | Amorphous silicon diode array |
| JPS57187976A (en) * | 1981-05-13 | 1982-11-18 | Matsushita Electric Ind Co Ltd | Semiconductor photoelectric converter |
-
1984
- 1984-03-08 JP JP59044355A patent/JPS60189379A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5724171A (en) * | 1980-07-18 | 1982-02-08 | Matsushita Electric Ind Co Ltd | Solid state image sensor |
| JPS57106083A (en) * | 1980-12-23 | 1982-07-01 | Toshiba Corp | Amorphous silicon diode array |
| JPS57187976A (en) * | 1981-05-13 | 1982-11-18 | Matsushita Electric Ind Co Ltd | Semiconductor photoelectric converter |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001250935A (en) * | 1999-12-28 | 2001-09-14 | Xerox Corp | Amorphous silicon layer sensor and method of forming sensor |
| JP2012199563A (en) * | 1999-12-28 | 2012-10-18 | Dpix Llc | Amorphous silicon layer sensor and method of forming sensor |
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