JPS60163508A - Optical reception circuit - Google Patents
Optical reception circuitInfo
- Publication number
- JPS60163508A JPS60163508A JP59018931A JP1893184A JPS60163508A JP S60163508 A JPS60163508 A JP S60163508A JP 59018931 A JP59018931 A JP 59018931A JP 1893184 A JP1893184 A JP 1893184A JP S60163508 A JPS60163508 A JP S60163508A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- transistor
- resistor
- current
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
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- Amplifiers (AREA)
- Optical Communication System (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の背景と目的〕
本発明は、光受信回路、特に温度、電源電圧の変化に対
する影響の少い安定な増幅特性を有する光受信回路に関
するものである。DETAILED DESCRIPTION OF THE INVENTION [Background and Objectives of the Invention] The present invention relates to an optical receiving circuit, and particularly to an optical receiving circuit having stable amplification characteristics that are less affected by changes in temperature and power supply voltage.
光受信器として使用される増ｌＩ＠器の一例を第１図に
示す。トランジスタＱ□のエミッタはダイオードＤ１傘
介して接地され、負荷抵抗Ｒ□と合わせてエミッタ接地
回路として動作する。トランジスタＱ２はコレクタ接地
（エミッタフォロワ）回路を粥成し、出力インピーダン
スを下げて、抵抗Ｒ２による帰還ループへの影響を小さ
くしている。An example of an intensifier used as an optical receiver is shown in FIG. The emitter of the transistor Q□ is grounded through the diode D1, and together with the load resistor R□, it operates as a common emitter circuit. Transistor Q2 forms a common collector (emitter follower) circuit, lowers the output impedance, and reduces the influence of resistor R2 on the feedback loop.
トランジスタＱ 、、 Ｑ 、１ダイオードＤ□抵抗Ｒ
□。Transistor Q,, Q, 1 diode D□Resistor R
□.
Ｒ２，Ｒ３からなる増幅部は、いわゆるトランスインピ
ーダンス形アンプを傅成し、世人出力インピーダンスの
ため、効率のよい電流／電圧変換回路として、受光素子
ＦＤと組合わされて、光受信回路に１吏用される。なお
、ダイオードＤ１は、出力′電位を上げて次段との接続
を行ない易くする働きがある。The amplification section consisting of R2 and R3 forms a so-called transimpedance type amplifier, and due to the ordinary output impedance, it is combined with the light receiving element FD as an efficient current/voltage conversion circuit, and is used as an optical receiving circuit. be done. Note that the diode D1 has the function of increasing the output potential to facilitate connection with the next stage.
いま、光入力レベルＰＩＮ の光が受光素子ＦＤに入射
すると、トランスインピーダンスアンプ１にはＬｔＮ
＝ＰＩＮＸη（但し、ηは光電変換係数）
の電流が流れ込み、次の出力電圧Ｖ。を発生する。Now, when light with an optical input level PIN enters the light receiving element FD, the transimpedance amplifier 1 has LtN.
= PINXη (where η is the photoelectric conversion coefficient) current flows into the next output voltage V. occurs.
Ｃ１
ＶＯ：ＶＢＥ１＋ｌ＋ｈＦＥＲ２−Ｉ／Ａ／×Ｒ２・・
・（１）ＶＢＥ；トランジスタＱ□のベース・エミッタ
間電圧、ＩＣ□；Ｑ□のコレクタ電流、
ｈＦＥ：トランジスタの電流増幅率（以下、全トランジ
スタのｈＦＥは同一と仮定する）
ＶＦ；ダイオードＤ□の順方向重圧降下、Ｉ Ｃ、−（
Ｖ ｃ ｃ （Ｖ ２＋ｌ’ ｏ） ）／７’ｈ”’（
２）ＥＥ
したがって、結局Ｖ。は次式に変侠さ°れる。C1 VO:VBE1+l+hFER2-I/A/×R2...
・(1) VBE: Voltage between the base and emitter of transistor Q□, IC□: Collector current of Q□, hFE: Current amplification factor of transistor (hFE of all transistors is assumed to be the same below) VF: Diode D□ Forward pressure drop, I C, -(
V c c (V 2+l'o) )/7'h"'(
2) EE Therefore, V after all. is transformed into the following equation.
−Ｉ／〜×Ｒ２・・・（６）
ところで、ＶＥＥ□、ＶＦ、ＶＢＥ ２は約−２ｍ Ｖ
／ ｄｅ ｇという大きな温度係数をもつので、Ｖ。-I/~×R2...(6) By the way, VEE□, VF, and VBE2 are approximately -2mV
Since it has a large temperature coefficient of / de g, V.
は温度による変化も大きく、また、市源市圧ＶＣＣの影
響もあり、直流的に次段と接続するのは、極めて雌かし
い状態であった。Since the temperature changes greatly, and there is also the influence of the city's municipal pressure, VCC, it is extremely unreasonable to connect it to the next stage using direct current.
したがって、従来は、次段との間にコンデンサを挿入し
、直流的な変動を除去して使用されるのが通例であった
。Therefore, in the past, it was customary to insert a capacitor between the device and the next stage to eliminate direct current fluctuations.
本発明の目的は、前記した従来技術の欠点を解消し、直
流接続しても温度、−源亀圧に対して安定な特性の増ｌ
陥回路を提供することにある。The purpose of the present invention is to eliminate the drawbacks of the prior art described above, and to increase the characteristics that are stable with respect to temperature and source pressure even when connected to DC.
The purpose is to provide a false circuit.
すなわち、本発明の要旨は、前記した増幅回路と同一構
成の回路を次段に使用し、両者の間を抵抗で結び、温度
変化に対して、安定な特性を実現するように抵抗の組合
わせを選定することにある。That is, the gist of the present invention is to use a circuit with the same configuration as the above-described amplifier circuit in the next stage, connect the two with a resistor, and combine the resistors so as to realize stable characteristics against temperature changes. The key is to select the
本発明光受信回路の一実施例を第２図に示す。 An embodiment of the optical receiver circuit of the present invention is shown in FIG.
従来技術で示した回路（トランスインピーダンス形アン
プ）１と同様の構成の回路２を抵抗Ｒ７Ｉを介して接続
している。A circuit 2 having the same configuration as the circuit (transimpedance type amplifier) 1 shown in the prior art is connected via a resistor R7I.
一段目の出力電圧Ｖ□は、光入力のない場合、（１）よ
りＰｔＮの項を無視すると、
ＩＣ□
Ｖｌ−ＶＢＥ１＋ＶＦ１＋ ｈＦＥ Ｒ２・・・（４）
トランジスタＱ３のベース電流ＩＢｓ（＝ＩＣｓ／ｈＦ
Ｅ）はＲ４を流れる電流Ｉ０とＲ６を流れる電流Ｉ２の
差であり、次式が成立する。The output voltage V□ of the first stage is, when there is no optical input and ignoring the PtN term from (1), IC□ Vl-VBE1+VF1+hFE R2...(4)
Base current IBs of transistor Q3 (=ICs/hF
E) is the difference between the current I0 flowing through R4 and the current I2 flowing through R6, and the following equation holds.
ＩＢ ３＝１２−Ｉ□
ここでＶ２−ＶＢＥ３＋ＶＦ ２を前照したうえで、（
４）もとめると次式になる。IB 3=12-I□ Here, after comparing V2-VBE3+VF 2, (
4) The following formula is obtained.
６
＋（１十−）（ＶＢＥ３＋Ｖ、２） ・・・（５）Ｒ４
Ｉ
ｑ；単位電荷、ｋ；ボルツマン定数、Ｔ；絶対温度、Ｉ
ｓ；逆方向飽和電流、ＩＣ；コレクタ電流、を利用する
と、次式が成立する。6 + (10-) (VBE3+V, 2) ... (5) R4
I q: unit charge, k: Boltzmann constant, T: absolute temperature, I
By using s: reverse saturation current and IC: collector current, the following equation is established.
ｋＴ ＩＣａ
ＶＢＥ３ ”ＥＥ”” 、 −ｔｎ ＩＣ１′また）Ｄ
ｌ）Ｄ２に流れる電流はそれぞれ、Ｑ□＋ Ｑ Ｂに流
れる電流と等しいので、上式と同様
これらを（５）式に代入すると
ここで、ｈＦＥは十分大きいので、Ｖ３の第１項は無視
でき、
となる。kT ICa VBE3 "EE"", -tn IC1'also) D
l) The currents flowing in D2 are each equal to the currents flowing in Q□+QB, so if you substitute these into equation (5) as in the above equation, here hFE is sufficiently large, so ignore the first term of V3. It is possible and becomes .
（８）式を温度Ｔで微分すると、 ・・・（９）となる。Differentiating equation (8) with respect to temperature T, we get ...(9).
成立するように選ぶと温度特性をキャンセルできる。If you choose it so that it holds true, you can cancel the temperature characteristics.
ここで−（１’ ＋ １’ ｐ ！＋） ＝ ２ ｍ
ｖ、／ ｒｈｇ。Here -(1' + 1' p !+) = 2 m
v,/rhg.
、Ｔ ＢＥ
ＩＣ３／ＩＣ１−５という代表的な値を代入すると、Ｅ
６／Ｒ４＝７．２４となり、実現可能々値である。, T BE IC3/IC1-5, and E
6/R4=7.24, which is a feasible value.
また、Ｒａ／Ｅ４は、２段目の電圧利得にほぼ一致する
ので、回路２は利得によって直流的な温度特性が変化す
る回路であり、約７倍の利得に選ぶと温度特性を無視で
きる回路とすることができる。Also, since Ra/E4 almost matches the voltage gain of the second stage, circuit 2 is a circuit whose direct current temperature characteristics change depending on the gain, and if a gain of about 7 times is selected, the temperature characteristics can be ignored. It can be done.
さらに、（８）式から明らかなように電源電圧に依存す
る項は、ＩＣ３／ＩＣ１だけであシ、ＩＣ工、ＩＣ８と
もに電源電圧が制くなると大きくなるという同じ傾向を
もつため、その比は電圧依存性が小さく、Ｖ３に電源電
圧に対しても安定な回路となる。Furthermore, as is clear from equation (8), the term that depends on the power supply voltage is only IC3/IC1, and both IC engineering and IC8 have the same tendency to increase as the power supply voltage becomes dominant, so the ratio is The circuit has low voltage dependence and is stable even with respect to the power supply voltage V3.
第２図の回路について、コンピュータによる詳細な解析
を行なったところ、Ｖ８の温度係数約０．１情τ／ ｄ
ｅσ、電圧依存性約０．１と安定な電圧を発生すること
が確認された。A detailed computer analysis of the circuit shown in Figure 2 revealed that the temperature coefficient of V8 was approximately 0.1 information τ/d.
It was confirmed that a stable voltage with eσ and voltage dependence of about 0.1 was generated.
変形例としては次のものが考えられる。Possible variations include the following.
（１）トランジスタＱ２と抵抗Ｒ３の間及びトランジス
タＱ４と抵抗Ｒ７の間に同一のダイオードまたは抵抗を
挿入しても、抵抗値のみの変更で同様の効果が期待でき
る。(1) Even if the same diode or resistor is inserted between the transistor Q2 and the resistor R3 and between the transistor Q4 and the resistor R7, the same effect can be expected by changing only the resistance value.
（２） Ｒ８＋ Ｒ７の抵抗は定電流源に変えても良い
。(2) R8+ The resistor R7 may be replaced with a constant current source.
以上のようにして成る本発明光受信回路は次の効果を有
するものであり、その工業的価値は非常に大々るものが
ある。The optical receiving circuit of the present invention constructed as described above has the following effects, and its industrial value is extremely large.
（１）受光素子と組合わせて使用する受信回路は、直流
的な温度ドリフトが大きく、次段との結合が難しかった
が、本発明によシ、温度ドリフトをキャンセルすること
ができるので、安定な増幅回路が実現できる。(1) The receiving circuit used in combination with the light receiving element has a large direct current temperature drift, making it difficult to connect it to the next stage.However, with the present invention, temperature drift can be canceled, making it stable. Amplifying circuits can be realized.
（２）本発明の回路は、はぼ同−栴成の回路を２段接続
しているうえに、コンデンサを使用していないので、集
積回路で栗現じやすく、また、特性に大きく影響するパ
ラメータは、抵抗の比率。(2) The circuit of the present invention connects two circuits of the same structure and structure, and does not use a capacitor, so it is easy to be integrated into an integrated circuit and has a large effect on the characteristics. The parameter is the resistance ratio.
トランジスタＶＢρ差なので、集積回路の特長を発揮で
きる。Since the transistor VBρ is different, the features of the integrated circuit can be exhibited.
第１図は従来の受信回路の一例を示す回路図、第２図は
本発明光受信回路の一実施例を示す回路図である。
１：光受信回路（プリアンプ）、
２；光受信回路（メインアンプ）。
Ｒ□〜Ｒ７；抵抗、Ｄ□、Ｄ、；ダイオード、Ｑ□〜Ｑ
４；トランジスタ、ＰＤ；受光素子、Ｉ□；Ｒ４を流れ
る電流、
Ｉ２；Ｒ６を流れる電流。
第 １１２１
第 ２ 目FIG. 1 is a circuit diagram showing an example of a conventional receiving circuit, and FIG. 2 is a circuit diagram showing an embodiment of the optical receiving circuit of the present invention. 1: Optical receiving circuit (preamplifier), 2: Optical receiving circuit (main amplifier). R□~R7; Resistance, D□, D,; Diode, Q□~Q
4: transistor, PD: light receiving element, I□: current flowing through R4, I2: current flowing through R6. 1121st 2nd
Claims (1)
た第２のトランジスタ回路とより成り、上記第１のトラ
ンジスタの入力端となるベースには人力信号となる受光
素子が接続されるようになっていると共に、第１のトラ
ンジスタのエミッタはダイオードを介して接地されると
共に、コレクタには負荷抵抗が接続されたエミッタ接地
回路となっておシ、一方、第２のトランジスタのコレク
タは電源電圧に接続され、出力端となるエミッタは負荷
抵抗を介して接地されていると共に抵抗を介して第１の
トランジスタのベースに接続され、又、ベースは第１の
トランジスタのコレクタに接続されコレクタ接地回路と
なって増幅回路を傅成しておシ、この増幅回路を二段縦
続し、第１の増幅回路の出力端と第２の増幅回路の入力
端を抵抗を介して接続して構成されたことを特徴とする
光受信回路。(1) Consists of a first transistor circuit and a second transistor circuit connected in cascade to the first transistor circuit, and a light receiving element that receives a human input signal is connected to the base that serves as the input terminal of the first transistor. In addition, the emitter of the first transistor is grounded via a diode, and the collector is connected to a load resistor, forming an emitter-grounded circuit.On the other hand, the collector of the second transistor is connected to the power supply voltage. The emitter, which serves as the output terminal, is connected to the ground through a load resistor and is also connected to the base of the first transistor through the resistor, and the base is connected to the collector of the first transistor, and the emitter is connected to the collector grounding circuit. The amplifier circuit was constructed by cascading two stages of the amplifier circuit, and connecting the output terminal of the first amplifier circuit and the input terminal of the second amplifier circuit through a resistor. An optical receiving circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59018931A JPS60163508A (en) | 1984-02-03 | 1984-02-03 | Optical reception circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59018931A JPS60163508A (en) | 1984-02-03 | 1984-02-03 | Optical reception circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60163508A true JPS60163508A (en) | 1985-08-26 |
| JPH0425724B2 JPH0425724B2 (en) | 1992-05-01 |
Family
ID=11985379
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59018931A Granted JPS60163508A (en) | 1984-02-03 | 1984-02-03 | Optical reception circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60163508A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06177664A (en) * | 1992-07-16 | 1994-06-24 | Nec Corp | Digital photoreception circuit, trans-impedance amplifier circuit and preamplifier circuit |
| US5525929A (en) * | 1993-11-24 | 1996-06-11 | Nec Corporation | Transimpedance amplifier circuit with feedback and load resistor variable circuits |
| JP2008306673A (en) * | 2007-06-11 | 2008-12-18 | Panasonic Corp | Amplification circuit |
| JP2009044684A (en) * | 2007-08-10 | 2009-02-26 | Panasonic Corp | Amplification circuit |
| JP2010028775A (en) * | 2008-07-24 | 2010-02-04 | Nec Electronics Corp | Light receiving amplifier circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58182906A (en) * | 1982-04-20 | 1983-10-26 | Hitachi Cable Ltd | Preamplifying circuit for optical receiver |
-
1984
- 1984-02-03 JP JP59018931A patent/JPS60163508A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58182906A (en) * | 1982-04-20 | 1983-10-26 | Hitachi Cable Ltd | Preamplifying circuit for optical receiver |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06177664A (en) * | 1992-07-16 | 1994-06-24 | Nec Corp | Digital photoreception circuit, trans-impedance amplifier circuit and preamplifier circuit |
| US5525929A (en) * | 1993-11-24 | 1996-06-11 | Nec Corporation | Transimpedance amplifier circuit with feedback and load resistor variable circuits |
| JP2008306673A (en) * | 2007-06-11 | 2008-12-18 | Panasonic Corp | Amplification circuit |
| JP2009044684A (en) * | 2007-08-10 | 2009-02-26 | Panasonic Corp | Amplification circuit |
| JP2010028775A (en) * | 2008-07-24 | 2010-02-04 | Nec Electronics Corp | Light receiving amplifier circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0425724B2 (en) | 1992-05-01 |
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