JPS60140952A - Data transmission system - Google Patents

Data transmission system

Info

Publication number
JPS60140952A
JPS60140952A JP58252204A JP25220483A JPS60140952A JP S60140952 A JPS60140952 A JP S60140952A JP 58252204 A JP58252204 A JP 58252204A JP 25220483 A JP25220483 A JP 25220483A JP S60140952 A JPS60140952 A JP S60140952A
Authority
JP
Japan
Prior art keywords
transmission line
signal
transmission
synchronization signal
frame synchronization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58252204A
Other languages
Japanese (ja)
Inventor
Tatsuhiro Ono
小野　龍宏
Shinichi Koike
伸一 小池
Yasutoshi Ishizaki
石崎　靖敏
Haruhiko Tsuchiya
土屋　治彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58252204A priority Critical patent/JPS60140952A/en
Publication of JPS60140952A publication Critical patent/JPS60140952A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/302—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements characterised by the form or geometrical disposition of the individual elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J17/00—Gas-filled discharge tubes with solid cathode
    • H01J17/38—Cold-cathode tubes
    • H01J17/48—Cold-cathode tubes with more than one cathode or anode, e.g. sequence-discharge tube, counting tube, dekatron
    • H01J17/49—Display panels, e.g. with crossed electrodes, e.g. making use of direct current

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE:To eliminate the need for bus terminator by constituting the system that a synchronizing signal is transmitted to a descending transmission line in the same direction as the transmission direction of a frame synchronizing signal of an ascending transmission line and limiting a time of a transmission signal from the remotest terminal device reaching the center to a small value less than a prescribed value. CONSTITUTION:Suppose that channels CHA and B are assigned respectively to terminators 5 and 3 at a time. The terminal device 3 detects a frame synchronizing signal F transmitted from a center device 1 to the ascending transmission line T (a), and transmits a signal to a time slot of the CHB assigned to the transmission line T at a phase synchronized therewith (b). On the other hand, the phase of a frame synchronizing signal F including the delay C transmitted to the transmission line T is detected by the terminal device 5 (c), which transmits a signal to the time slot of the CHA assigned to the transmission line T at the phase synchronized therwith. The signal reaches the device 1 after being subject to the delay D. Thus, the signal from both the terminal devices 3 and 5 produces a part (hatched part) overlapped timewise at the reception point of the device 1 as shown in (e). This part is limited to a value as small as possible so as not to be a problem to the signal decision.

Description

【発明の詳細な説明】 本発明はデータ伝送システムに関し、特に全二重バス伝
送路によシセンタ装置と複数の端末とが接続された時分
割フレーム多重伝送システムにおけるバス伝送路接続方
式に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data transmission system, and more particularly to a bus transmission line connection method in a time-division frame multiplex transmission system in which a center device and a plurality of terminals are connected through a full-duplex bus transmission line. be.

全二重バス伝送路による多重化伝送システムにあっては
、各端末が下シ伝送路から信号を受信して上シ伝送路へ
信号を送出するに際し、伝送路の終端部に設けられたバ
ス終端器によシ下し伝送路のフレーム同期信号を上り伝
送路に折シ返し送出する構成とし、この折シ返されたフ
レーム同期信号によってフレーム同期をとって、この同
期がとられた位相に合せて上シ伝送路へ信号を送出する
ようになっている。In a multiplex transmission system using a full-duplex bus transmission line, when each terminal receives a signal from the lower transmission line and sends the signal to the upper transmission line, the bus installed at the end of the transmission line The configuration is such that the frame synchronization signal from the lower transmission line is sent back to the uplink transmission line by the terminator, frame synchronization is achieved by this folded back frame synchronization signal, and the synchronized phase is At the same time, signals are sent to the upper transmission line.

第１図はか＼る全二重バス伝送路による多重化伝送シス
テムの概略ブロック図であり、バス終端器２は下シ伝送
路Ｒにおけるフレーム同期信号を上シ伝送路Ｔに折シ返
し送出するものである。各端末３．４及び５はセンタ装
置１にて受信する各信号の位相を合致させるために、上
シ伝送路Ｔに折シ返されたフレーム同期信号の位相に同
期して上り伝送路Ｔへ信号を夫々送出するようになって
いる。尚、Ｌは加入者ラインを示す。FIG. 1 is a schematic block diagram of a multiplex transmission system using a full-duplex bus transmission line, and the bus terminator 2 sends back the frame synchronization signal on the lower transmission line R to the upper transmission line T. It is something to do. In order to match the phase of each signal received by the center device 1, each terminal 3, 4 and 5 sends it to the upstream transmission path T in synchronization with the phase of the frame synchronization signal that is looped back to the upper transmission path T. It is designed to send out signals respectively. Note that L indicates a subscriber line.

第２図は、第１図のシステムにおける下り伝送路Ｒと上
シ伝送路Ｔとの各信号状態を示す図であ＃）、図中Ｆが
フレーム同期信号を、Ａ及びＢがチャンネルデータを夫
々示すものである。本例では２チヤンネルの時分割多重
伝送の場合を示している。Figure 2 is a diagram showing the signal states of the downlink transmission line R and the upstream transmission line T in the system shown in Figure 1. In the figure, F represents the frame synchronization signal, and A and B represent the channel data. They are shown respectively. This example shows a case of two-channel time division multiplex transmission.

従来システムでは以上の如く構成されているために、二
重バス伝送路のバス終端部に、フレーム同期信号を上り
伝送路Ｔへ折シ返すバス終端器２を必要としコストアッ
プの要因となる。また、端末を増設すべくバス伝送路を
増設、延長する場合には、バス終端器２を取りはずして
後に、延長バス伝送路を接続し、その終端部に取シはず
したバス終端器２を移動して設置する必要があシ、その
作業性に難点があるという欠点を有する。Since the conventional system is configured as described above, a bus terminator 2 is required at the bus terminal of the dual bus transmission line to return the frame synchronization signal to the upstream transmission line T, which increases the cost. In addition, when adding or extending the bus transmission line to add more terminals, remove the bus terminator 2, connect the extension bus transmission line, and move the removed bus terminator 2 to the end of the line. However, it has the disadvantage that it must be installed in a vacuum, and its workability is difficult.

従って１本発明は従来のもののか＼る欠点を排除すべく
なされたものであって、その目的とするところは、バス
終端器を不皆としたデータ伝送システムを提供すること
にある。Accordingly, the present invention has been made to eliminate the drawbacks of the prior art, and its object is to provide a data transmission system that does not require a bus terminator.

本発明の他の目的は、バス伝送路の増設、延長に際し既
存のシステムに何等手を加えることなく増設、延長を可
能として作業性の著しい向上を図ったデータ伝送システ
ムを提供することである。Another object of the present invention is to provide a data transmission system that allows bus transmission lines to be expanded or extended without making any changes to the existing system, thereby significantly improving workability.

本発明によるデータ伝送システムは、全二重伝送方式に
よりセンタ装置が複数の端末を収容するよう構成されか
つ各端末は上シ伝送路のフレーム同期信号によシ同期を
とって当該上り伝送路へ信号を送出するようにした時分
割フレーム構成のデータ伝送システムを対象とし、その
特徴とするところは、下り伝送路のフレーム同期信号の
伝送方向と同方向へ上シ伝送路にもフレーム同期信号を
送出するよう構成し、センタ装置に対し最も離間して設
けられた端末からの送出信号がセンタへ到着するに要す
る遅延時間を所定値よシ小に制限したことにある。In the data transmission system according to the present invention, a center device is configured to accommodate a plurality of terminals using a full-duplex transmission method, and each terminal is synchronized with a frame synchronization signal of an upstream transmission path to transmit the data to the upstream transmission path. The target is a data transmission system with a time-division frame configuration that transmits signals, and its characteristics are that the frame synchronization signal is transmitted to the upper transmission path in the same direction as the transmission direction of the frame synchronization signal on the downlink transmission path. This is because the delay time required for the transmitted signal from the terminal provided farthest from the center device to arrive at the center is limited to less than a predetermined value.

以下に本発明の実施例につき図面を参照しつつ説明する
。Embodiments of the present invention will be described below with reference to the drawings.

第３図は本発明の一実施例のブロック図であり。FIG. 3 is a block diagram of one embodiment of the present invention.

第１図と同等部分は同一符号によシ示されている。Parts equivalent to those in FIG. 1 are designated by the same reference numerals.

第１図におけるバス終端器２を排除する代りに。Instead of eliminating the bus terminator 2 in FIG.

センタ装置（本例では宅内回線終端装置である）１を、
下り伝送路Ｒと同様に上シ伝送路Ｔへもフレーム同期信
号を送出する如く構成する。すなわち、フレーム同期信
号がセンタ装置１から下シ及び上シ両伝送路へ同一方向
へ送出される構成である。そして、各端末３，４．５は
、上り伝送路Ｔのフレーム同期信号を検出して、これに
同期した位相をもって上シ伝送路Ｔへ割当てられたチャ
ンネル（Ａ、Ｂ）のタイムスロットに信号を送出するも
のである。The center device (in this example, it is a home line termination device) 1,
The frame synchronization signal is configured to be sent to the upper transmission line T as well as the lower transmission line R. That is, the configuration is such that the frame synchronization signal is sent from the center device 1 to both the lower and upper transmission paths in the same direction. Then, each terminal 3, 4.5 detects the frame synchronization signal of the upstream transmission path T, and sends a signal in the time slot of the channel (A, B) assigned to the upstream transmission path T with a phase synchronized with this. It is intended to send out.

第４図は第３図のブロックの動作を示す図であシ、バス
伝送路の通信容量としてフレーム内にＡ。FIG. 4 is a diagram showing the operation of the blocks in FIG. 3. A is shown in the frame as the communication capacity of the bus transmission line.

Ｂの２チヤンネルを有するシステムの場合につき示され
てお！１１．Ｆがフレーム同期信号を示している０ ある通信時刻において、各チャンネルＡ及びＢが端末装
ｆｉｆ５及び３に夫々割当てられているものとする。端
末３はセンタ装置１から上シ伝送路Ｔ５− ヘ送出されたフレーム同期信号Ｆを検出しくａ）、これ
に同期した位相で上シ伝送路Ｔに割当てられたチャンネ
ルＢのタイムスロットに信号を送る（ｂ）。The case of a system with two channels of B is shown! 11. 0 where F indicates a frame synchronization signal. Assume that at a certain communication time, channels A and B are assigned to terminal devices fif5 and fif3, respectively. The terminal 3 detects the frame synchronization signal F sent from the center device 1 to the upper transmission line T5-, and sends the signal to the time slot of channel B assigned to the upper transmission line T with a phase synchronized with this. Send (b).

一方、端末５もセンタ装置１から上シ伝送路Ｔへ送出さ
れたフレーム同期信号Ｆの遅延Ｃを有する位相を検出し
くＣ）、それに同期した位相で上シ伝送路Ｔに割当てら
れたチャンネル人のタイムスロットに信号を送る。この
チャンネルＡの信号は遅延りを受けた後にセンタ装置１
へ到着する。従って。On the other hand, the terminal 5 also detects the phase with a delay C of the frame synchronization signal F sent from the center device 1 to the upper transmission line T (C), and detects the phase of the frame synchronization signal F sent from the center device 1 to the upper transmission line T, and the channel assigned to the upper transmission line T with the phase synchronized with it. time slot. After receiving a delay, this channel A signal is transmitted to the center device 1.
arrive at. Therefore.

両端末３及び５からの信号はセンタ装置１の受信点にお
いて（ｅ）に示す如く時間的に重なる部分（斜線部分）
を生ずる。この重な多部分が信号判定に問題とならない
ように極力小に制限すれば支障は生じない。The signals from both terminals 3 and 5 overlap in time at the receiving point of the center device 1 as shown in (e) (shaded area).
will occur. If these overlapping parts are kept as small as possible so that they do not pose a problem in signal determination, no problem will occur.

すなわち、センタ装置１に対し最も離間して設置されて
いる端末５と当該センタ装置１との間のバス伝送路長を
極力短く制限すれば、端末５からの送出信号の遅延時間
は小となって、信号判定に問題とならないようにするこ
とが可能となる。In other words, if the bus transmission path length between the terminal 5 installed farthest from the center device 1 and the center device 1 is limited to the shortest possible length, the delay time of the signal sent from the terminal 5 will be reduced. This makes it possible to avoid problems in signal determination.

こうすることによ＃）、従来上シ伝送路へフレー６− ム同期信号を折り返すために必要だったバス終端器が不
要となって、コスト的に安価なパッシブ素子のみでバス
終端部を構成できるのである。By doing this, the bus terminator that was conventionally required to return the frame synchronization signal to the transmission line is no longer required, and the bus terminator can be configured using only low-cost passive elements. It can be done.

第５図は本発明の実施例のブロック図であシ。FIG. 5 is a block diagram of an embodiment of the present invention.

第１．３図と同等部分は同一符号によシ示されている。Parts equivalent to those in FIG. 1.3 are designated by the same reference numerals.

本例においては、従来のバス終端器２を有するシステム
に更にバス伝送路を増設、延長する場合が示されている
。In this example, a case is shown in which a bus transmission line is further added and extended to a system having a conventional bus terminator 2.

バス伝送路を増設するには、従来方式によれば、バス終
端器２を取シはずしてから延バス伝送路Ｒ′。In order to add a bus transmission line, according to the conventional method, the bus terminator 2 is removed and then the extended bus transmission line R' is installed.

Ｔ′を接続し、その終端部に当該取シはずしたバス終端
器２を移動設置する必要があるが１本発明を適用すれば
、第５図に示す如く、既存システムには何等手を加える
ことなく、バス終端器２の先に長さを極力短く制限して
延長バス伝送路Ｔｔ’、Ｔ’を付加するのみで、簡単に
バス伝送路の増設が可能となる。この増設されたバス伝
送路Ｒ’、　Ｔ／に端末６及び７が接続収容されてお９
．バス終端器２にて折り返されたフレーム同期信号Ｆが
、延長された上り伝送路Ｔ′へも下シ伝送路Ｒ′と同一
方向に送出されることになる。Although it is necessary to connect T' and move and install the removed bus terminator 2 at its terminal end, applying the present invention does not require any modification to the existing system, as shown in Figure 5. By simply adding extension bus transmission lines Tt' and T' to the end of the bus terminator 2 with their lengths kept as short as possible, it is possible to easily add more bus transmission lines. Terminals 6 and 7 are connected to and accommodated on the added bus transmission lines R' and T/.
．． The frame synchronization signal F returned by the bus terminator 2 is sent to the extended upstream transmission line T' in the same direction as the downstream transmission line R'.

従って、この上シ伝送路Ｔ′へ送出されたフレーム同期
信号Ｆを端末６及び７が検出して、この同期信号に同期
をとって必要な信号送出をセンタ装置１へ向けてなすも
のである。Therefore, the terminals 6 and 7 detect the frame synchronization signal F sent to the upper transmission path T', synchronize with this synchronization signal, and send the necessary signals to the center device 1. .

第６図は第５図のシステムにおける動作を示す図であり
、第４図の場合と同様にバス伝送路の通信容量としてフ
レーム内ＫＡ、Ｈの２チヤンネルを有するシステムの場
合につき示されている。センタ装置１から最も離間して
設置されている端末７と最も近くに設置されている端末
３とに各チャンネルＡ及びＢが夫々割当てられていると
する。FIG. 6 is a diagram showing the operation in the system of FIG. 5, and similarly to the case of FIG. 4, the system is shown for a system having two channels, KA and H within the frame, as the communication capacity of the bus transmission line. . It is assumed that channels A and B are respectively assigned to the terminal 7 installed farthest from the center device 1 and the terminal 3 installed closest.

端末７は、終端器２から延長された上シ伝送路Ｔ′へ送
出されたフレーム同期信号−）の遅延Ｇを有する位相を
検出しくｂ）、それに同期した位相で上シ伝送路Ｔ′へ
割当てられたチャンネルＡのタイムスロットに信号を送
出する。このチャンネルＡの信妙は遅延Ｈを受けてセン
タ装置１へ到着する。The terminal 7 detects the phase with a delay G of the frame synchronization signal -) sent from the terminator 2 to the extended upper transmission line T'b), and sends it to the upper transmission line T' with a phase synchronized with it. A signal is sent to the assigned channel A time slot. The signal of this channel A arrives at the center device 1 after receiving a delay H.

一方、端末３は上シ伝送路Ｔに折シ返されたフレーム同
期信号Ｆを検出しくｄ）、このフレーム同期信号に同期
した位相でチャンネルＢの信号を送出する。この送出信
号はセンタ装置１へ到着するが（ｅｌ、両端末３及び７
による送出信号のセンタ装置ｌにおける受信点の信号は
（ｆ）に示す如くなり、１部重なシ合うことになる。こ
の場合も、この重なりを短くすることによって目的を達
成することができる。On the other hand, the terminal 3 detects the frame synchronization signal F returned to the upper transmission path T, and sends out the signal of channel B with a phase synchronized with this frame synchronization signal. This transmission signal arrives at the center device 1 (el, both terminals 3 and 7
The signals at the receiving point of the sending signal at the center device 1 are as shown in (f), and are partially overlapped. Again, the objective can be achieved by shortening this overlap.

叙上の如く１本発明によれば、フレーム同期信号を下シ
伝送路から上シ伝送路へ折り返すだめのバス終端器を用
いる必要がなくなシコスト低下に寄与すると共に、既存
システムの増設に際しても同等既存システムに手を加え
る必要がないので作業性が著しく向上することになる。As described above, according to the present invention, there is no need to use a bus terminator for returning the frame synchronization signal from the lower transmission line to the upper transmission line, which contributes to a reduction in system cost and also reduces the cost when expanding an existing system. Since there is no need to modify an equivalent existing system, work efficiency will be significantly improved.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来の伝送システムの概略ブロック図。 第２図は第１図のシステムの動作を説明する図。 第３図は本発明の１実施例のブロック図、第４図は第３
図のシステムの動作を説明する図、第５図は本発明の他
の実施例のブロック図、第６図は第９− ５図のシステムの動作を説明する図である。 主要部分の符号の説明 ｌ・・・・・・センタ装置、３〜７・・・・・・端末装
置、Ｒ・・・・・・下ｐ伝送路、Ｔ・・・・・・上如伝
送路。 第　１　図 筋２区 躬３閃 第４図 ＃戚ＪうFIG. 1 is a schematic block diagram of a conventional transmission system. FIG. 2 is a diagram explaining the operation of the system shown in FIG. 1. FIG. 3 is a block diagram of one embodiment of the present invention, and FIG. 4 is a block diagram of one embodiment of the present invention.
FIG. 5 is a block diagram of another embodiment of the present invention, and FIG. 6 is a diagram explaining the operation of the system shown in FIG. 9-5. Explanation of symbols of main parts L...Center device, 3 to 7...Terminal device, R...Lower p transmission line, T...Upper transmission Road. Figure 1: Line 2, Section 3, Figure 4: #Relationship

Claims (1)

【特許請求の範囲】[Claims] 全二重伝送方式によシセンタ装置が複数の端末を収容す
るよう構成されかつ各端末は上シ伝送路のフレーム同期
信号により同期をとって前記上シ伝送路へ信号を送出す
るようにした時分割フレーム構成のデータ伝送システム
であって、下シ伝送路の前記フレーム同期信号の伝送方
向と同方向へ前記上り伝送路にも前記フレーム同期信号
を送出するよう構成し、前記センタ装置に対し最も離間
して設けられた前記端末からの送出信号が前記センタへ
到着するに要する遅延時間を所定値より小に制限してな
ることを特徴とするデータ伝送システム。When the center equipment is configured to accommodate a plurality of terminals using a full-duplex transmission method, and each terminal is synchronized by a frame synchronization signal of the upper transmission line and sends a signal to the upper transmission line. The data transmission system has a divided frame configuration, and is configured to transmit the frame synchronization signal to the uplink transmission path in the same direction as the transmission direction of the frame synchronization signal on the lower transmission path, and A data transmission system characterized in that a delay time required for transmission signals from the terminals provided at a distance to arrive at the center is limited to less than a predetermined value.
JP58252204A 1983-12-27 1983-12-27 Data transmission system Pending JPS60140952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58252204A JPS60140952A (en) 1983-12-27 1983-12-27 Data transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58252204A JPS60140952A (en) 1983-12-27 1983-12-27 Data transmission system

Publications (1)

Publication Number Publication Date
JPS60140952A true JPS60140952A (en) 1985-07-25

Family

ID=17233945

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58252204A Pending JPS60140952A (en) 1983-12-27 1983-12-27 Data transmission system

Country Status (1)

Country Link
JP (1) JPS60140952A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53146519A (en) * 1977-05-26 1978-12-20 Omron Tateisi Electronics Co Time-division transmission system
JPS543406A (en) * 1977-06-09 1979-01-11 Omron Tateisi Electronics Co Data receiving system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53146519A (en) * 1977-05-26 1978-12-20 Omron Tateisi Electronics Co Time-division transmission system
JPS543406A (en) * 1977-06-09 1979-01-11 Omron Tateisi Electronics Co Data receiving system

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