JPS60107830U - liquid crystal display device - Google Patents
liquid crystal display deviceInfo
- Publication number
- JPS60107830U JPS60107830U JP14611184U JP14611184U JPS60107830U JP S60107830 U JPS60107830 U JP S60107830U JP 14611184 U JP14611184 U JP 14611184U JP 14611184 U JP14611184 U JP 14611184U JP S60107830 U JPS60107830 U JP S60107830U
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- gate circuit
- signal
- selects
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Liquid Crystal Display Device Control (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図a、 bは直列に書き込まれる表示装置の原理図
とその信号波形。第2図a、 bは本考案の実施例の回
路図とその信号波形。第3図は本考案の応用例の回路図
。第4図a、 bは本考案の他の応用例の回路図とその
信号波形。
D・・・・・・外部情報、D・・・・・・クイックパル
ス、COM、C0M1・・・・・・共通相電圧、W・・
・・・・書き込み時間帯、C・・・・・・書き込み時間
帯のパルス、X・・・・・・外部の指示情報、1・・・
・・・エクスクル−シブオアゲート、2・・・・・・液
晶パネル、3・・・・・・シフトレジスタ、4と12・
・・・・・アンドゲート、11と15・・・・・・オア
ゲート、5〜10.13と14.16〜20・・・・・
・トランスミッションゲート。
補正 昭59.10.19
実用新案登録請求の範囲を次のように補正する。
O実用新案登録請求の範囲
第1の電極とこれに対向する第2の電極を有量る液晶パ
ネル、前記液晶パネルの第1の電極を個別に駆動するシ
フトレジスタ、第1の入力端に第1又は第2の交番駆動
用信号を入力し、第2の入力端に前記第1の電極を駆動
する表示信号又は前記シフトレジスタの最終段出力を入
力し、出力端を前記シフトレジスタの入力に接続したエ
クスクル−シブオアゲート、前記第1の入力端に入力さ
れる第1又は第26交番駆動用信号を選択する第1のゲ
ート回路、及び前記第2の入力端に入力される前記表示
信号又は最縮段出力の選択を行う第2のゲート回路より
なり、前記第2のゲート回路l゛
が最終段出力を選択した際には前記第1のゲート回路は
前記第1の交番駆動用信号を選択し、前記第2のゲート
回路が前記表示信号を選択した際には前記第1のゲート
回路は前記第2の交番駆動用信号を選択し、前記シフト
レジスタには前記第2の交番駆動用信号が反転するごと
に発生する書き゛み用クロクパルスが入力され、前記
1の一番駆動用信号は前記書き込み用クロックパルスの
発生期間に同期する信号であることを特徴とする液晶表
示装置。
図面の簡単な説明を次のように補正する。
明細書箱9頁3行目1D・・・・・・クロツクパルスヨ
とあるを’CL・・・・・・クロックパルスヨと補正す
る。
明細書第9頁11行目14と12・・・・・・アントゲ
−トヨを削除する。Figures 1a and 1b are diagrams of the principle of a display device in which data is written in series and its signal waveforms. Figures 2a and 2b are circuit diagrams of an embodiment of the present invention and their signal waveforms. Figure 3 is a circuit diagram of an application example of the present invention. Figures 4a and 4b are circuit diagrams of other application examples of the present invention and their signal waveforms. D...External information, D...Quick pulse, COM, C0M1...Common phase voltage, W...
...Writing time zone, C...Writing time zone pulse, X...External instruction information, 1...
... Exclusive or gate, 2 ... Liquid crystal panel, 3 ... Shift register, 4 and 12.
...And gate, 11 and 15...Or gate, 5-10.13 and 14.16-20...
・Transmission gate. Amendment October 19, 1980 The scope of claims for utility model registration is amended as follows. O Utility Model Registration Claims A liquid crystal panel having a first electrode and a second electrode opposite thereto; a shift register for individually driving the first electrode of the liquid crystal panel; 1 or a second alternating driving signal is input, a display signal for driving the first electrode or a final stage output of the shift register is input to a second input terminal, and the output terminal is input to the input of the shift register. A connected exclusive OR gate, a first gate circuit for selecting the first or 26th alternating drive signal input to the first input terminal, and a first gate circuit for selecting the first or 26th alternating drive signal input to the second input terminal; It consists of a second gate circuit that selects a reduced stage output, and when the second gate circuit l' selects the final stage output, the first gate circuit selects the first alternating drive signal. However, when the second gate circuit selects the display signal, the first gate circuit selects the second alternating drive signal, and the shift register receives the second alternating drive signal. A clock pulse for writing that is generated every time the
1. A liquid crystal display device, wherein the first driving signal is a signal synchronized with the generation period of the writing clock pulse. The brief description of the drawing has been amended as follows. Specification box page 9, line 3 1D...Clock pulse yo is corrected to 'CL...clock pulse yo. Page 9 of the specification, line 11, 14 and 12...Antogetoyo is deleted.
Claims (1)
ネル、前記液晶パネルの第1の電極を個別に駆動するシ
フトレジスタ、第1の入力端に第1又は第2の交番駆動
用信号を入力し、第2の入力端に前記第1の電極を駆動
する表示信号又は前記シフトレジスタの最終段出力を入
力し、出力端を前記シフトレジスタの入力に持続したエ
クスクル−シブオアゲート、前記第1の入力端に入力さ
れる第1又は第2の交番駆動用信号を選択する第1のゲ
ート回路、及び前記第2の入力端に入力される前記表示
信号又は最終段出力の選択を行う第2のゲート回路より
なり、前記第2のゲート回路が最終段出力を選択した際
には前記第1のゲート回路は前記第1の交番駆動用信号
を選択し、前記第2のゲート回路が前記セグメント信号
を選択した際には前記第1のゲート回路は前記第2の交
番駆動用信号を選択することを特徴とする液晶表示装置
。a liquid crystal panel having a first electrode and a second electrode facing the liquid crystal panel; a shift register for individually driving the first electrode of the liquid crystal panel; a first or second alternating drive signal at a first input terminal; an exclusive OR gate, which inputs a display signal for driving the first electrode or a final stage output of the shift register to a second input terminal, and has an output terminal connected to the input of the shift register; a first gate circuit that selects the first or second alternating driving signal input to the input terminal of the circuit; and a second gate circuit that selects the display signal or the final stage output input to the second input terminal. When the second gate circuit selects the final stage output, the first gate circuit selects the first alternating drive signal, and the second gate circuit selects the segment drive signal. A liquid crystal display device, wherein the first gate circuit selects the second alternating drive signal when the signal is selected.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14611184U JPS6039910Y2 (en) | 1984-09-27 | 1984-09-27 | liquid crystal display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14611184U JPS6039910Y2 (en) | 1984-09-27 | 1984-09-27 | liquid crystal display device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60107830U true JPS60107830U (en) | 1985-07-22 |
JPS6039910Y2 JPS6039910Y2 (en) | 1985-11-29 |
Family
ID=30704351
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14611184U Expired JPS6039910Y2 (en) | 1984-09-27 | 1984-09-27 | liquid crystal display device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6039910Y2 (en) |
-
1984
- 1984-09-27 JP JP14611184U patent/JPS6039910Y2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS6039910Y2 (en) | 1985-11-29 |
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