JPS58152687U - Full display circuit of LCD panel - Google Patents

Full display circuit of LCD panel

Info

Publication number
JPS58152687U
JPS58152687U JP4910682U JP4910682U JPS58152687U JP S58152687 U JPS58152687 U JP S58152687U JP 4910682 U JP4910682 U JP 4910682U JP 4910682 U JP4910682 U JP 4910682U JP S58152687 U JPS58152687 U JP S58152687U
Authority
JP
Japan
Prior art keywords
lcd panel
display circuit
full display
inverter
liquid crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4910682U
Other languages
Japanese (ja)
Inventor
俊幸 東
Original Assignee
日本電気ホームエレクトロニクス株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気ホームエレクトロニクス株式会社 filed Critical 日本電気ホームエレクトロニクス株式会社
Priority to JP4910682U priority Critical patent/JPS58152687U/en
Publication of JPS58152687U publication Critical patent/JPS58152687U/en
Pending legal-status Critical Current

Links

Landscapes

  • Liquid Crystal Display Device Control (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

図は本考案の実施例を示す回路図である。 ＬＣＤ・・・・・・液晶パネル、Ｃ・・・・・・共通端
子、Ｓ１〜Ｓｎ・・・・・・セグメント端子、ＰＣ・・
・・・・パルス発生器、ＩＮ・・・・・・インバータ、
０１〜Ｇ２・・・・・・ＥＸＯＲゲート（排他的論理和
ゲート）、Ｄ１〜Ｄｎ・・・・・・ダイオード、ＳＷ・
・・・・・スイッチ、Ｅ１〜Ｅｎ・・・・・・制御信号
。The figure is a circuit diagram showing an embodiment of the present invention. LCD...Liquid crystal panel, C...Common terminal, S1-Sn...Segment terminal, PC...
...Pulse generator, IN...Inverter,
01~G2...EXOR gate (exclusive OR gate), D1~Dn...diode, SW・
...Switch, E1-En... Control signal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 液晶パネルの共通端子へ与えられるパルス信号を反転す
るインバータと、該インノ、く−夕の出力および制御信
号を入力として出力を前記液晶パネルのセグメント端子
へ与える排他的論理和ゲートと、共通回路の方向へ順方
向として挿入されたダイオードを介して前記制御信号を
前記共通回路へ接続するスイッチとからなることを特徴
とする液晶パネルの全表示回路。an inverter that inverts a pulse signal applied to a common terminal of the liquid crystal panel; an exclusive OR gate that receives the output and control signal of the inverter and outputs the output to the segment terminal of the liquid crystal panel; and a common circuit. and a switch for connecting the control signal to the common circuit through a diode inserted in the forward direction.
JP4910682U 1982-04-05 1982-04-05 Full display circuit of LCD panel Pending JPS58152687U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4910682U JPS58152687U (en) 1982-04-05 1982-04-05 Full display circuit of LCD panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4910682U JPS58152687U (en) 1982-04-05 1982-04-05 Full display circuit of LCD panel

Publications (1)

Publication Number Publication Date
JPS58152687U true JPS58152687U (en) 1983-10-13

Family

ID=30059992

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4910682U Pending JPS58152687U (en) 1982-04-05 1982-04-05 Full display circuit of LCD panel

Country Status (1)

Country Link
JP (1) JPS58152687U (en)

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