JPS5984532A - 半導体装置の製造方法および半導体ウエ−ハ - Google Patents

半導体装置の製造方法および半導体ウエ−ハ

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Publication number
JPS5984532A
JPS5984532A JP57194719A JP19471982A JPS5984532A JP S5984532 A JPS5984532 A JP S5984532A JP 57194719 A JP57194719 A JP 57194719A JP 19471982 A JP19471982 A JP 19471982A JP S5984532 A JPS5984532 A JP S5984532A
Authority
JP
Japan
Prior art keywords
resin paste
pellet
wafer
semiconductor wafer
pellets
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57194719A
Other languages
English (en)
Inventor
Akira Suzuki
明 鈴木
Kazunari Suzuki
一成 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Ltd
Hitachi Microcomputer Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Microcomputer Engineering Ltd filed Critical Hitachi Ltd
Priority to JP57194719A priority Critical patent/JPS5984532A/ja
Publication of JPS5984532A publication Critical patent/JPS5984532A/ja
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 本発明は半導体装置の製造方法お工ひこの製造方法の実
施に使用する半導体ウェーハに関するものである。
一般に半導体装１１ｔに、所定の回路を形成した倣細な
牛導体素子ベレン）ｋリードフレームやセラミックベー
ス等のパッケージベース上に固着し、このベレットとパ
ンケージベースとｔワイヤ接続した上でパンケージ電流
下ことにより完成する工うにしている。そして、この半
導体装置にあっては前記パンケージベースにペレントｒ
ＩＩ！ｄ層する場合、Ａｇｔ含んだ樹脂ペースト’ｖ使
用することが多く、この位・１脂ベース）ｋディペンス
やスクリーン印刷の手法によってベレット裏面にｆｉ看
してパンケージベースに押圧し、固着を行なっている。
ところで、このようなベレットの固層方法でに、デスペ
ンサｖＣよる噛脂ペーストの賀ノ出址がペーストの粘度
寺の影響？を受けて一足に％埋することが困鮨なこと、
１だスクリーン印刷の対象と８ｎる囲槓がベレント躾■
で極めて不毛いために目］刷理（塗布埋）′＋Ｃ一定に
管理することか困難なこと等が原因となり、ペレット邊
面に供給さ几る１１１１脂ペースト蓋ｒ一定置にコント
ロールすることが極めて難かしいものと表ってｂる。こ
のため、樹脂ペーストｉｔが過剰であるとペレット周囲
のばみ出し量が多くなって短絡（％にワイヤとの接触）
事故が生じ易くなり、１だベースｌが不足しているとペ
レット固着強度が低下して後工程のワイヤボンティング
時にペレント剥ｎが住するという不具合が発生する。
したがって本発明の目的にペレット固着用の樹脂ペース
ト？通量供給してペレット固着強度の向上ｒ図９、これ
により前述した不具合２解消することができる半導体装
置の製造方法およびこれに使用する半導体ウェーハｒ提
供することにある。
このような目的ｒ連成するために本発明に、超短の回路
を形成したダイシング前の半導体ウェーハの裏面に＃脂
ペースト層を形成し、その後ダイシング前佳にてウェー
ハに？ｊｌ数個のペレットに切〜ｆ分離してペレットの
固着を行なうようにしている。
１だ、これに使用する半導体ウェーハは表向にｌツ１定
の回路パターンを有し、裏面には樹脂ペースト層紮有す
るものである。
以下、本発明ｒ図示の実施列によシ説明する。
第１図は本発明の半導体装置の製造方法を示し、特にペ
レント固層工程？中心として工程図でおる。
先ず、同図（Ｎのように略円形の半導体ウェーノー基板
２の表面に集積回路等の所定の回路パターン３葡公苅の
技術で形成し、各素子に対応する回路娑枡目状に配列形
成した半導体ウェーノー１に製造する。次に、同図ＣＢ
）のようにスクリーン印刷法或いぼスピン塗布法等ｆｃ
工って前記半導体ウェー−・１の裏面に樹脂ペーストに
重相し、樹脂ペースト層４を形成する。樹脂ペーストに
にＡｇｋ含んだ熱可塑性樹脂が使用さｎるがＦｙｒ謂Ｂ
ステージ化した熱硬化樹脂ｒ使用ムてもよい。また、こ
の樹脂ペースト層４の形成に際しては、比較的多欝の樹
脂ベース）ｋウェーハ全裏面（ペレットに比軟するとそ
の面積は大である）に塗布するために、樹脂ペースト層
の岸さに＾ａ度に管理することは極めて容易である。こ
の結果、樹脂ペースト層４７一旦冷却固化丁ｎは、表面
に回路パターンヶ有し、裏面に樹脂ペースト層４を有す
る半導体ウェーノー１が第２図のように構成芒れる。
次いで、同図（Ｃ）のように、前記半導体ウエーノ・１
ｒダイシングして複数個の半導体菓子ペレット５ｒ切断
形成する。そして、同図（功のように約２２０〜４５０
℃のヒートブロック６上に載置されたリードフレーム７
の・タブ７ａ上にペレット５？載せ、これｔ上方から押
圧子れば樹脂ペースト層４は溶融名ｎてペレット５にタ
ブ７ａ上曲に固着する。その後、同図（］（ｉ）のよう
にペレット５とリードフレーム７とｔワイヤ８で接続し
かつレシン９等にエフモールドｒ２０ぜば同図のような
半導体装［１０が完成３詐ることになる。
したがって、このように製遺嘔扛た半導体装置１０は、
半導体ウェーハｌの状態で樹脂ペースト層４が形成ちれ
ているために樹脂ペースト層ｒ略−黛の埋δに管理する
ことが容易であり、このことにウェーへｔベレントに切
断分離したときには各ペレットにおける樹脂ベース）ｔ
が所望の量に安定保持されることになる。これに↓シ、
ペレット固Ｈｖｃ使用される樹脂ペースト量ｒ好適鎗に
保ち、ペーストのけみ出し等による短軸事故の防止ｒ図
ると共にベレント固着強度？増大してペレント剥れ等の
不具合ｋｌｉ、ｌｊ止することができるのである。
ここで、前記し７ｔ＠脂ペ一スト層の厚さはペレット寸
法や樹脂ペースト材料の違いに工９夫々好適な値に設定
する。１π、樹脂ペースト層の形成方法も前述した方法
に限らｎず種々の方法紮通用することができる。
以上の工９に本発明の半導体装置の製造方法に工ｎば、
所定の回路パターン會形成した半導体ウエーノ・の裏面
に樹脂ペースト層ｒ形成しておき、七の後ベレットに、
！２Ｉ断分離してベレット付ｒ行なうようにしているの
で、各ペレットに供給される樹脂ペースト鷺ｒ一定に管
理することができ、こ１によシ短絡等の事故防止を図る
と共にベレント固着強ＫＦＮ大してベレント剥れｔ防止
することができるという効果が倚ら扛る。
１π本発明の半導体ウェーノ１によれはベレントに切断
分離する前の状態でその裏向に樹脂ペースト層ｒ形成し
ているので、ペレットに切断分離したときには各ペレッ
トには均一な量の樹脂ペーストが供給嘔れでいることに
なり、これに工９前述した効果ｒ助長することができる
のである。
【図面の簡単な説明】
第１図体１〜（ロ）は本発明方法の工程図、第２図は本
発明の半導体ウェーハの側視図である。 ■・・・半導体ウェーハ、２・・・ウェーハ基板、３・
・・回路、４・・・樹脂ペースト、５・・・ペレット、
７・・・リードフレーム、８・・・ワイヤ、９・・・レ
ジン、ｌＯ・・・半導体装置。 第　　２　図

Claims (1)

  1. 【特許請求の範囲】 １、表向に所定の回路ｒ形成した半導体ウェーハの裏面
    に樹脂ペースト＃２形成し、その後牛導体つェーハ’ｃ
    ｍ数個のペレットに切断分離してＦ９ｒ＝のパンケージ
    ベース上に固着すること？ｆｅ徴とする半導体装置の製
    造方法。 ２、　１ｔＪ脂ヘ一スト層ｔスクリーン印刷やスピン塗
    布にて形格してなる特許請求の範囲第１ｆｊ記載の半導
    体装置の製造方法。 ３、表面には所定の回路ｔパターン形成し、裏面ｉＣは
    均−岸さの樹脂ペースト層を有すること？性徴とする牛
    帰体りエーノ・。 ４、樹脂ペーストはＡｇｋ宮む熱可塑性相加である特許
    請求の範囲第３ＪＡ記載の半導体ウェー−・。
JP57194719A 1982-11-08 1982-11-08 半導体装置の製造方法および半導体ウエ−ハ Pending JPS5984532A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57194719A JPS5984532A (ja) 1982-11-08 1982-11-08 半導体装置の製造方法および半導体ウエ−ハ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57194719A JPS5984532A (ja) 1982-11-08 1982-11-08 半導体装置の製造方法および半導体ウエ−ハ

Publications (1)

Publication Number Publication Date
JPS5984532A true JPS5984532A (ja) 1984-05-16

Family

ID=16329103

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57194719A Pending JPS5984532A (ja) 1982-11-08 1982-11-08 半導体装置の製造方法および半導体ウエ−ハ

Country Status (1)

Country Link
JP (1) JPS5984532A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0183332U (ja) * 1987-11-24 1989-06-02
WO1996013066A1 (en) * 1994-10-20 1996-05-02 National Semiconductor Corporation Method of attaching integrated circuit dies by rolling adhesives onto semiconductor wafers
EP0730294A3 (en) * 1995-02-28 1998-04-08 Mitsubishi Denki Kabushiki Kaisha Semiconductor device fabricating method of semiconductor device, and die-bonding method of semiconductor device
JP2009170455A (ja) * 2008-01-10 2009-07-30 Toshiba Corp 半導体装置の製造方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0183332U (ja) * 1987-11-24 1989-06-02
WO1996013066A1 (en) * 1994-10-20 1996-05-02 National Semiconductor Corporation Method of attaching integrated circuit dies by rolling adhesives onto semiconductor wafers
EP0730294A3 (en) * 1995-02-28 1998-04-08 Mitsubishi Denki Kabushiki Kaisha Semiconductor device fabricating method of semiconductor device, and die-bonding method of semiconductor device
JP2009170455A (ja) * 2008-01-10 2009-07-30 Toshiba Corp 半導体装置の製造方法

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