JPS5980830U - semiconductor integrated circuit - Google Patents
semiconductor integrated circuitInfo
- Publication number
- JPS5980830U JPS5980830U JP17341282U JP17341282U JPS5980830U JP S5980830 U JPS5980830 U JP S5980830U JP 17341282 U JP17341282 U JP 17341282U JP 17341282 U JP17341282 U JP 17341282U JP S5980830 U JPS5980830 U JP S5980830U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- semiconductor integrated
- voltage
- zener
- logic operation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Power Sources (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の電源断時における誤動作防止回路を示す
ブロック図、第2図は第1図の回路の動作説明図、第3
図は本考案に係る半導体集積回路の一実施例を示す接続
区、第4図は同実施例の動作説明図、第5図は同実施例
の使用形態を示すブロック図である。
1・・・制御装置、2・・・被制御機器、NA・・・ナ
ンド回路、Q1〜Q3・・・トランジスタ、R1−R3
・・・抵抗、ZD・・・ツェナタイオード。Figure 1 is a block diagram showing a conventional malfunction prevention circuit when the power is turned off, Figure 2 is an explanatory diagram of the operation of the circuit in Figure 1, and Figure 3 is an illustration of the operation of the circuit in Figure 1.
The figure shows a connection section showing one embodiment of the semiconductor integrated circuit according to the present invention, FIG. 4 is an explanatory diagram of the operation of the same embodiment, and FIG. 5 is a block diagram showing the mode of use of the same embodiment. DESCRIPTION OF SYMBOLS 1... Control device, 2... Controlled equipment, NA... NAND circuit, Q1-Q3... Transistor, R1-R3
...Resistor, ZD...Zena diode.
Claims (1)
理演算部によってオン・オフして被制御機器の制御信号
とする半導体集積回路において、ツェナブレークタウン
電圧か集積回路の動作下限電圧あるいは誤動作開始電圧
程度のツェナタイオートを前記論理演算部の電源ライン
に挿設したことを特徴とする半導体集積回路。In semiconductor integrated circuits that have an open collector output section, which is turned on and off by a logic operation section in the preceding stage to provide a control signal for a controlled device, the Zener breaktown voltage, the lower limit voltage for operation of the integrated circuit, or the start of malfunction. A semiconductor integrated circuit, characterized in that a Zener tie auto of approximately voltage is inserted into a power supply line of the logic operation section.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17341282U JPS5980830U (en) | 1982-11-16 | 1982-11-16 | semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17341282U JPS5980830U (en) | 1982-11-16 | 1982-11-16 | semiconductor integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5980830U true JPS5980830U (en) | 1984-05-31 |
Family
ID=30377779
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17341282U Pending JPS5980830U (en) | 1982-11-16 | 1982-11-16 | semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5980830U (en) |
-
1982
- 1982-11-16 JP JP17341282U patent/JPS5980830U/en active Pending
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