JPS5979597A - Method of producing hybrid integrated circuit board - Google Patents
Method of producing hybrid integrated circuit boardInfo
- Publication number
- JPS5979597A JPS5979597A JP18892982A JP18892982A JPS5979597A JP S5979597 A JPS5979597 A JP S5979597A JP 18892982 A JP18892982 A JP 18892982A JP 18892982 A JP18892982 A JP 18892982A JP S5979597 A JPS5979597 A JP S5979597A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit board
- hybrid integrated
- holes
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
技術分野
本発明は混成集積回路、特に混成集積回路（以下ハイブ
リッドＩＣという）基板の製造方法に関する。TECHNICAL FIELD The present invention relates to a hybrid integrated circuit, and more particularly to a method for manufacturing a hybrid integrated circuit (hereinafter referred to as hybrid IC) substrate.
背景技術
従来よりハイブリッドＩＣの基板の材料としては、セラ
ミック等が使用されている。特にセラミック材は耐熱性
や強度性にも優れておシ非常によく使用されているもの
である。しかし、かかる有利な点は加工時には加工しに
くいという問題となり、集積度向上のためて必要とされ
るスルーホール形成も困難であった。BACKGROUND ART Conventionally, ceramics and the like have been used as materials for hybrid IC substrates. In particular, ceramic materials are very commonly used because of their excellent heat resistance and strength. However, this advantage resulted in the problem that it was difficult to process, and it was also difficult to form through holes required to improve the degree of integration.
発明の開示
本発明の目的は、スルーホール形成の容挑々・・イブリ
ット■Ｃ基板の製造方法を提□供することである。DISCLOSURE OF THE INVENTION An object of the present invention is to provide a method for manufacturing a hybrid C substrate, which requires the formation of through holes.
本発明の構成は、加圧整形機の整形板にスルーホール形
成用の突起物を設け、基板板の粉末と粉末結着剤との混
合物を所定の形に成形する工程においてスルーホール形
成を行うことである。The configuration of the present invention is that projections for forming through holes are provided on the shaping plate of the pressure shaping machine, and the through holes are formed in the process of shaping the mixture of the powder of the substrate plate and the powder binder into a predetermined shape. That's true.
本発明の効果は、スルーホール形成を基板成形と同時に
行うものであるから、特別の加工を要し々い。。従って
、加工のための設備を必要しないので安価なスルーホー
ルを有する基板が製造できる。The effect of the present invention is that through-hole formation is performed simultaneously with substrate molding, so special processing is often required. . Therefore, since processing equipment is not required, an inexpensive substrate having through holes can be manufactured.
発明を実施するための最良の形態 以下、本発明を実施例図面て従って説明する。BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be explained with reference to the drawings.
第１図は本発明の実施例に係る製造工程を示すブロック
図である。／はアルミナの粉末である基板材１．．２は
アルミナの粉末粒子を互い（て結着するた′めの結着剤
、３は基板材／と結着剤！を混合する工程、グは混合工
程３で生成された混合物を本発明に係る整形板を有する
加圧整形機によってスルーホールを含む所定の成形する
工程、Ｓは成形工程グによる成形物を所定の温度で焼き
、成形物内部の結着剤を飛散させて磁器形成を行う焼成
工程、乙は磁器の表面１ｃ金属薄膜を披着するだめのメ
タライズ工程、７は磁器表面に披着された金属薄膜の不
要部分を蝕刻し所要の配線パタンを得るだめのパタン工
程であり、スルーホール部分の配線も、この時に行われ
る。FIG. 1 is a block diagram showing a manufacturing process according to an embodiment of the present invention. / is alumina powder substrate material 1. ．． 2 is a binder for binding alumina powder particles to each other; 3 is a step of mixing the substrate material/and the binder; A step of forming a predetermined shape including through holes using a pressure shaping machine having such a shaping plate, S is a step of baking the molded product from the molding step at a predetermined temperature to scatter the binder inside the molded product to form porcelain. The firing process, B is a final metallization process in which a thin metal film is applied to the surface 1c of the porcelain, and 7 is a final patterning process in which unnecessary parts of the metal thin film applied to the porcelain surface are etched to obtain the required wiring pattern. Wiring for the through-hole portion is also done at this time.
第２図は本発明の実施例に係る成形工程で使用される加
圧整形機の整形板の斜視図である。どけ整形板の上型で
スルーホール形成のための突起物／θが設けられている
。２は整形板の下型である。FIG. 2 is a perspective view of a shaping plate of a pressure shaping machine used in a molding process according to an embodiment of the present invention. A protrusion /θ for forming a through hole is provided on the upper die of the movable shaping plate. 2 is the lower mold of the shaping plate.
次に図を参照しながら実施例の作用を説明する０第２図
で示すよって成型工程グにおいて、不図示の加圧整形機
の加圧機構が矢印ａ方向から上型どを、また矢印す方向
から下型２を加圧して下型２内の混合物を所定の形に成
形して）・イブリッドＩＣ基板／／を形成するが、上型
ｇＫ設けられた突起物／θによって、同時してスルーホ
ール／、２が形成される。これを第３図開示す。このよ
うに成形工程でスルーホールが形成できるので極めて有
利である。Next, the operation of the embodiment will be explained with reference to the figures.0 As shown in Figure 2, in the molding process, the pressure mechanism of the pressure shaping machine (not shown) moves the upper mold etc. from the direction of the arrow a, and from the direction of the arrow. The mixture in the lower mold 2 is molded into a predetermined shape by applying pressure to the lower mold 2 from the direction to form an hybrid IC substrate //, but at the same time, by the protrusion /θ provided in the upper mold gK, Through holes /, 2 are formed. This is disclosed in FIG. This is extremely advantageous since through holes can be formed during the molding process.
なお実施例では上型に突起物を設けだが下型に設けても
勿論よい。また、基板材としてセラミック材を使用した
が、その他の基板材にも適用できることは明らかであろ
う。In the embodiment, the protrusions are provided on the upper mold, but they may of course be provided on the lower mold. Further, although a ceramic material is used as the substrate material, it is obvious that the present invention can be applied to other substrate materials.
第１図は本発明の実施例に係る製造工程を示すブロック
図、第３図は本発明の実施例に係る成形工程で使用され
る加圧整形機の整形板の斜視図、第３図は本発明の実施
例（（係る成形工程で製造されだハイブリッドＩＣ基板
の斜視図である。
／・基板材、
３・・・結着剤、
３・混合工程、
グ 成形工程、
Ｓ 焼成工程、
乙 メタライズ工程、
７ パタン工程、
ざ・・整形板の上型、
２ 整形板の下型、
１０−突起物、
／／ ハイブリッドＩＣ基板、
／Ｉ、２ スルーホール。
特許出願人 新日本電気株式会社FIG. 1 is a block diagram showing a manufacturing process according to an embodiment of the present invention, FIG. 3 is a perspective view of a shaping plate of a pressure shaping machine used in a molding process according to an embodiment of the present invention, and FIG. Example of the present invention ((It is a perspective view of a hybrid IC substrate manufactured by such a molding process. /. Substrate material, 3. Binder, 3. Mixing process, Molding process, S Baking process, Metallization process, 7 Patterning process, Upper mold of shaping board, 2 Lower mold of shaping board, 10 - Projection, // Hybrid IC board, /I, 2 Through hole. Patent applicant Shin Nippon Electric Co., Ltd.
Claims (1)
着剤とを混合する工程と、前記混合物を加圧整形機によ
って所定の形に成形する工程と、前記成形物を焼成する
工程とを具備１〜て成る混成集積回路基板の製造方法に
おいて、前記混成集積回路基板のスルーホール形成が前
記成形工程で行われるように前記加圧整形機の整形板は
スルーホール形成用の突起物を有するものであることを
特徴とする混成集積回路基板の製造方法３、（２）
前記基板材はセラミック材であることを特徴とする特許
請求の範囲第１項記載の混成集積回路基板の製造方法１
゜(1) A step of mixing the powder of the substrate material and a binder that binds the powder to each other, a step of molding the mixture into a predetermined shape using a pressure shaping machine, and a step of firing the molded product. In the method for manufacturing a hybrid integrated circuit board comprising: 1, the shaping plate of the pressure shaping machine has projections for forming through holes so that through holes in the hybrid integrated circuit board are formed in the molding step. Method 3 for manufacturing a hybrid integrated circuit board characterized by having the following: (2)
A method for manufacturing a hybrid integrated circuit board according to claim 1, wherein the substrate material is a ceramic material.
゜
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18892982A JPS5979597A (en) | 1982-10-29 | 1982-10-29 | Method of producing hybrid integrated circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18892982A JPS5979597A (en) | 1982-10-29 | 1982-10-29 | Method of producing hybrid integrated circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5979597A true JPS5979597A (en) | 1984-05-08 |
Family
ID=16232357
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18892982A Pending JPS5979597A (en) | 1982-10-29 | 1982-10-29 | Method of producing hybrid integrated circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5979597A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49125846A (en) * | 1973-04-06 | 1974-12-02 | ||
| JPS52147770A (en) * | 1976-06-03 | 1977-12-08 | Ngk Insulators Ltd | Method of filling hole of metalized layer |
| JPS5789295A (en) * | 1980-11-26 | 1982-06-03 | Fujitsu Ltd | Method of forming via hole |
-
1982
- 1982-10-29 JP JP18892982A patent/JPS5979597A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49125846A (en) * | 1973-04-06 | 1974-12-02 | ||
| JPS52147770A (en) * | 1976-06-03 | 1977-12-08 | Ngk Insulators Ltd | Method of filling hole of metalized layer |
| JPS5789295A (en) * | 1980-11-26 | 1982-06-03 | Fujitsu Ltd | Method of forming via hole |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4912844A (en) | Methods of producing printed circuit boards | |
| US4703920A (en) | Manufacturing method for integrated circuit chip carriers and work holder for use in the method | |
| JPH05102342A (en) | Method for obtaining via-pattern in ceramic sheet and device fabricated therewith | |
| JPS6235693A (en) | Circuit board | |
| JPS5979597A (en) | Method of producing hybrid integrated circuit board | |
| JPH01319990A (en) | Thick-film forming method | |
| US5527586A (en) | Apparatus and method for depositing metal particles on a dielectric substrate | |
| JPH03177056A (en) | Manufacture of printed-circuit board | |
| GB2180409B (en) | Method of forming multilayer ceramic substrates | |
| JP2002290029A (en) | Wiring board and method of manufacturing the same | |
| JP2755520B2 (en) | Method of forming through hole in printed wiring board | |
| JPS63116496A (en) | Manufacture of simple wiring board | |
| JPH0256998A (en) | Manufacture of ceramic multilayer circuit substrate | |
| JPS6142192A (en) | Method of producing ceramic substrate | |
| JP3193896B2 (en) | Method of manufacturing resistor substrate for electronic component | |
| JPH08236931A (en) | Manufacture of ceramic wiring board | |
| JPS63194A (en) | Manufacture of ceramic board | |
| JPH03134974A (en) | Manufacture of jumper chip component | |
| JPS603192A (en) | Method of producing ceramic printed circuit board | |
| JP2868575B2 (en) | Ceramic wiring board | |
| JPH0376295A (en) | Circuit board aggregate | |
| JPS6454794A (en) | Manufacture of insulating substrate with conductive layer | |
| JPS59132699A (en) | Method of producing multilayer ceramic circuit board | |
| JPH0271584A (en) | Formation of electronic circuit | |
| JPS5817606A (en) | Manufacture of laminated coil |