JPS5967623A - Processing method for semiconductor device - Google Patents
Processing method for semiconductor deviceInfo
- Publication number
- JPS5967623A JPS5967623A JP17802582A JP17802582A JPS5967623A JP S5967623 A JPS5967623 A JP S5967623A JP 17802582 A JP17802582 A JP 17802582A JP 17802582 A JP17802582 A JP 17802582A JP S5967623 A JPS5967623 A JP S5967623A
- Authority
- JP
- Japan
- Prior art keywords
- beams
- semiconductor substrate
- mask
- film
- optical system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/04—Coating on selected surface areas, e.g. using masks
- C23C16/047—Coating on selected surface areas, e.g. using masks using irradiation by energy or particles
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
Abstract
Description
【発明の詳細な説明】
この発+11:Jは、光照射により半導体基板上に所定
パターンの薄膜を形成する、半導体装置の加工方法に関
する。DETAILED DESCRIPTION OF THE INVENTION This publication +11:J relates to a semiconductor device processing method in which a thin film with a predetermined pattern is formed on a semiconductor substrate by light irradiation.
従来の半導体装置の基板−にに所定バク〜ンの薄膜を形
成するには、第1図(A)〜(C)に工程順に示す半導
体装置の要部断面図のようにしていた。まず、(A)図
のように、半2!寥体基Afi(1)上に薄膜(2)を
全面に形成し、この薄膜(2)上にレジスト(3)を墜
布する。In order to form a thin film of a predetermined thickness on a substrate of a conventional semiconductor device, the steps are as shown in FIGS. 1A to 1C, which are cross-sectional views of essential parts of the semiconductor device. First, as shown in (A), half 2! A thin film (2) is formed on the entire surface of the substrate Afi (1), and a resist (3) is deposited on this thin film (2).
ついで、マスク(図示は略す)を用すで露光、現像を行
ない、(B)図のように、レジストパターン(3a)を
形成する。このレジストパターン(3a)ヲマスクにし
て薄膜(2)を化学的又は物理的にエツチングした後、
レジスト(3)を除去する。この状態を(C)図忙示す
。Next, exposure and development are performed using a mask (not shown) to form a resist pattern (3a) as shown in FIG. After chemically or physically etching the thin film (2) using this resist pattern (3a) as a mask,
Remove resist (3). This state is illustrated in figure (C).
上記従来の方法では、工程が複雑であり、製造1を川が
高くなり、また、レジスト(3)を用いるので、加工精
度か低く微−■加工が固め1Fであった。In the above conventional method, the process is complicated, the manufacturing process is high, and since the resist (3) is used, the processing accuracy is low and the micro-processing is hardened to 1F.
この発明は、光化学反応をきせる光を転写マスクに通し
、反応流体雰囲気中の半導体基板上に照射し、所定パタ
−ンの薄膜が容易に形成でき、安価になり、微細加工が
できる、半導体装IPjの加工方法を提供することを目
的としている。This invention allows light that stimulates photochemical reactions to be passed through a transfer mask and irradiated onto a semiconductor substrate in a reaction fluid atmosphere, thereby making it possible to easily form a thin film with a predetermined pattern, making it inexpensive, and enabling microfabrication of semiconductor devices. The purpose is to provide a method for processing IPj.
第21ン′1幻この発明の一実施例による加工方法を示
す半導体装置の加工装置の41′を要構成図である7、
(1)は半導体基板で、」−面には薄膜0すti壕だ形
成芒透明板(5)がはめられである。(4b)は容器(
4)内を減圧にするための排気1’%(40川を反応ガ
スを導入する導入口である。(6)は光源で、例えば水
銀ランプからなり光を投射する。(7)は第1の光学系
で、レンズ群カど光学部材を有し、投射光を拡大、又は
縮少などのIA!整をし、また、走査させる。(8)は
転写マスク、(9)はこのマスクを通った投射光を拡大
。21st Figure 7 is a schematic diagram showing a semiconductor device processing apparatus 41' showing a processing method according to an embodiment of the present invention;
(1) is a semiconductor substrate, and a thin film trench-forming transparent plate (5) is fitted on the negative side. (4b) is a container (
4) Exhaust 1'% (40%) to reduce the pressure inside the reactor gas. (6) is the light source, which is a mercury lamp, for example, and projects light. (7) is the first The optical system has an optical member such as a lens group, and performs IA adjustments such as enlarging or reducing the projected light, as well as scanning. (8) is a transfer mask, and (9) is a transfer mask. Enlarges the projected light that passes through it.
又は縮少などの調整をする第2の光学系で、レンズ群な
どを有している。Alternatively, it is a second optical system that performs adjustments such as reduction, and has a lens group.
上記一実施例の装置による加工方法は、次のようにする
。The processing method using the apparatus of the above embodiment is as follows.
容器(4)内を排気後、反応ガスとしてSiH4ガス及
びN20ガスを導入する。光源(6)から水銀ランプ光
を出し、第1の光学系(7)K通しマスク(8)上を照
射する。マスク(8)ヲ通った投射光u:m2の光学系
(9)を通って調整され、透明板(5)を透過し容器(
4)内の半導体基板(1)上を所要のパターンで照射す
る。After evacuating the inside of the container (4), SiH4 gas and N20 gas are introduced as reaction gases. Mercury lamp light is emitted from a light source (6), passes through the first optical system (7) K, and irradiates onto the mask (8). The projected light passing through the mask (8) is adjusted through the optical system (9) of u:m2, passes through the transparent plate (5), and enters the container (
4) Irradiate the semiconductor substrate (1) in a desired pattern.
半導体基&(1)上の光が照射する部分は、光化学反応
によりシリコン酸化膜による薄膜θりが形成される。A thin film θ of silicon oxide film is formed by a photochemical reaction on the portion of the semiconductor substrate &(1) that is irradiated with light.
この反応は、次式で示される。This reaction is shown by the following formula.
ここで、h:フランクの定数、シ:尤の周波数、0″、
Ho:それぞれ励起した酸素、水銀原子を示す。Here, h: Frank's constant, shi: likely frequency, 0'',
Ho: Indicates excited oxygen and mercury atoms, respectively.
(ビークース(J、W、 Peters)インターナシ
ョナル・エレクトロン・ディバイシス・ミーティング(
工nternational Electron De
vices Meating119B1年12月軍10
5ページ参照)
上記(1)テ(1の方法てtま、波14175〜195
nmの光によって励起した電気的に中性な0原子がS
iH4と反応し、5i02を形成する。(B.C. (J.W. Peters) International Electron Devices Meeting (
International Electron De
vices Meeting 119B1 December Army 10
(See page 5) Above (1) Te (Method of 1) wave 14175-195
An electrically neutral 0 atom excited by nm light becomes S
Reacts with iH4 to form 5i02.
また、(2)式の方法では、容器(4)内に水銀を入れ
ておき、水銀蒸気の雰囲気にし、波長253.’i’n
mの光により水銀を励起する。励起された水銀(H,)
はN20を分子i’ll L、、基底状態のO原子がで
き、SiH4と反応し5iL12を形成する。In addition, in the method of formula (2), mercury is placed in the container (4) to create an atmosphere of mercury vapor, and the wavelength is 253. 'i'n
The mercury is excited by m light. excited mercury (H,)
forms N20 as a molecule i'll L, which forms an O atom in the ground state and reacts with SiH4 to form 5iL12.
これらの5i02の生成速度は、(1)式の場合は5〜
6 nm7分であり、(2)式の場合は13 nm 7
分である。The generation rate of these 5i02 is 5 to 5 in the case of formula (1).
6 nm 7 minutes, and in the case of formula (2), 13 nm 7
It's a minute.
半導体基板(1)は室温でもよいが、ヒータ又はランプ
により200℃程糺にする方が膜質が優れている020
0℃で生成し、た酸化膜は、450°Cで熱処理を行う
と、減圧CVDによる酸化膜よりもエツチング速度が遅
く、−ややち密1てなる。才だ、絶縁耐圧も5.7〜6
.0MV/cmとCVDによる酸化111.′−と同程
度でめる0
光学系(7)、(9)により転写マスク(3)のパター
ンを半導体基板(1)上に、縮少1等寸、又は拡大投射
することができる。The semiconductor substrate (1) may be heated at room temperature, but the film quality is better if it is glued to about 200°C using a heater or lamp020
When an oxide film formed at 0°C is heat-treated at 450°C, the etching rate is slower than that of an oxide film formed by low pressure CVD, and the film becomes slightly denser. It has a dielectric strength of 5.7 to 6.
.. 0MV/cm and CVD oxidation 111. The pattern of the transfer mask (3) can be projected onto the semiconductor substrate (1) using the optical systems (7) and (9), either in reduced size or enlarged.
なお、反応流体に光化学反応をさせる光源として、上記
実施例では水銀ラングを用いた場合を示したが、他の独
の光源、例えば気体レーザであってもよい。In addition, although the above-mentioned embodiment shows a case where a mercury rung is used as a light source for causing a photochemical reaction in a reaction fluid, other light sources such as a gas laser may be used.
まだ、反応流体として、上記実施例てQ、1反応ガスで
ある5i)14及びIv2oを用い、シリコン酸化膜を
形成したが、他の釉の反応ガスを用い、他の柿の薄膜を
形成してもよく、犯合によっては、反応溶液(例えば、
臭素溶成、ヨウ素浴液々ど)を用い、半導体基板を浸し
てもよい。Although a silicon oxide film was formed using 5i) 14 and Iv2o, which are Q and 1 reaction gases, as reaction fluids in the above example, other persimmon thin films were formed using other glaze reaction gases. Depending on the crime, the reaction solution (e.g.
The semiconductor substrate may be immersed using a bromine solution, iodine bath liquid, etc.
さらに、場合によってQ」、容器(4)内の反応ガスは
減圧しなくてもよく、大気圧程度であってもよい。なお
また、場合によっては、第2の光学系(9)は省いても
よい。Further, in some cases, the reaction gas in the container (4) may not be under reduced pressure, but may be at about atmospheric pressure. Furthermore, depending on the case, the second optical system (9) may be omitted.
以上のように、この発明によれば、光化学反応をさせる
光を敷写マスクに通1〜、反応流体雰囲気中の半導体基
板上に照射し所要パターンの薄膜を形成するようにした
ので、微細パターンのF7膜がり、9時間で容易にでき
、安価に加工される。As described above, according to the present invention, the light that causes a photochemical reaction is passed through the transfer mask and irradiated onto the semiconductor substrate in the reaction fluid atmosphere to form a thin film with a desired pattern. The F7 film can be easily formed in 9 hours and processed at low cost.
第1図(A1−(C)は従来の加工方法を工程順に示す
半導体装置の要部断面図、第2図はこの発明の一実施例
による加工方法を示す加工装置の概髪構成図である。
l・半導体基板、4・・・密閉容器、6・・・光縣、7
・・・第1の光学系、8・・・転写マスク、9・・・第
2の光字糸、lO・・・怜膜
なお、図中同一?’−f @は同−又は相当部分を示す
。
代理人 S 野 信 −(外1名)
第1図
第2図
特許庁長官殿
1、事件の表示 特願昭57−178025号2
、発明の名称 半導体装置の加工方法3、補正をす
る者
三の対象
膚の「発明の詳細な説明」の欄。
6、補正の内容
明細書第5ページ第20行の[(例えば−m−溶液など
)」を削除する。
以上FIG. 1 (A1-(C) is a sectional view of a main part of a semiconductor device showing a conventional processing method in the order of steps, and FIG. 2 is a general configuration diagram of a processing device showing a processing method according to an embodiment of the present invention. l. Semiconductor substrate, 4... Airtight container, 6... Hikari, 7
...First optical system, 8...Transfer mask, 9...Second optical string, lO...Reimei Is it the same in the figure? '-f @ indicates the same or equivalent part. Agent Nobu S No - (1 other person) Figure 1 Figure 2 Mr. Commissioner of the Japan Patent Office 1, Indication of the case Patent Application No. 178025-1982 2
, title of the invention, semiconductor device processing method 3, subject skin of person making the amendment 3, "Detailed description of the invention" column. 6. Delete [(e.g. -m-solution, etc.)" on page 5, line 20 of the statement of contents of the amendment. that's all
Claims (1)
光化学反応をきせる光を光源から投射し、この投射光を
光学系により調ζ4し転写マスク上に当て、この転写マ
スクを通った投射光により上記半導体基板上を照射し、
所要パターンの#膜を形成することを特徴とする半導体
装置の加工方法0A semiconductor substrate is placed in a reaction fluid atmosphere, a light source projects light that causes a photochemical reaction onto the reaction fluid, this projected light is adjusted by an optical system and applied onto a transfer mask, and the projected light that passes through this transfer mask causes Irradiating the above semiconductor substrate,
Processing method 0 of a semiconductor device characterized by forming a # film with a desired pattern
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17802582A JPS5967623A (en) | 1982-10-09 | 1982-10-09 | Processing method for semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17802582A JPS5967623A (en) | 1982-10-09 | 1982-10-09 | Processing method for semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5967623A true JPS5967623A (en) | 1984-04-17 |
Family
ID=16041262
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17802582A Pending JPS5967623A (en) | 1982-10-09 | 1982-10-09 | Processing method for semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5967623A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59194440A (en) * | 1983-04-18 | 1984-11-05 | Mitsubishi Electric Corp | Pattern forming apparatus |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5023570A (en) * | 1973-06-29 | 1975-03-13 | ||
JPS50130369A (en) * | 1974-04-01 | 1975-10-15 |
-
1982
- 1982-10-09 JP JP17802582A patent/JPS5967623A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5023570A (en) * | 1973-06-29 | 1975-03-13 | ||
JPS50130369A (en) * | 1974-04-01 | 1975-10-15 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59194440A (en) * | 1983-04-18 | 1984-11-05 | Mitsubishi Electric Corp | Pattern forming apparatus |
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