JPS5931217B2 - Microwave integrated circuit package - Google Patents

Microwave integrated circuit package

Info

Publication number
JPS5931217B2
JPS5931217B2 JP54043965A JP4396579A JPS5931217B2 JP S5931217 B2 JPS5931217 B2 JP S5931217B2 JP 54043965 A JP54043965 A JP 54043965A JP 4396579 A JP4396579 A JP 4396579A JP S5931217 B2 JPS5931217 B2 JP S5931217B2
Authority
JP
Japan
Prior art keywords
integrated circuit
microwave integrated
input
support plate
metal base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54043965A
Other languages
Japanese (ja)
Other versions
JPS55138264A (en
Inventor
彰 泉
良明 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54043965A priority Critical patent/JPS5931217B2/en
Publication of JPS55138264A publication Critical patent/JPS55138264A/en
Publication of JPS5931217B2 publication Critical patent/JPS5931217B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 本発明はセラミックあるいはサフアイヤなどの絶縁体基
板上に構成されたマイクロ波集積回路を収容するための
改良されたパッケージの構成に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improved package construction for housing a microwave integrated circuit constructed on an insulating substrate such as ceramic or sapphire.

一般にマイクロ波集積回路用パッケージは、マイクロ波
集積回路を構成するたとえばセラミック基板を、支持板
となる金属ベース上に該金属ベースの主面に対して水平
方向で搭載支持せしめ、さらに、金属ベースに該金属ベ
ースと絶縁されかつ5 その主面に対して垂直方向で導
出して設りられた入出力端子を前記マイクロ波集積回路
の入出力線路端部と接続する構成になつている。
In general, a package for a microwave integrated circuit includes, for example, a ceramic substrate constituting the microwave integrated circuit, which is mounted and supported on a metal base serving as a support plate in a direction horizontal to the main surface of the metal base. Input/output terminals, which are insulated from the metal base and extended in a direction perpendicular to the main surface thereof, are connected to input/output line ends of the microwave integrated circuit.

しかるに、このような構成においては、マイクロ波集積
回路の入出力線路端部の延長方向と入出力端子の導出1
0方向とが必然的に直交する関係になり、特にマイクロ
波帯において、これら入出力線路端部と入出力端子との
接続部におりるインピーダンスのマッチングが困難なた
め、接続作業時の調整作業工数の増大を沼いていた。ま
たこのようなパッケージ15を配線基板あるいはシャー
シに実装してマイクロ波装置を構成する場合、パッケー
ジの占める実装面積が大きくなり装置の小形化の障害と
もなつていた。本発明は以上の点に鑑みなされたもので
、その20目的はマイクロ波集積回路の入出力線路端部
と入出力端子との接続部におUるインピーダンス・マッ
チングを容易にし、またパッケージの実装面積を小さく
してマイクロ波装置の小形化を可能にした構成を有する
マイクロ波集積回路用パッケージ25の提供にあり、そ
の特徴は、収容されるべきマイクロ波集積回路を構成す
る基板を、入出力端子をそなえた金属支持板の主面に対
して垂直な方向となるよう該支持板の凹溝に嵌合させて
該マイクロ波集積回路基板の導体膜が該支持板の凹溝部
で接30続されて搭載支持されるとともに、前記マイク
ロ波集積回路の線路端部がその延長方向に延びるように
前記入出力端子に接続され、該支持板に金属ケースが被
着せしめられてなる構成を有するところにある。
However, in such a configuration, the extension direction of the input/output line end of the microwave integrated circuit and the lead-out 1 of the input/output terminal are
0 direction is inevitably perpendicular to the 0 direction, and it is difficult to match the impedance at the connection between these input/output line ends and input/output terminals, especially in the microwave band, so adjustment work is required during connection work. They were worried about the increase in man-hours. Further, when such a package 15 is mounted on a wiring board or a chassis to configure a microwave device, the mounting area occupied by the package becomes large, which becomes an obstacle to miniaturization of the device. The present invention has been made in view of the above points, and its 20 objectives are to facilitate impedance matching at the connection between the input/output line ends and input/output terminals of a microwave integrated circuit, and to facilitate package mounting. The present invention is to provide a package 25 for a microwave integrated circuit having a configuration that enables miniaturization of the microwave device by reducing the area. The conductor film of the microwave integrated circuit board is connected at the groove portion of the support plate by fitting the terminal into the groove of the metal support plate in a direction perpendicular to the main surface of the metal support plate. the microwave integrated circuit is mounted and supported, the line end of the microwave integrated circuit is connected to the input/output terminal so as to extend in the direction of extension thereof, and a metal case is attached to the support plate. It is in.

35第1図は本発明に係るマイクロ波集積回路用パッケ
ージの概略構成の一例を説明するための要部斜視図であ
り、第2図は第1図のA−A筒面図であつて、第1図お
よび第2図にお6る同一部分はは同一符号で示してある
35 FIG. 1 is a perspective view of essential parts for explaining an example of a schematic configuration of a package for a microwave integrated circuit according to the present invention, and FIG. 2 is a cylindrical view taken along line A-A in FIG. Identical parts in FIGS. 1 and 2 are designated by the same reference numerals.

両図において1は支持板となるたとえば金属ベースであ
つて、この金属ベース1にはその主面に対して垂直方向
に導出した入力端子2、出力端子3およびその他の外部
接続リード4が、たとえばガラスなどの絶縁体5を介し
て各々配設してある。なお入出力端子2,3は各々所定
の特性インビーダンスになるよう構成されている。また
6は収容すべきマイクロ波集積回路を構成するたとえば
セラミツク基板であつてセラミツク基板6の一点鎖線で
囲んで示した領域には増幅回路あるいは発振回路などの
マイクロ波集積回路7が構成され、さらにそのマイクロ
波集積回路7からは、入力線路の端部8、出力線路の端
部9およびその他のたとえぱバイアス電圧印加用の配線
端部100j各々導出して配設してあり、またセラミツ
ク基板6の裏側面に導体膜11が被着してある。そして
金属ベース1上に形成して凹状の溝12にセラミツク基
板6を嵌合し、金属ベース1とセラミツク基板裏面の導
体膜11とをたとえば半田あるいは銀などの導電性接着
材13で接着することにより、セラミツク基板6を金属
ベース1上に、その金属ベースの主面に対して垂直方向
となる形で搭載支持せしめ、かつ導体膜11と金属ベー
ス1との電気的接続を完全ならしめてある。このように
セラミツク基板6を金属ベース1上に、該金属ベースの
主面に対して垂直方向に搭載支持せしめることにより、
マイクロ波集積回路7から導出した入力線路端部8およ
び出力線路端部9の導出方向と入力端子2および出力端
子3の導出方向とを同一ないし平行関係にすることがで
きる。そして特にマイクロ波帯にお6るインピーダンス
・マツチングを必要とする入力線路端部8および出力線
路端部9は、入力端子2および出力端子3の各々に、折
れ曲がることなく平行関係で直接、たとえば半田あるい
は銀などの導電性接着材14で接着して接続されて、こ
れら接続部におりるインピーダンスのマツチングを容易
ならしめている。また特にインピーダンス・マツチング
を必要としないたとえばバイアス電圧印加用の配線端部
10は外部接続リード4に各々ボンデイングワイヤ15
でワイヤボンデイングされ、さらに金属キヤツプ16と
金属ベース1とをたとえば電気溶接などで溶着して気密
封止してある。このような構成は従来の、金属ベース上
にその主面に対して水平方向にセラミツク基板を塔載支
持せしめた構成に比べて、当然金属ベースの主面の面積
を小さくすることができ、配線基板あるいはシヤーシへ
実装してマイクロ波装置を構成するに当たり、その装置
の小形化も可能となる。なお前述の実施例では金属ベー
スに形成した凹状の溝にセラミツク基板を嵌合し、金属
ベースとセラミツク基板の導体膜とを導電性接着材で接
着して金属ベース上にセラミツク基板を搭載支持せしめ
たが、第3図に示すごとく、金属ベース17に形成した
凹状の溝18の中に板状の金属バネ19を埋設し、セラ
ミツク基板20をその金属バネ19に挿嵌して支持せし
めることもできる。
In both figures, 1 is a support plate, for example, a metal base, and this metal base 1 has input terminals 2, output terminals 3, and other external connection leads 4 led out in a direction perpendicular to its main surface, for example. They are each arranged via an insulator 5 such as glass. Note that the input/output terminals 2 and 3 are each configured to have a predetermined characteristic impedance. Reference numeral 6 denotes a ceramic substrate, for example, which constitutes a microwave integrated circuit to be accommodated, and a microwave integrated circuit 7 such as an amplifier circuit or an oscillation circuit is constituted in the area surrounded by the dashed line of the ceramic substrate 6. From the microwave integrated circuit 7, an input line end 8, an output line end 9, and other wiring ends 100j for applying a bias voltage are led out, and a ceramic substrate 6 is provided. A conductive film 11 is adhered to the back side of the. Then, the ceramic substrate 6 is fitted into the concave groove 12 formed on the metal base 1, and the metal base 1 and the conductive film 11 on the back surface of the ceramic substrate are bonded together with a conductive adhesive 13 such as solder or silver. Thus, the ceramic substrate 6 is mounted and supported on the metal base 1 in a direction perpendicular to the main surface of the metal base, and the electrical connection between the conductor film 11 and the metal base 1 is made perfect. By mounting and supporting the ceramic substrate 6 on the metal base 1 in a direction perpendicular to the main surface of the metal base in this way,
The direction in which the input line end 8 and the output line end 9 are led out from the microwave integrated circuit 7 and the direction in which the input terminal 2 and the output terminal 3 are led out can be the same or parallel. The input line end 8 and the output line end 9, which require impedance matching particularly in the microwave band, are directly connected to the input terminal 2 and the output terminal 3 in a parallel relationship without bending, for example, by soldering. Alternatively, they may be adhesively connected using a conductive adhesive 14 such as silver to facilitate impedance matching at these connections. In addition, for example, wiring ends 10 for applying a bias voltage that do not require impedance matching are connected to external connection leads 4 by bonding wires 15.
The metal cap 16 and the metal base 1 are then welded together by, for example, electric welding or the like to be hermetically sealed. Compared to the conventional configuration in which a ceramic substrate is mounted and supported on a metal base in a direction horizontal to its main surface, this type of structure naturally allows the area of the main surface of the metal base to be reduced, making wiring easier. When a microwave device is constructed by mounting it on a substrate or chassis, the device can be made smaller. In the above-mentioned embodiment, the ceramic substrate is fitted into a concave groove formed in the metal base, and the metal base and the conductive film of the ceramic substrate are bonded with a conductive adhesive so that the ceramic substrate is mounted and supported on the metal base. However, as shown in FIG. 3, a plate-shaped metal spring 19 may be embedded in a concave groove 18 formed in the metal base 17, and the ceramic substrate 20 may be supported by being inserted into the metal spring 19. can.

以上のように本発明は、収容されるべきマイク口波集積
回路を構成する基板を、支持板上に該支持板の主面に対
して垂直方向に搭載支持せしめることにより、マイクロ
波集積回路の入出力線路端部の導出方向と入出力端子の
導出方向とを同一ないし平行関係で構成することができ
、これら入出力線路端部と入出力端子との各接続部での
インピーダンス・マツチングが容易にでき、接続作業工
数の低減が可能となり、また配線基板あるいはシヤーシ
などの上にマイクロ波装置を構成するに当たり、実装面
積を小さくすることができて、その装置の小形化にも有
効である。
As described above, the present invention allows the microwave integrated circuit to be accommodated by mounting and supporting the substrate constituting the microwave integrated circuit on the support plate in a direction perpendicular to the main surface of the support plate. The lead-out direction of the input/output line end and the lead-out direction of the input/output terminal can be configured in the same or parallel relationship, making impedance matching easy at each connection between the input/output line end and the input/output terminal. This makes it possible to reduce the number of connection work steps, and when configuring a microwave device on a wiring board or chassis, the mounting area can be reduced, which is effective in downsizing the device.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に係るマイクロ波集積回路用パツケージ
の概略構成の一例を説明するための要部斜視図、第2図
は第1図のA−N1断面図、第3図は金属ベース上にセ
ラミツク基板を支持せしめるための他の例の概略構造を
説明するための要部拡大断面図である。 1,17:金属ベース、2:入力端子、3:出力端子、
4:外部接続リード、5:絶縁体、6,20:セラシツ
ク基板、7リマイクロ波集積回路、8:入力線路端部、
9:出力線路端部、10:バイアス電圧印加用配線端部
、11:導体膜、12,18:凹状の溝、13,14:
導電性接着材、15:ポンデイングワイヤ、16:金属
キヤツプ、19:板状金属バネ。
FIG. 1 is a perspective view of essential parts for explaining an example of the schematic configuration of a package for a microwave integrated circuit according to the present invention, FIG. 2 is a sectional view taken along A-N1 in FIG. 1, and FIG. FIG. 4 is an enlarged sectional view of a main part for explaining a schematic structure of another example for supporting a ceramic substrate. 1, 17: Metal base, 2: Input terminal, 3: Output terminal,
4: External connection lead, 5: Insulator, 6, 20: Ceramic substrate, 7 Microwave integrated circuit, 8: Input line end,
9: Output line end, 10: Bias voltage application wiring end, 11: Conductor film, 12, 18: Concave groove, 13, 14:
Conductive adhesive, 15: Ponding wire, 16: Metal cap, 19: Plate metal spring.

Claims (1)

【特許請求の範囲】[Claims] 1 収容されるべきマイクロ波集積回路を構成する基板
を、入出力端子をそなえた金属支持板の主面に対して垂
直な方向となるよう該支持板の凹溝に嵌合させて該マイ
クロ波集積回路基板の導体膜が該支持板の凹溝部で接続
されて搭載支持されるとともに、前記マイクロ波集積回
路の線路端部がその延長方向に延びるように前記入出力
端子に接続され、該支持板に金属ケースが被着せしめら
れてなる構成を有することを特徴とするマイクロ波集積
回路用パッケージ。
1. The substrate constituting the microwave integrated circuit to be accommodated is fitted into the groove of the metal support plate provided with input/output terminals in a direction perpendicular to the main surface of the metal support plate, and the microwave integrated circuit is inserted into the groove. The conductor film of the integrated circuit board is connected to and supported by the groove of the support plate, and the line end of the microwave integrated circuit is connected to the input/output terminal so as to extend in the direction of extension thereof, and the support plate A package for a microwave integrated circuit characterized by having a structure in which a metal case is attached to a plate.
JP54043965A 1979-04-11 1979-04-11 Microwave integrated circuit package Expired JPS5931217B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54043965A JPS5931217B2 (en) 1979-04-11 1979-04-11 Microwave integrated circuit package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54043965A JPS5931217B2 (en) 1979-04-11 1979-04-11 Microwave integrated circuit package

Publications (2)

Publication Number Publication Date
JPS55138264A JPS55138264A (en) 1980-10-28
JPS5931217B2 true JPS5931217B2 (en) 1984-07-31

Family

ID=12678412

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54043965A Expired JPS5931217B2 (en) 1979-04-11 1979-04-11 Microwave integrated circuit package

Country Status (1)

Country Link
JP (1) JPS5931217B2 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60103842U (en) * 1983-12-20 1985-07-15 ティーディーケイ株式会社 Package structure of hybrid integrated circuit
JPS6221301A (en) * 1985-07-22 1987-01-29 Nec Corp Dielectric resonator filter
US4975763A (en) * 1988-03-14 1990-12-04 Texas Instruments Incorporated Edge-mounted, surface-mount package for semiconductor integrated circuit devices
US5198318A (en) * 1989-06-06 1993-03-30 Fuji Electric Co., Ltd. Bisazo photoconductor for electrophotography
US5275898A (en) * 1989-06-06 1994-01-04 Fuji Electric Co., Ltd. Bisazo photoconductor for electrophotography
US5316881A (en) * 1991-12-27 1994-05-31 Fuji Electric Co., Ltd. Photoconductor for electrophotgraphy containing benzidine derivative
JPH05224439A (en) * 1992-02-12 1993-09-03 Fuji Electric Co Ltd Electrophotographic sensitive body
JPH11505957A (en) 1995-05-26 1999-05-25 ランバス・インコーポレーテッド Chip socket assembly and chip file assembly for semiconductor chips
US20020055285A1 (en) 1999-12-20 2002-05-09 Rambus, Inc. Chip socket assembly and chip file assembly for semiconductor chips
US6234820B1 (en) 1997-07-21 2001-05-22 Rambus Inc. Method and apparatus for joining printed circuit boards
US6002589A (en) 1997-07-21 1999-12-14 Rambus Inc. Integrated circuit package for coupling to a printed circuit board

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4811349B1 (en) * 1967-10-09 1973-04-12
JPS5224542B2 (en) * 1973-12-19 1977-07-01

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4811349U (en) * 1971-06-18 1973-02-08
JPS5533646Y2 (en) * 1975-08-12 1980-08-09

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4811349B1 (en) * 1967-10-09 1973-04-12
JPS5224542B2 (en) * 1973-12-19 1977-07-01

Also Published As

Publication number Publication date
JPS55138264A (en) 1980-10-28

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