JPS5925821U - Frequency characteristic adjustment circuit - Google Patents
Frequency characteristic adjustment circuitInfo
- Publication number
- JPS5925821U JPS5925821U JP10738682U JP10738682U JPS5925821U JP S5925821 U JPS5925821 U JP S5925821U JP 10738682 U JP10738682 U JP 10738682U JP 10738682 U JP10738682 U JP 10738682U JP S5925821 U JPS5925821 U JP S5925821U
- Authority
- JP
- Japan
- Prior art keywords
- adjustment circuit
- frequency characteristic
- characteristic adjustment
- filter
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の基本的構成を示すブロック図、第2図
及び第3図は本考案に用いるフィルタ特性の一例を示す
線図、第4図は本考率による低域減衰及び増強特性の一
例を示す線図、第5図は本考案による高域減衰及び増強
特性の一例を示す線図、第6図及び第7図はそれぞれ本
考案による低域音質調整回路の例を示す略式回路図及び
その可変抵抗器示す接続図、第8図は本考案による高域
音質゛調整回路の例を示す略式回路図、第9図及び第1
0図はその連動可変抵抗器を示す接続図である。
1・・・・・・入力端子、2,10・・・・・・低域又
は高域通過フィルタ、3・・・・・・演算回路、4・・
・・・・加算器、5・・・・・・出力端子、X、 Y、
Z、 Y’、 Z’、 Y″及びZ″・・・・・・遮
断周波数可変手段。Figure 1 is a block diagram showing the basic configuration of the present invention, Figures 2 and 3 are diagrams showing examples of filter characteristics used in the present invention, and Figure 4 is the low-frequency attenuation and enhancement characteristics based on this consideration factor. FIG. 5 is a diagram showing an example of the high-frequency attenuation and enhancement characteristics according to the present invention, and FIGS. 6 and 7 are schematic circuits showing examples of the low-frequency sound quality adjustment circuit according to the present invention. Figure 8 is a schematic circuit diagram showing an example of the high frequency sound quality adjustment circuit according to the present invention, Figure 9 and 1 are connection diagrams showing the variable resistor.
Figure 0 is a connection diagram showing the interlocking variable resistor. 1... Input terminal, 2, 10... Low-pass or high-pass filter, 3... Arithmetic circuit, 4...
...Adder, 5...Output terminal, X, Y,
Z, Y', Z', Y'' and Z''... Cutoff frequency variable means.
Claims (1)
他方が高域通過フイタである第1及び第2のフィルタと
、上記第1−のフィル゛りの出力に可変になされた係数
を掛算する演算手段と、上記演算手段の出力と上記第2
のフィルタの出力とを加算する手段とを有し、上記第1
及び第2のフィルタの遮断周波数を上記係数と連動可変
にしたことを特徴とする周波数特性調整回路。A common input signal is applied, one is a low-pass filter,
first and second filters, the other of which is a high-pass filter; arithmetic means for multiplying the output of the first filter by a variable coefficient;
and means for adding the output of the first filter.
and a frequency characteristic adjustment circuit characterized in that the cutoff frequency of the second filter is made variable in conjunction with the coefficient.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10738682U JPS5925821U (en) | 1982-07-14 | 1982-07-14 | Frequency characteristic adjustment circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10738682U JPS5925821U (en) | 1982-07-14 | 1982-07-14 | Frequency characteristic adjustment circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5925821U true JPS5925821U (en) | 1984-02-17 |
JPH0230908Y2 JPH0230908Y2 (en) | 1990-08-21 |
Family
ID=30250929
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10738682U Granted JPS5925821U (en) | 1982-07-14 | 1982-07-14 | Frequency characteristic adjustment circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5925821U (en) |
-
1982
- 1982-07-14 JP JP10738682U patent/JPS5925821U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH0230908Y2 (en) | 1990-08-21 |
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