JPS5925483A - Solid state image pickup device - Google Patents
Solid state image pickup deviceInfo
- Publication number
- JPS5925483A JPS5925483A JP57135167A JP13516782A JPS5925483A JP S5925483 A JPS5925483 A JP S5925483A JP 57135167 A JP57135167 A JP 57135167A JP 13516782 A JP13516782 A JP 13516782A JP S5925483 A JPS5925483 A JP S5925483A
- Authority
- JP
- Japan
- Prior art keywords
- horizontal
- shift register
- vertical
- scanning
- register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/30—Transforming light or analogous information into electric information
Abstract
Description
【発明の詳細な説明】
本発明は、固体撮像装置の読み出し走査回路に関するも
のである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a readout scanning circuit for a solid-state imaging device.
第１図は、従来の実施例で、ここでは固体撮像素子中Ｍ
Ｏ８形撮像素子の例を示す。FIG. 1 shows a conventional embodiment, in which M in a solid-state image sensor is shown.
An example of an O8 type image sensor is shown.
■は光信号を検知し、電気信号に変換する受光ダイオ−
ドである３、２は垂直スイッチトランジスタて、３は水
平スイッチトランジスタであり、水平シフトレジスタ４
と垂直シフトレジスタ５の容貌み出し走査のパルスによ
り、各方向に１幀次ゲートしていき、各受光ダイオード
１の電気信号（Ａ、□〜Ａｎ−ｎ）を読み出す。この順
次読み出された信号（Ａ＋−＋〜Ａｎ−ｎ）は、出力信
号（５として得られる。■ is a light receiving diode that detects optical signals and converts them into electrical signals.
The code 3, 2 is a vertical switch transistor, 3 is a horizontal switch transistor, and the horizontal shift register 4 is a vertical switch transistor.
With pulses for facial expression scanning of the vertical shift register 5, gates are firstly gated in each direction, and electrical signals (A, □ to An-n) of each light receiving diode 1 are read out. These sequentially read signals (A+-+ to An-n) are obtained as an output signal (5).
水平シフトレジスタ４には、水平クロックパルス７と水
平クロック転送パルス８及び水平走査スタートパルス９
が加えられており、矢印１１１の方向に順次走査を行な
う。また垂直ノフトレジスタ５も同様に垂直クロックパ
ルス１０．垂直クロック転送パルスＩＩ、及び垂直走査
スター）・パルス１２が加えられて、矢印１：３の方向
に順次走査される。The horizontal shift register 4 includes a horizontal clock pulse 7, a horizontal clock transfer pulse 8, and a horizontal scanning start pulse 9.
is added, and sequential scanning is performed in the direction of arrow 111. Similarly, the vertical noft register 5 receives the vertical clock pulse 10. A vertical clock transfer pulse II and a vertical scan star pulse 12 are applied to sequentially scan in the direction of arrow 1:3.
即ち、水平７フトレジスタ４及びｊｌ「直シフトレジス
タ５の走査により、水平スイッチトランジスタ３は矢印
】／Ｉの方向に順次切替えられ、また垂直スイッチトラ
ンジスタ２は矢印１３の方向に順次切替え走査される。That is, by scanning the horizontal 7-shift register 4 and the direct shift register 5, the horizontal switch transistor 3 is sequentially switched in the direction of the arrow ]/I, and the vertical switch transistor 2 is sequentially switched and scanned in the direction of the arrow 13. .
これによって各受光ダイオード１の信号は、 ＡＨ−
４ＡＨ−２・・・・・・・・・Ａ、−ｎ、Ａ２−、 、
Ａ２−２ 。As a result, the signal of each photodetector diode 1 becomes AH-
4AH-2・・・・・・A, -n, A2-, ,
A2-2.
””” Ａ２−ｎ ＋ ””” ＋ Ａ、−１、Ａｎ−
２・・・・・−Ａ、−、の順に読み出される。一般的に
は、垂直方向Ａ１−１〜Ａｎ −１がテレビジョン信号
の走査線数５００本程度々有し。""" A2-n + """ + A, -1, An-
2...-A, -, are read out in this order. Generally, the vertical direction A1-1 to An-1 has about 500 scanning lines of television signals.
また水平方向のＡ、、〜Ａｌ−ｎがテレビジョン信号の
階像度を決めるもので３００〜５００をイイする。Further, A, . . . -Al-n in the horizontal direction determines the gradation of the television signal, and is preferably 300 to 500.
ここで、−読み出し走査方向は一定方向に決められてい
るため、従来のこの様な固体撮像装置で。Here, - Since the readout scanning direction is determined to be a fixed direction, in a conventional solid-state imaging device like this.
被写体像と左右逆、上下逆あるいは左右・上下とも逆の
画像を得たい場合、その画像処理は非常に困Ｉｔ！Ｉｆ
となる。If you want to obtain an image that is horizontally, vertically, or both horizontally and vertically reversed from the subject image, image processing is extremely difficult! If
becomes.
本発明は、前述のように従来読み出し走査方向に決めら
れていた固体撮像装置を、水平走査の読み出し方向及び
または垂直走査の読み出し方向を。The present invention, as described above, replaces the conventional solid-state imaging device with a readout scanning direction determined by a horizontal scanning readout direction and/or a vertical scan readout direction.
各々仕様用途に応じて選択できるようにしたものであり
、その目的は、固体撮像装置の画像処理等の応用分野の
拡大にある。Each type can be selected according to the intended use, and the purpose is to expand the field of application of solid-state imaging devices, such as image processing.
第２図は１本実施例の構成図で、固体撮像素子中のＭＯ
８形素子を用いた実施例で示す。Figure 2 is a block diagram of one embodiment, showing the MO in the solid-state image sensor.
An example using an 8-type element will be shown.
１〜１４まで及びその構成は、前述第１図の従来の実施
例と全く同様なので省略する。1 to 14 and their configurations are completely the same as the conventional embodiment shown in FIG. 1, so their description will be omitted.
従来の第１の水平シフトレジスタ４と並列に第２の水平
７フトレジスタ１９を設け、第１の水平シフトレジスタ
４は矢印１４の方向に走査して信号を読み出し、・出力
信号６を得るが、第２の水平シフトレジスタ１９は、矢
印２０の方向に走査し、即ち、第１の水平シフトレジス
タ４と逆方向に走査し、信号出力６に信号を得るように
構成されている。A second horizontal 7-ft register 19 is provided in parallel with the conventional first horizontal shift register 4, and the first horizontal shift register 4 scans in the direction of the arrow 14 to read out the signal and obtain the output signal 6. , the second horizontal shift register 19 is arranged to scan in the direction of the arrow 20, ie in the opposite direction to the first horizontal shift register 4, and to obtain a signal at the signal output 6.
第２の水平シフトレジスタ１９は、第１水平シフトレジ
スタ４と同様に水平グロックパルス７と水平クロック転
送パルス８及ヒ水平スタートパルス９が加わるが、転送
の方向が、第１水平ンフトレジスタ４と反対走査方向に
設り゛られている。The second horizontal shift register 19 receives a horizontal clock pulse 7, a horizontal clock transfer pulse 8, and a horizontal start pulse 9 in the same way as the first horizontal shift register 4, but the transfer direction is different from that of the first horizontal shift register 4. It is installed in the opposite scanning direction.
１６は、第１のシフトレジスタ４の出力に設けたゲート
スイッチトランジスタで２人力制御信号１７によってゲ
ートスイッチ１６をオン・オフ制御する。Reference numeral 16 denotes a gate switch transistor provided at the output of the first shift register 4, and controls the gate switch 16 on and off using a two-manpower control signal 17.
また１５は水平シフトレジスタ１９の出力に設けたゲー
トスイッチトランジスタで９人力制御信号１８によりゲ
ートスイッチ１５をオン・オフ制御する。Reference numeral 15 denotes a gate switch transistor provided at the output of the horizontal shift register 19, and controls the gate switch 15 on and off using a human control signal 18.
この人力制御信号１７ 、１８により、第１の水平シフ
トレジスタ４と、第２の水平シフトレジスタ１９とを切
替える。The first horizontal shift register 4 and the second horizontal shift register 19 are switched by the human control signals 17 and 18.
ここで９例えば人力制御信号１８として所定電圧を与え
９人力制御信号１７を接地電位とすることにより、第２
水平シフトレジスタ１９が動作し、出力信号６には、各
受光ダイオード１の信号がＡＩ −ｎ＋””” Ａｌ−
２、ＡＨ−、、Ａ２−、 、 ””” Ａ２−２ 、
Ａ２−１ 、 ”’−”Ａｎ−，１・・・・・・Ａ
ｎ−２＋ Ａ ｎ−１の順に読み出し走査が行なわれる
。この結果碍られる画像は被写体像と左右逆の画像とな
る。Here, for example, by applying a predetermined voltage as the human power control signal 18 and setting the human power control signal 17 to the ground potential, the second
The horizontal shift register 19 operates, and the output signal 6 includes the signals from each light receiving diode 1 as AI −n+””” Al−
2, AH-, , A2-, , “”” A2-2 ,
A2-1, ``'-''An-, 1...A
Read scanning is performed in the order of n-2+A n-1. The resulting image is a left-right reversed image of the subject image.
次に垂直７フトレジスタ部も上記内容と同様に。Next, do the same as above for the vertical 7-foot register section.
垂直シフトレジスタの走査方向が矢印１３である第１の
垂直シフトレジスタ５と、矢印】３と反対方向の走査方
向（矢印２５）である第２の垂直シフトレジスタ２４と
を並列に設ける。A first vertical shift register 5 whose scanning direction is indicated by arrow 13 and a second vertical shift register 24 whose scanning direction is opposite to arrow 3 (arrow 25) are provided in parallel.
第２の垂直シフトレジスタ２４は、第１の垂直シフトレ
ジスタ５と同じに垂直クロノクツ幻レスｌＯと。The second vertical shift register 24 has the same vertical shift register as the first vertical shift register 5.
垂直クロック転送パルス１１及び垂直スタートノ＜ルス
１２が加わって（・るが、転送の方向が、第１の垂直シ
フトレジスタ５の方向（矢印１３）と反対方向（矢印２
５）に読み出し走査されるように構成されている。２２
は第１の垂直シフトレジスタ５の出力に設けたゲートス
イッチトランジスタで１人力制御信号２６によって、ゲ
ートスイッチ２２をオン・オフ制御する。また２３は第
２の垂直シフトレジスタ２４の出力に設けたゲートスイ
ッチトランジスタで。The vertical clock transfer pulse 11 and the vertical start pulse 12 are added, but the direction of transfer is opposite to the direction of the first vertical shift register 5 (arrow 13) (arrow 2).
5) is configured to be read and scanned. 22
is a gate switch transistor provided at the output of the first vertical shift register 5, and controls the gate switch 22 on and off in response to a manual control signal 26. Further, 23 is a gate switch transistor provided at the output of the second vertical shift register 24.
人力制御信号２１によってゲートスイッチ２３をオン・
オフ制御する。The gate switch 23 is turned on by the human control signal 21.
Control off.
この人力制御信号２６．２１により第１の垂直シフトレ
ジスタ５と第２の垂直シフトレジスタ２４とを切替える
。This manual control signal 26.21 switches between the first vertical shift register 5 and the second vertical shift register 24.
ここで９例えば人力制御信号２１として所定電圧を与え
２人力制御信号２６を接地電イ３’１とすると、第一０
の垂直／フトレジスク２４の出力からのパルスを得て、
出力信号６には、各受光ダイオード１の信号がＡｎ−１
１・・・・・・Ａ２−１１ Ａ、−、と云う順に読み出
し走査が行なわれろ。この結果書られる画像は被写体像
とに１・逆の画像となる。Here, for example, if a predetermined voltage is applied as the human power control signal 21 and the human power control signal 26 is the ground voltage A3'1, then the first 0
Obtaining a pulse from the output of the vertical/vertical disk 24,
The output signal 6 includes the signal of each light receiving diode 1 as An-1.
1...A2-11 Read scanning is performed in the order of A, -, and so on. The image drawn as a result is an image that is 1/inverse to the subject image.
ヤだ、水下ンフトレジスタ部の人力制御信号１８を所定
型１１゛とし、かつ垂直ノフトレジスタ部の人）Ｊ ：
ｌ１ｌｌ （＋’ｉｌ信号２１を所定型１１．とするこ
とにより、出力信号６には、各受光ダイオードの信号が
、Ａ、。No, the manual control signal 18 of the vertical noft register section is set to a predetermined type of 11゜, and the manual control signal 18 of the vertical noft register section)J:
l1ll (+'il signal 21 is of a predetermined type 11., so that the output signal 6 includes the signals of each light receiving diode, A,.
””” Ａｎ−２＋ Ａｎ−１＋ ”””１Ａ２−ｎ
””” Ａ２−２１ Ａ２−１ ＋ＡＩ−ｎ ＋”ｔ”
’ ／Ｊ−２１Ａｌ−１の順に１読み出され、即ち。""" An-2+ An-1+ """1A2-n
""" A2-21 A2-1 +AI-n +"t"
' /J-21Al-1 is read out in the order of 1, that is.
通常のテレビジョン信号と正反対（上下・左右）の画面
が掛られる。The screen is displayed in the exact opposite direction (top and bottom, left and right) as a normal television signal.
なお１本発明は実施例に限定されず７人力制御信号１７
、１８ 、２６．２１及びゲートスイッチトランジス
タ１５ 、１６ 、２２．２３以外の別の切替手段であ
っても同様であり、第１のシフトレジスタと第２のシフ
トレジスタに加わるパルスは同じものでなく別々の分離
形であっても同様である。Note that the present invention is not limited to the embodiments;
, 18, 26.21 and gate switch transistors 15, 16, 22.23, the same applies, and the pulses applied to the first shift register and the second shift register are not the same. The same applies to separate separated forms.
また本発明は、ＭＯ３形素子以外のＣＣＤ形。The present invention also applies to CCD type elements other than MO3 type elements.
ＣＩＤ 形等にも同様に適用できることは云うまでもな
い。Needless to say, this method can be similarly applied to CID type, etc.
なお１本発明は必要に応じて、水平または垂直ンノトレ
ジスタ部の一方のみに適用してもよい。Note that the present invention may be applied to only one of the horizontal and vertical register sections, if necessary.
以上説明したごとく本発明によれば、ｆｆｉ中、な回路
構成で、読み出し走査回路を両方向走査切替え可能形と
することにより、水平およびまたは垂直走査方向を自由
に選択できるため、光像の画像電気処理（画像の上下、
左右等の逆転）が容易となり、固体撮像装置としての画
像処理、４測用カメラ、監視用カメラ等の応用分野に対
１．シでき、ひ（・ては固体撮像装置の利用拡大化を図
れる。As explained above, according to the present invention, by making the readout scanning circuit switchable for scanning in both directions in the ffi circuit configuration, the horizontal and/or vertical scanning direction can be freely selected. Processing (top and bottom of the image,
1. Reversal (left and right, etc.) is easy, and it is suitable for application fields such as image processing as a solid-state imaging device, 4-dimensional cameras, and surveillance cameras. It is possible to expand the use of solid-state imaging devices.
第１図は、従来の固体撮像装置の読５み出し走査部の一
実施例の構成図、第２図は２本発明の一実施例の構成で
ある。
１：受光ダイオード、２：垂直スイッチトランジスタ、
：つ：水平スイッチトランジスタ、 ｌ：第１の水平／
フトレジスタ、５：第１の垂直／）１−レジスタ、６：
出力信号、７：水・拍りロノクパ・・しス、８：水平ク
ロック転送パルス、５）：水平ノド昂スタートパルス、
＋ｏ：垂１！クロックパルス、１１：垂直クロック転送
パルス、 １２ ： １−１’ｉ）直ル九スタートパル
ス、 ＋５．１６．２２．２３ ニゲートスイノＪ゛ト
ラ／ジスタ、 １７． ＋８．２１，２６ ：入力制
御信号、１９：第２の水平°シフトレジスタ、２４：第
２の垂直シフトレジスタ。
第１図FIG. 1 is a configuration diagram of an embodiment of a readout scanning section of a conventional solid-state imaging device, and FIG. 2 is a configuration diagram of an embodiment of the present invention. 1: Photodetector diode, 2: Vertical switch transistor,
: tsu: horizontal switch transistor, l: first horizontal/
foot register, 5: first vertical/) 1- register, 6:
Output signal, 7: Water/beat pulse, 8: Horizontal clock transfer pulse, 5): Horizontal throat start pulse,
+o: Tare 1! Clock pulse, 11: Vertical clock transfer pulse, 12: 1-1'i) Straight nine start pulse, +5.16.22.23 NigatesuinoJtra/Jister, 17. +8.21, 26: Input control signal, 19: Second horizontal shift register, 24: Second vertical shift register. Figure 1
Claims (1)
直方向に該電気信号を順次読み出す読み出し部とを有す
る固体撮像装置にお（・て、第１の水平読み出し走査回
路と、第１の垂直読み出し走査回路と、上記第１の水平
読み出し走査回路と逆方向に読み出し走査する第２の水
平読み出し走査回路および」二記第１の垂直読み出し走
査回路と逆方向に読み出し走査する第２の垂直読み出し
走査回路のすくなくともいずれか一方を設け、かつ所望
する上記水平読み出し走査回路および垂直読み出し走査
回路を各々選択する手段を有することを特徴とする固体
撮像装置。A solid-state imaging device has a photoelectric conversion section that converts an optical signal into an electrical signal, and a readout section that sequentially reads out the electrical signals in two horizontal and vertical directions. a vertical readout scanning circuit, a second horizontal readout scanning circuit that performs readout scanning in the opposite direction to the first horizontal readout scanning circuit, and a second vertical readout scanning circuit that performs readout scanning in the opposite direction to the first vertical readout scanning circuit; What is claimed is: 1. A solid-state imaging device comprising at least one of readout scanning circuits and means for selecting a desired horizontal readout scanning circuit and vertical readout scanning circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57135167A JPS5925483A (en) | 1982-08-04 | 1982-08-04 | Solid state image pickup device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57135167A JPS5925483A (en) | 1982-08-04 | 1982-08-04 | Solid state image pickup device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5925483A true JPS5925483A (en) | 1984-02-09 |
Family
ID=15145393
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57135167A Pending JPS5925483A (en) | 1982-08-04 | 1982-08-04 | Solid state image pickup device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5925483A (en) |
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