JPS5923550A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPS5923550A JPS5923550A JP57133229A JP13322982A JPS5923550A JP S5923550 A JPS5923550 A JP S5923550A JP 57133229 A JP57133229 A JP 57133229A JP 13322982 A JP13322982 A JP 13322982A JP S5923550 A JPS5923550 A JP S5923550A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- semiconductor element
- semiconductor device
- external lead
- metal substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】 本発明は樹脂封止半導体装置に関する。[Detailed description of the invention] The present invention relates to a resin-sealed semiconductor device.
一般に、樹脂封止半導体装置は外部環境の影響を受は易
く、高信頼度の半導体装置を提供するのは難しい。特に
、金属基板と封止樹脂との密着性が充分でないために、
その境界面からの水分の侵入を完全に防止することは困
難である。Generally, resin-sealed semiconductor devices are easily affected by the external environment, and it is difficult to provide highly reliable semiconductor devices. In particular, due to insufficient adhesion between the metal substrate and the sealing resin,
It is difficult to completely prevent moisture from entering through the interface.
第1図(a)、 (b)は従来の樹脂封止半導体装置の
平面図及びA−A’断面図である。FIGS. 1(a) and 1(b) are a plan view and a sectional view taken along line AA' of a conventional resin-sealed semiconductor device.
第1図ta)e−(b)において、外部引出し導体2を
有する金属基板1上には半導体素子3が固着されておシ
、半導体素子3と他の外部引出し導体2′間は接続線4
で接続されている。そして封止樹脂5が金属基板−1,
−′外部引出し導体2,2′半導体素子3及び接続線4
全一体化封止している、。In Fig. 1 ta)e-(b), a semiconductor element 3 is fixed on a metal substrate 1 having an external lead conductor 2, and a connecting wire 4 is connected between the semiconductor element 3 and another external lead conductor 2'.
connected with. Then, the sealing resin 5 is the metal substrate-1,
-'External lead-out conductors 2, 2'Semiconductor element 3 and connection wire 4
Completely integrated and sealed.
この樹脂封止は高温中で行なわれるために、封止樹脂と
金属の熱膨張係数9着により、封止樹脂5と金属基板1
及び外部引出し導体2,2′との境界部に空隙6が生ず
る。また、半導体素子3に熱応力が加わるため封止樹脂
5との間にも空隙6を生ずる。さらに、封止樹脂は完全
に水分を遮断できないという欠点金有する。Since this resin sealing is performed at high temperatures, the sealing resin 5 and the metal substrate 1
A gap 6 is formed at the boundary with the external lead conductors 2 and 2'. Further, since thermal stress is applied to the semiconductor element 3, a gap 6 is also generated between the semiconductor element 3 and the sealing resin 5. Furthermore, the sealing resin has the disadvantage that it cannot completely block moisture.
このように樹脂封止半導体装置においては、空隙及び封
止樹脂内部からの水分が半導体素子3の逆漏れ電流の増
大等の性能劣化の原因となり、最悪の場合断線などの致
命的な故障を引きおこすことがある。In this way, in a resin-sealed semiconductor device, moisture from the voids and inside the sealing resin causes performance deterioration such as an increase in reverse leakage current of the semiconductor element 3, and in the worst case, can cause a fatal failure such as disconnection. Sometimes.
この空隙を減少する試みとして高圧成型等の対策がとら
れてきたが、半導体素子に歪み応力が加わり半導体素子
そのものにひびが入る等、良品質の物を安定的に生産す
る上で障害となる欠点があった。Countermeasures such as high-pressure molding have been taken in an attempt to reduce these voids, but this creates strain and stress on the semiconductor element, causing cracks in the semiconductor element itself, which hinders the stable production of high-quality products. There were drawbacks.
本発明の目的は上記欠点全除去し、半導体素子に対する
水分の影響を除いた高品質の樹脂封止半導体装置全提供
することにある。An object of the present invention is to eliminate all of the above-mentioned drawbacks and to provide a high-quality resin-sealed semiconductor device in which the influence of moisture on semiconductor elements is eliminated.
本発明の樹脂封止半導体装置は、外部引出し導体含有し
半導体素子を固着した金属基板と、該半導体素子と外部
引出し導体との間に接続された接続線と、前記半導体素
子と半導体素子が固着された金属基板面と外部引出し導
体の一部と接続線上とに形成された疎水性樹脂膜と、前
記金属基板と前記半導体素子と前記外部引出し導体の一
部と前記接続線とを含んで一体化封止する封止樹脂とを
含んで構成される。The resin-sealed semiconductor device of the present invention includes a metal substrate containing an external lead conductor and a semiconductor element fixed thereto, a connecting line connected between the semiconductor element and the external lead conductor, and a semiconductor element fixed to the metal substrate. a hydrophobic resin film formed on the metal substrate surface, a part of the external lead-out conductor, and the connection line; and a sealing resin to be encapsulated.
次に本発明を図面を用いて詳細に説明する。Next, the present invention will be explained in detail using the drawings.
第2図は本発明の一実施例の断面図である。FIG. 2 is a sectional view of one embodiment of the present invention.
第2図r/r−おいて、外部引出し導体2を有する金属
基板l上には半導体素子3が固着されており。In FIG. 2 r/r-, a semiconductor element 3 is fixed on a metal substrate l having an external lead conductor 2. As shown in FIG.
該半導体素子3と他Ω外部引出し導体間には接続線4が
接続している。そして、金属基板1.半導体素子3.外
部引出し導体2の一部及び接続線4上には疎水性樹脂膜
7が形成され、その周囲に封止樹脂が形成されている。A connecting wire 4 is connected between the semiconductor element 3 and the other Ω external lead-out conductor. Then, metal substrate 1. Semiconductor element 3. A hydrophobic resin film 7 is formed on a part of the external lead conductor 2 and the connection line 4, and a sealing resin is formed around the hydrophobic resin film 7.
なお、疎水性樹脂膜は、ポリイミド系樹脂等の疎水性樹
脂全塗布し、加熱硬化させることにより形成できる。Note that the hydrophobic resin film can be formed by completely applying a hydrophobic resin such as a polyimide resin and curing it by heating.
このように構成された樹脂封止半導体装置は、従来空隙
を生じていた面、すなわち、封止樹脂5と半導体素子3
.金属板1及び外部引出し導体2の一部の間に疎水性樹
脂膜7が介在するため空隙間隔も狭くなり、空隙及び封
止樹脂5がらの水分は半導体素子3に侵入することがな
くなる。The resin-sealed semiconductor device configured in this manner has the surfaces that conventionally had gaps, that is, the sealing resin 5 and the semiconductor element 3.
.. Since the hydrophobic resin film 7 is interposed between the metal plate 1 and a part of the external lead conductor 2, the gap distance is also narrowed, and moisture in the gap and the sealing resin 5 will not enter the semiconductor element 3.
従って湿気による半導体素子3の劣化が改善されるため
樹脂封止半導体装置の信頼性を大幅に向上させることが
できる。Therefore, since deterioration of the semiconductor element 3 due to moisture is improved, the reliability of the resin-sealed semiconductor device can be greatly improved.
また、疎水性樹脂膜7の存在は、半導体素子3に対する
外部からの応力全適度に減少することができ、半導体装
置の組立工程における故障要因を未然に防止することが
できる。Further, the presence of the hydrophobic resin film 7 can reduce the total stress applied to the semiconductor element 3 from the outside to an appropriate extent, and can prevent failure factors in the assembly process of the semiconductor device.
なお第2図では、金属基板1の半導体素子3が固着され
ている面の反対側の面は封止樹脂で榎われていないが、
絶縁性及び熱伝導性のよい封止樹脂を用いれば、この反
対側の面も樹脂で封止することができる。Note that in FIG. 2, the surface of the metal substrate 1 opposite to the surface to which the semiconductor element 3 is fixed is not covered with the sealing resin;
If a sealing resin with good insulation and thermal conductivity is used, the opposite side can also be sealed with the resin.
以上詳細に説明したように、本発明によれば、半導体素
子に対する水分の影響を除いた品質の高い樹脂封止半導
体が得られるのでその効果は太きい。As described above in detail, according to the present invention, a high quality resin-sealed semiconductor can be obtained which eliminates the influence of moisture on semiconductor elements, so the effect is significant.
第1図(a)、 (b)は従来の樹脂封止半導体装置の
平面図及び断面図、第2図は不発明の一実施例の断面図
である。
1・・・・・・金属基板、2.2’・・・・・・外部引
出し導体、3・・・・・・半導体素子、4・・印・接続
線、5・・・・・・封止樹脂、6・・・・・・空隙、7
・・・・・・疎水性樹脂膜。FIGS. 1(a) and 1(b) are a plan view and a sectional view of a conventional resin-sealed semiconductor device, and FIG. 2 is a sectional view of an embodiment of the invention. 1...Metal substrate, 2.2'...External lead-out conductor, 3...Semiconductor element, 4...Mark/connection wire, 5...Seal Stopper resin, 6... Void, 7
...Hydrophobic resin film.
Claims (1)
、該半導体素子と外部引出し導体との間に接続された接
続線と、前記半導体素子と半導体素子が固着された金属
基板面と外部引出し導体の一部と接続線上とに形成され
た疎水性樹脂膜と、前記金属基板と前記半導体素子と前
記外部引出し導体の一部と前記接続線とを含んで一体化
封止する封止樹脂とを含むことを特徴とする樹脂封止半
導体装置。A metal substrate having an external lead conductor and a semiconductor element fixed thereto, a connecting line connected between the semiconductor element and the external lead conductor, a surface of the metal substrate to which the semiconductor element and the semiconductor element are fixed, and the external lead conductor. a hydrophobic resin film formed on a part of the metal substrate, the semiconductor element, a part of the external lead conductor, and the connection line, and a sealing resin that integrally seals the metal substrate, the semiconductor element, a part of the external lead conductor, and the connection line. A resin-sealed semiconductor device comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57133229A JPS5923550A (en) | 1982-07-30 | 1982-07-30 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57133229A JPS5923550A (en) | 1982-07-30 | 1982-07-30 | Resin-sealed semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5923550A true JPS5923550A (en) | 1984-02-07 |
Family
ID=15099740
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57133229A Pending JPS5923550A (en) | 1982-07-30 | 1982-07-30 | Resin-sealed semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5923550A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61157697U (en) * | 1985-03-20 | 1986-09-30 | ||
EP0321083A2 (en) * | 1987-12-16 | 1989-06-21 | Ford Motor Company Limited | Composite polymer/desiccant coatings for IC encapsulation |
JPH01314124A (en) * | 1988-06-14 | 1989-12-19 | Kitai Seisakusho:Kk | Molding method of long-sized material made of synthetic resin |
JPH01314122A (en) * | 1988-06-14 | 1989-12-19 | Kitai Seisakusho:Kk | Method of molding long-sized material made of synthetic resin |
JPH01314123A (en) * | 1988-06-14 | 1989-12-19 | Kitai Seisakusho:Kk | Method of molding long-sized material made of synthetic resin |
US5883439A (en) * | 1996-03-19 | 1999-03-16 | Nec Corporation | Semiconductor device molded in plastic package free from crack by virtue of organic stress relaxation layer |
-
1982
- 1982-07-30 JP JP57133229A patent/JPS5923550A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61157697U (en) * | 1985-03-20 | 1986-09-30 | ||
EP0321083A2 (en) * | 1987-12-16 | 1989-06-21 | Ford Motor Company Limited | Composite polymer/desiccant coatings for IC encapsulation |
JPH01314124A (en) * | 1988-06-14 | 1989-12-19 | Kitai Seisakusho:Kk | Molding method of long-sized material made of synthetic resin |
JPH01314122A (en) * | 1988-06-14 | 1989-12-19 | Kitai Seisakusho:Kk | Method of molding long-sized material made of synthetic resin |
JPH01314123A (en) * | 1988-06-14 | 1989-12-19 | Kitai Seisakusho:Kk | Method of molding long-sized material made of synthetic resin |
US5883439A (en) * | 1996-03-19 | 1999-03-16 | Nec Corporation | Semiconductor device molded in plastic package free from crack by virtue of organic stress relaxation layer |
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