JPS5922449A - Oscillating device - Google Patents
Oscillating deviceInfo
- Publication number
- JPS5922449A JPS5922449A JP57132702A JP13270282A JPS5922449A JP S5922449 A JPS5922449 A JP S5922449A JP 57132702 A JP57132702 A JP 57132702A JP 13270282 A JP13270282 A JP 13270282A JP S5922449 A JPS5922449 A JP S5922449A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- oscillation
- variable
- capacitor
- section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 39
- 230000010355 oscillation Effects 0.000 claims description 27
- 239000002131 composite material Substances 0.000 claims 1
- 239000004519 grease Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
- 229910002113 barium titanate Inorganic materials 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
- H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals
Landscapes
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
【発明の詳細な説明】 本発明は可変周波数信号を必要とするラジオ。[Detailed description of the invention] The present invention is a radio requiring a variable frequency signal.
ステレオ受信機やトランシーバ送受機およびラジオ送信
機、その他一般的基準信号発生器に利用される発振装置
に関する。The present invention relates to an oscillation device used in stereo receivers, transceiver transceivers, radio transmitters, and other general reference signal generators.
従来に〜おけるＰＬＬシンセサイザ発振装置は可変キャ
パシタンス素子として電圧可変キャパシタンス素子のみ
を用いていたが、電圧可変キャパシタンス素子の電圧対
キャパシタンス特性の変化中に制限がちシ、発振周波数
ｌ〕に制限を与えていた。Conventional PLL synthesizer oscillators have used only voltage variable capacitance elements as variable capacitance elements, but this tends to limit the variation of the voltage vs. capacitance characteristics of the voltage variable capacitance elements, which limits the oscillation frequency l]. Ta.
又、その電圧対キャパシタンス特性が直線比例関係にな
（ＰＬＬのループゲインの不均一による周波数ロックア
ツプタイムの不均一が存在していた。In addition, the voltage vs. capacitance characteristic was linearly proportional (there was non-uniform frequency lock-up time due to non-uniform PLL loop gain).
更に、電圧可変キャパシタンス素子自体に電圧に対する
Ｑ値の変化が存在するだめ、発振信号レベルが周波数に
よって変化するという不都合があった。Furthermore, since the voltage variable capacitance element itself has a change in Q value with respect to voltage, there is a problem that the oscillation signal level changes depending on the frequency.
本発明の目的は、単数の電圧可変キャパシタンス素子を
用いた発振装置に簡単な伺加回路を設置して発振周波数
変化１を拡大するとともに従来例の不都合を改善し発振
器の性能を改善することにある・
第１図に本発明の一実施例の構成を示す。可変キャパシ
タ回路およびインダクタより成る可変同調器と帰還増１
１］器を含む発振部１０発振出力はＰＬＬシンセサイザ
部２の内のプリスケーラ３に入力され４の分局出力はプ
ログラマブルカウンタ４に入力され、更にその可変分周
出力は基準信号発生器５の基準信号と位相比較器６で位
相検波され、検波出力は低域側波器７を介して発振部１
の可変キャパシタ回路（図示せず）の電圧可変キャパシ
タンス素子の制御電圧として印加される。The purpose of the present invention is to increase the oscillation frequency change 1 by installing a simple addition circuit in an oscillator using a single voltage variable capacitance element, and to improve the performance of the oscillator by solving the disadvantages of the conventional example. Figure 1 shows the configuration of an embodiment of the present invention. Variable tuner and feedback amplifier 1 consisting of variable capacitor circuit and inductor
1] The oscillation output of the oscillation unit 10 including the PLL synthesizer unit 2 is input to the prescaler 3 of the PLL synthesizer unit 2, the branch output of 4 is input to the programmable counter 4, and the variable frequency division output is the reference signal of the reference signal generator 5. The phase is detected by the phase comparator 6, and the detected output is sent to the oscillator 1 via the low frequency side filter 7.
The voltage is applied as a control voltage to a voltage variable capacitance element of a variable capacitor circuit (not shown).
プログラムカウンタ４の分同比を制御する周波数設定部
８の出力信号の一部は切換制御部９を介して発振部１の
”Ｔ変キャパシタ回路（図示せず）の切換キャパシタの
切換スイッチの制御信号として印加される。A part of the output signal of the frequency setting unit 8 that controls the division ratio of the program counter 4 is transmitted via the switching control unit 9 to a control signal for the changeover switch of the switching capacitor of the T-transformed capacitor circuit (not shown) of the oscillation unit 1. is applied as .
第２図に発振部１の可変同調器（図示せず）の回路図を
示す。同調コイル１０に対する可変キャパシタは電圧可
変キャパシタ１１とそれに対して交流阻止用抵抗１２を
介し、端子１３から印加される直流制御電圧を阻止する
コンデンサ１４を介−して並列に接続されるバイナリ的
重みづけキャパシタ群１５とスイッチングダイオード１
６よりなる切換キャパシタとによって構成される。スイ
ッチングダイオード１６は電流制限用抵抗１７を介して
端子１８から印加される切換信号によってＯＮ 、ＯＦ
Ｆされる。ここで、バイナリ的重みつけキャパシタ群１
６のそれぞれのキャパシタンス関係ｔｒｉＣ２＝２Ｃ１
，Ｃ３＝２０２．・川・・０ｎ−２ｃｎ−１とし、一般
的にＣ１＝＝２ｎ ｊ・Ｃ１の関係を有するものとする
。ここで、スイッチングダイオードの代シにトランジス
タ又はＦＥＴが使用可能なことはいうまでもない。FIG. 2 shows a circuit diagram of a variable tuner (not shown) of the oscillation section 1. The variable capacitor for the tuning coil 10 is a binary weight connected in parallel to a voltage variable capacitor 11 via an AC blocking resistor 12 and a capacitor 14 blocking the DC control voltage applied from the terminal 13. attached capacitor group 15 and switching diode 1
6 switching capacitors. The switching diode 16 is turned on and off by a switching signal applied from a terminal 18 via a current limiting resistor 17.
F is given. Here, the binary weighting capacitor group 1
6, each capacitance relationship triC2=2C1
, C3=202.・River...0n-2cn-1, and generally has the relationship C1==2n j・C1. Here, it goes without saying that a transistor or FET can be used in place of the switching diode.
第３ 図（ａ）に可変キャパシタのキャパシタンスと発
振周波数の関綽を示す。図中に示す階段状線（Ａｌは切
換キャパシタの合成キャパシタンスの切換に対する周波
数変化を示す。これに電圧可変キャパシタ素子１１の制
ｉｌｌギヤパシタンスにょる微調補正が加わるとほぼ直
線状線Ｂの関係を示すようにナリ、切換キャパシタのキ
ャパシタンス不連続部を補完する。その電圧可変キャパ
シタ素子１１のバイアス電圧と発振周波数５の関係は第
３図（ｂ）に示すようにバイアス電圧ｖ１〜ｖ２の範囲
のくり返し供給様態を呈する。このバイアス電圧変化中
ｖ１〜ｖ２は切換キャパシタのキャパシタンス不連続部
全補完するのみであるので極くわずかの変化＋１１で充
分である。FIG. 3(a) shows the relationship between the capacitance of the variable capacitor and the oscillation frequency. The stepped line shown in the figure (Al indicates the frequency change with respect to switching of the combined capacitance of the switched capacitor. When fine adjustment correction by the control illumination gear passance of the voltage variable capacitor element 11 is added to this, the relationship of almost linear line B is shown. In this way, the capacitance discontinuity of the switched capacitor is complemented.The relationship between the bias voltage of the voltage variable capacitor element 11 and the oscillation frequency 5 is as shown in FIG. During this bias voltage change, v1 to v2 only compensate for the capacitance discontinuity of the switching capacitor, so a very small change of +11 is sufficient.
第２図に示すバイナリ的重みづけキャパシタ群１５の具
体的構成例を第４図に示す。ａは上面図、ｂは第４図ａ
の断面Ａ −Ａ’における断面図である。A specific example of the structure of the binary weighting capacitor group 15 shown in FIG. 2 is shown in FIG. a is a top view, b is Fig. 4a
FIG.
キャパシタを構成する基板であり、かつ誘電体層である
誘電体１９の表面の一方にライン状電極２０．２１．２
２が設けられ、まだ他方にもライン状電極２３が設けら
れる。ここで、それぞれのライン状電極２０，２１．２
２と２３は電極ライン方向−が互にほぼ直角となる様に
対向配置される。A linear electrode 20.21.2 is provided on one surface of the dielectric material 19, which is a substrate constituting the capacitor and is a dielectric layer.
2 is provided, and a line-shaped electrode 23 is also provided on the other side. Here, each line-shaped electrode 20, 21.2
2 and 23 are arranged facing each other so that the electrode line directions are substantially perpendicular to each other.
それによってライン状電極２３とライン状電極２０．２
１．２２が誘電体１９を介して対向して単位キャパシタ
２８〔第４Ｎａにおける）・ツチングにて示す複数部分
〕を形成する。ライン状電極２０．２１．２２および２
３のライン［１］寸法〔第４Ｎａに示すＷ〕を例えば全
て同一寸法で形成すれば単位キャパシタ２８は全て等し
て値のキャパシタンスが得られる。Thereby, the line electrode 23 and the line electrode 20.2
1.22 are opposed to each other with the dielectric 19 in between to form a unit capacitor 28 (in the fourth Na) and a plurality of parts shown by the connecting lines. Line electrodes 20.21.22 and 2
If all the line [1] dimensions [W shown in the fourth Na] of 3 are formed to have the same dimension, for example, the unit capacitors 28 can all have the same value of capacitance.
いうまでもなく、ライン状電極２０，２１．２２のライ
ン１１Ｊとライン状電極２３のライン１〕は同一でなく
ともそれぞれのグループにおいて均一な寸法で形成すれ
ば単位キャパシタ２８は全て等しい値のキャパシタンス
が得られる。ここで、単位キャパシタ２８の有するキャ
パシタンス値をＣｕ とすると、電極２３と電極２ｏ
で形成されている単位キャパシタ数は実施例では５個で
あシ、その最下位ピントのキャパシタンス値の総和ハＣ
１＝５Ｃｕとなる。同様に電極２１に対してはＧ２＝１
０Ｃｕとなり、電極２２に対してはＣ５−２０Ｃｕ と
なる。Needless to say, even if the line 11J of the linear electrodes 20, 21, 22 and the line 1 of the linear electrode 23 are not the same, if they are formed with uniform dimensions in each group, the unit capacitors 28 will all have the same capacitance. is obtained. Here, if the capacitance value of the unit capacitor 28 is Cu, then the electrode 23 and the electrode 2o
In the embodiment, the number of unit capacitors formed is five, and the sum of the capacitance values at the lowest point is C
1=5Cu. Similarly, for electrode 21, G2=1
0Cu, and C5-20Cu for the electrode 22.
従って共通端子２４に対して分割端子２５ 、２６ 。Therefore, the common terminal 24 is divided into divided terminals 25 and 26.
２７に生ずるそれぞれのキャパシタンス値比は４ Ｇ、
＝−＝２．０２＝＝ ０３となりバイナリ的に重みづ
けが成される。最下位ビット内の単位キャパシタ数は任
意であシ、それに応じて他ビ、トの単位キャパシタ数も
任意であることはいうまでもない。ここで、誘電体１９
としてはＡ４０３（アルミナ）もしくはＢａＴｉ０３（
チタン酸バリウム）、もしくはガラス材等が使用できる
。実施例においては３ビツトの構成を示すが電極数の増
加によってより多ビットの構成も可能である。The respective capacitance value ratios occurring in 27 are 4 G,
=-=2.02==03, and binary weighting is performed. It goes without saying that the number of unit capacitors in the least significant bit is arbitrary, and the number of unit capacitors in the other bits is also arbitrary accordingly. Here, the dielectric 19
Examples include A403 (alumina) or BaTi03 (
Barium titanate) or glass material can be used. In the embodiment, a 3-bit configuration is shown, but by increasing the number of electrodes, a larger number of bits is also possible.
本発明の発振装置を構成することにより、限られたキャ
パシタンス変化１１１を有する電圧可変キャパシタンス
素子を用いても発振周波数変化［ＩＪを任意に拡大する
ことが可能となる。又、電圧可変キャパシタンス素子の
使用するキャパシタンス範囲が小さいため、その範囲で
はキャパシタンス変化率はほぼ一定であり、ＰＬＬのル
ープゲインは発振周波数によらず常にほぼ一定値を保持
し、周波数ロックアツプタイムを全周波数帯に渡り一定
にすることができる。同様にＱ値の変動も極めて小さい
ので、周波数による発振信号レベルの変動は極めて小さ
くすることが可能である。以上の様に本発明によれば発
振信号の理想条件を備えだ高性能な発振装置を提供する
ことができる。By configuring the oscillation device of the present invention, it is possible to arbitrarily expand the oscillation frequency change [IJ] even if a voltage variable capacitance element having a limited capacitance change 111 is used. In addition, since the capacitance range used by the voltage variable capacitance element is small, the capacitance change rate is almost constant in that range, and the loop gain of the PLL always maintains a nearly constant value regardless of the oscillation frequency, reducing the frequency lockup time. It can be kept constant over the entire frequency band. Similarly, since the variation in the Q value is extremely small, the variation in the oscillation signal level due to frequency can be made extremely small. As described above, according to the present invention, it is possible to provide a high-performance oscillation device that has ideal conditions for an oscillation signal.
第１図は本発明の一実施例における発振装置のブロック
図、第２図はその一部の回路図、第３図ａは可変キャパ
シタのキャパシタンスと発振周波数の関係を示す図、第
３図すは電圧可変キヤ、＜シタンス素子のバイアス電圧
と発振周波数の関係を示す図、第４図ａは本発明の発振
装置に使用するバイナリ的重みつけキャノくシタ群の構
成例を示す上面図、第４図すは同断面図である。
１・・・・・・発振部、２・・・・・・ＰＬＬシンセサ
イザ部、３・・・・・・プリスケーラ、４・・・・・・
プログラマブルカウンタ、５・・・・・・標準信号発生
器、６・・・・・・位相比較器、７・・・・・・低域沖
波器、１１・・・・・電圧可変キヤ・４シタンス素子、
１６・・・・・・バイナリ的重みづけキャノ々シタ群、
１６・・・・・・スイッチングダイオード、２ｏ。
２１．２２．２３・・・・・・ライン状電極、１９・・
・・・・誘電体。
第１図Fig. 1 is a block diagram of an oscillation device according to an embodiment of the present invention, Fig. 2 is a partial circuit diagram thereof, Fig. 3a is a diagram showing the relationship between the capacitance of a variable capacitor and the oscillation frequency, and Fig. 3 4A is a diagram showing the relationship between the bias voltage of the voltage variable capacitance element and the oscillation frequency; FIG. Figure 4 is the same sectional view. 1... Oscillator section, 2... PLL synthesizer section, 3... Prescaler, 4...
Programmable counter, 5...Standard signal generator, 6...Phase comparator, 7...Low frequency transducer, 11...Voltage variable capacitor/4sitance element,
16...Binary weighted canoshita group,
16...Switching diode, 2o. 21.22.23...Line electrode, 19...
...Dielectric material. Figure 1
Claims (2)
るキャパシタ群のそれぞれに対応設置されるスイッチ群
を選択的に切換えることにより任意の合成キャパシタン
スを呈する第１の可変キャパシタンスと、上記第１の可
変キャパシタンスに対し並列に接続される電圧可変キャ
パシタンス素子よりなる第２の可変キャパシタよシ成る
可変キャパシタ回路を同調部に設置した発振プｂツクと
、上記発振ブロックの発振信号を入力信号としグリスケ
ーラ、プログラマブルカウンタ、基準信号発生器、位相
比較器、および低域短波器を含み上記低域短波器の出力
信号を上記第２の可変キャパシタの制御電圧として第１
の発振周波数制御系を形成するＰＬＬシンセサイザ・ブ
ロックと、上記プログラマブルカウンタへの制御コード
を設定する周波数制御部と、上記周波数制御部の設定コ
ードを上記第１の可変キャパシタの切換制御信号に変換
して第２の周波数制御系を形成する切換制御部をそれぞ
れ具備し、第２の周波数制御系で粗く発振周波数を制御
し第１の周波数制御系で高精度に発振周波数を微調整す
るようにしたことを特徴とする発振装置。(1) a first variable capacitance that exhibits an arbitrary composite capacitance by selectively switching a switch group installed corresponding to each of the capacitor groups having binary-weighted capacitance; an oscillation block in which a variable capacitor circuit including a second variable capacitor constituted by a voltage variable capacitance element connected in parallel with the variable capacitance is installed in the tuning section; a grease scaler using the oscillation signal of the oscillation block as an input signal; The first circuit includes a programmable counter, a reference signal generator, a phase comparator, and a low frequency shortwave device, and uses an output signal of the low frequency shortwave device as a control voltage for the second variable capacitor.
a PLL synthesizer block forming an oscillation frequency control system, a frequency control section for setting a control code to the programmable counter, and a frequency control section for converting the setting code of the frequency control section into a switching control signal for the first variable capacitor. and a switching control section forming a second frequency control system, the second frequency control system roughly controls the oscillation frequency, and the first frequency control system finely adjusts the oscillation frequency with high precision. An oscillation device characterized by:
ャパシタ群として、並列状に配置され等ｌ】寸法を有す
る第１のライン状電極群とほぼ同様に並列状に配置され
等１】寸法を有する第２のライン状電極群が誘電体層を
介し、かつ第１および第２のライン状電極群が相互にほ
ぼ直角方向を成して対向配置され、第１および第２のラ
イン状電極群の１対向部分で単位キャパシタを形成し、
上記単位キャパシタの個数比によってバイナリ的に重み
づけ分割され、上記重みづけ分割に従って上記第１のラ
イン状電極が分割されると共に分割各に共通化された分
割端子群を有し、他方第一２のライン状電極群は全て共
通接続された共通端子を有するキャパシタ構成を使用す
ることを特徴とする特許請求の範囲第１項記載の発振装
置。(2) As a group of capacitors having binary weighted capacitances, arranged in parallel in substantially the same manner as the first group of line electrodes having dimensions of 1]. a second line-shaped electrode group with a dielectric layer interposed therebetween, and the first and second line-shaped electrode groups are arranged to face each other in substantially perpendicular directions, and the first and second line-shaped electrode groups one opposing part of the group forms a unit capacitor;
The first linear electrode is divided in a binary manner according to the number ratio of the unit capacitors, and the first linear electrode is divided according to the weighted division, and each division has a common divided terminal group, and the first two 2. The oscillation device according to claim 1, wherein all of the line-shaped electrode groups use a capacitor configuration having a common terminal connected in common.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57132702A JPS5922449A (en) | 1982-07-28 | 1982-07-28 | Oscillating device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57132702A JPS5922449A (en) | 1982-07-28 | 1982-07-28 | Oscillating device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5922449A true JPS5922449A (en) | 1984-02-04 |
Family
ID=15087553
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57132702A Pending JPS5922449A (en) | 1982-07-28 | 1982-07-28 | Oscillating device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5922449A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62198713U (en) * | 1986-06-06 | 1987-12-17 | ||
| JPH0426320A (en) * | 1990-05-16 | 1992-01-29 | Mitsubishi Electric Corp | High voltage distribution loop protective unit |
| EP1374387A1 (en) * | 2001-03-30 | 2004-01-02 | Conexant Systems, Inc. | System for controlling the frequency of an oscillator |
| JPWO2008001914A1 (en) * | 2006-06-29 | 2009-12-03 | 京セラ株式会社 | Variable capacitance capacitor array, variable capacitance capacitor array device, and circuit module |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS517675A (en) * | 1974-07-12 | 1976-01-22 | Hitachi Ltd | FUING AASOCHI |
| JPS5256617U (en) * | 1975-10-23 | 1977-04-23 | ||
| JPS52133653A (en) * | 1976-04-30 | 1977-11-09 | Nippon Kokan Kk <Nkk> | Automatic slinging device |
-
1982
- 1982-07-28 JP JP57132702A patent/JPS5922449A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS517675A (en) * | 1974-07-12 | 1976-01-22 | Hitachi Ltd | FUING AASOCHI |
| JPS5256617U (en) * | 1975-10-23 | 1977-04-23 | ||
| JPS52133653A (en) * | 1976-04-30 | 1977-11-09 | Nippon Kokan Kk <Nkk> | Automatic slinging device |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62198713U (en) * | 1986-06-06 | 1987-12-17 | ||
| JPH0426320A (en) * | 1990-05-16 | 1992-01-29 | Mitsubishi Electric Corp | High voltage distribution loop protective unit |
| EP1374387A1 (en) * | 2001-03-30 | 2004-01-02 | Conexant Systems, Inc. | System for controlling the frequency of an oscillator |
| EP1374387A4 (en) * | 2001-03-30 | 2004-05-26 | Skyworks Solutions Inc | System for controlling the frequency of an oscillator |
| US7103127B2 (en) | 2001-03-30 | 2006-09-05 | Skyworks Solutions, Inc. | System for controlling the frequency of an oscillator |
| JPWO2008001914A1 (en) * | 2006-06-29 | 2009-12-03 | 京セラ株式会社 | Variable capacitance capacitor array, variable capacitance capacitor array device, and circuit module |
| US8259431B2 (en) | 2006-06-29 | 2012-09-04 | Kyocera Corporation | Variable capacitor array, variable capacitor array device and circuit module |
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