JPS5920777U - Parabolic wave peak clamp circuit - Google Patents

Parabolic wave peak clamp circuit

Info

Publication number
JPS5920777U
JPS5920777U JP11428082U JP11428082U JPS5920777U JP S5920777 U JPS5920777 U JP S5920777U JP 11428082 U JP11428082 U JP 11428082U JP 11428082 U JP11428082 U JP 11428082U JP S5920777 U JPS5920777 U JP S5920777U
Authority
JP
Japan
Prior art keywords
parabolic wave
clamp circuit
wave peak
capacitor
peak clamp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11428082U
Other languages
Japanese (ja)
Inventor
敏彦 古川
Original Assignee
日本電気ホームエレクトロニクス株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気ホームエレクトロニクス株式会社 filed Critical 日本電気ホームエレクトロニクス株式会社
Priority to JP11428082U priority Critical patent/JPS5920777U/en
Publication of JPS5920777U publication Critical patent/JPS5920777U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案に係る従来例を示す回路図、第２図は本
考案の１実施例を示す回路図、第３図は第２図の各部の
波形図である。 １・・・パラボラ波入力端子、２・・・出力端子、Ｑｌ
・・・第１のトランジスタ、Ｑ２・・・第２のトランジ
スタ、Ｃ３・・・クランプ用コンデンサ。FIG. 1 is a circuit diagram showing a conventional example of the present invention, FIG. 2 is a circuit diagram showing one embodiment of the present invention, and FIG. 3 is a waveform diagram of each part of FIG. 2. 1... Parabolic wave input terminal, 2... Output terminal, Ql
...first transistor, Q2...second transistor, C3...clamp capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] コレクタが直流電圧源に接続されると共に抵抗を介して
エミッタが接地されベースに入力されるパラボラ波を出
力する第１のトランジスタト、コの第１のトランジスタ
のエミッタに一端が接続されると共に他端が抵抗を介し
て接地されたコンデンサと、前記コンデンサの他端と接
地間に介在されベースに入力される前記パラボラ波のピ
ークレベルに応答して導通し前記コンデンサを急速充電
する第２トランジスタとを備えたことを特徴とするパラ
ボラ波ピーククランプ回路。A first transistor whose collector is connected to a DC voltage source and whose emitter is grounded via a resistor outputs a parabolic wave that is input to the base. a capacitor whose end is grounded via a resistor; and a second transistor that is interposed between the other end of the capacitor and ground and conducts in response to the peak level of the parabolic wave input to the base to rapidly charge the capacitor. A parabolic wave peak clamp circuit characterized by being equipped with.
JP11428082U 1982-07-28 1982-07-28 Parabolic wave peak clamp circuit Pending JPS5920777U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11428082U JPS5920777U (en) 1982-07-28 1982-07-28 Parabolic wave peak clamp circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11428082U JPS5920777U (en) 1982-07-28 1982-07-28 Parabolic wave peak clamp circuit

Publications (1)

Publication Number Publication Date
JPS5920777U true JPS5920777U (en) 1984-02-08

Family

ID=30264227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11428082U Pending JPS5920777U (en) 1982-07-28 1982-07-28 Parabolic wave peak clamp circuit

Country Status (1)

Country Link
JP (1) JPS5920777U (en)

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