JPS59202727A - Overvoltage preventing device of semiconductor switch - Google Patents

Overvoltage preventing device of semiconductor switch

Info

Publication number
JPS59202727A
JPS59202727A JP7695683A JP7695683A JPS59202727A JP S59202727 A JPS59202727 A JP S59202727A JP 7695683 A JP7695683 A JP 7695683A JP 7695683 A JP7695683 A JP 7695683A JP S59202727 A JPS59202727 A JP S59202727A
Authority
JP
Japan
Prior art keywords
voltage
current
time
circuit
semiconductor switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7695683A
Other languages
Japanese (ja)
Other versions
JPH0242247B2 (en
Inventor
Haruyoshi Mori
治義 森
Takeaki Asaeda
健明 朝枝
Takashi Yuya
油谷 隆司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP7695683A priority Critical patent/JPS59202727A/en
Publication of JPS59202727A publication Critical patent/JPS59202727A/en
Publication of JPH0242247B2 publication Critical patent/JPH0242247B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/081Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
    • H03K17/0814Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit
    • H03K17/08144Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit in thyristor switches

Landscapes

  • Emergency Protection Circuit Devices (AREA)
  • Thyristor Switches And Gates (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To offer an overvoltage preventing device by which excessive voltage is not generated in a semiconductor switching element by connecting a connecting point of each reactor and the semiconductor switching element to a common voltage clipping circuit through a diode, respectively. CONSTITUTION:When currents iA1, iA2 flowing to gate turn-off thyristors (GTO) 41, 61 are cut off at a time (to), voltages v1, v2 of the GTOs 41, 61 rise linearly to a time point t1 when they become clip voltage VM of a voltage clipping circuit 7, in case when a time constant of a load 2 is very large. In case of a semiconductor switching element, a voltage build-up rate dv/dt in said case is determined so as to become below a value set to its element. The voltages v1, v2 do not rise above VM, currents iS1, iS2 which have flowed into snubber capacitors 42, 62 before that time are reduced suddenly at the time t1, a current of iM flows into the clipping circuit 7, and after the time t1, energy of the load 2 and energy of current balancer reactors 3, 5 are absorbed by the voltage clipping circuit 7.

Description

【発明の詳細な説明】 この発明は、半導体スイッチ装置に印加する過電圧から
半導体スイッチを保護する過電圧防止装置の改良に関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in an overvoltage protection device that protects a semiconductor switch from overvoltage applied to the semiconductor switch device.

従来、この種の装置として第1図のものがあった。図に
おいて、1は直流電源、2はリアクトルを含む負荷、3
.5は電流バランス用リアクトル、4.6は半導体スイ
ッチングで、それぞれゲートターンオフサイリスク(以
下、GT○と略す)、41.61、スナバコンデンサ4
2.62、ダイオード43.63、放電用抵抗44.6
4から構成される。7は電圧クリッパ回路である。
Conventionally, there has been a device of this type as shown in FIG. In the figure, 1 is a DC power supply, 2 is a load including a reactor, and 3 is a DC power supply.
.. 5 is a current balance reactor, 4.6 is a semiconductor switching device, each has a gate turn-off risk (hereinafter abbreviated as GT○), 41.61, and a snubber capacitor 4.
2.62, diode 43.63, discharge resistor 44.6
Consists of 4. 7 is a voltage clipper circuit.

次に動作を第2図、3図により説明する。第2図(a)
に示すように時刻toでGTO41,61に流れている
電流IAI、  IA2を遮断すると、G T 041
.61の両端電圧vl 、v2は第2図(C1のように
電圧上昇率dv/dtをもって上昇する。
Next, the operation will be explained with reference to FIGS. 2 and 3. Figure 2(a)
As shown in , when the currents IAI and IA2 flowing through GTO41 and 61 are cut off at time to, GTO41
.. The voltages vl and v2 across the terminal 61 rise at a voltage increase rate dv/dt as shown in FIG. 2 (C1).

isl、i52は電流IAI、IA2の遮断後それぞれ
スナバコンデンサ42.62に流入する電流を示す。負
荷2の時定数が非常に大きい場合には、vl、v2は電
圧クリッパ回路7のクリップ電圧VMとなる時点t1ま
で直線的に上昇する。このときの電圧の上昇率は、遮断
時の電流とスナバコンデンサ42.46の容量Cによっ
て決り、第2図(a)に示すように、遮断時の負荷電流
I(IがGTO41,61に完全に同じに分流(I d
/2づつ)している場合の電圧上昇率dv/dtは、 dv/dt−(Id/2)/C・・・11)となる。こ
こで、Idは負荷電流、Cはスナバコンデンサ42.4
6の容量である。
isl and i52 indicate the currents flowing into the snubber capacitors 42 and 62 after the currents IAI and IA2 are cut off, respectively. When the time constant of the load 2 is very large, vl and v2 increase linearly until the time t1 when the voltage clipper circuit 7 reaches the clipping voltage VM. The rate of increase in voltage at this time is determined by the current at the time of interruption and the capacitance C of the snubber capacitor 42, 46, and as shown in Figure 2 (a), the load current I (I is completely (I d
/2), the voltage increase rate dv/dt is dv/dt-(Id/2)/C...11). Here, Id is the load current, C is the snubber capacitor 42.4
It has a capacity of 6.

GTOの両端の電圧vl 、v2がさらに上昇してクリ
ッパ回路7のクリップ電圧VMより大きくなると、各ス
イッチ回路にながれる電流i1.i2は減少し始め、電
流バランサ川のりアクドル3.5のエネルギーが、スナ
バコンデンサ42.62に吸収される時点t2まで流れ
続ける。このとき、電圧クリッパ回路7の電流iMは、
スイッチ回路に流れる電流i1、+2の和i1+i2と
iMの和が負荷電流jと等しくなるように増加する。
When the voltages vl and v2 across the GTO further rise and become larger than the clipping voltage VM of the clipper circuit 7, the current i1. i2 begins to decrease and continues to flow until the time t2 when the energy of the current balancer current 3.5 is absorbed by the snubber capacitor 42.62. At this time, the current iM of the voltage clipper circuit 7 is
The sum of the currents i1 and +2 flowing through the switch circuit i1+i2 and iM increases so that it becomes equal to the load current j.

即ぢ、i =il →−i2+iMとなる。この期間t
1−t2において、スナバコンデンサ42.46は過充
電され−Vpまではね上る。Vpは次式で表わせる。
Therefore, i = il → -i2+iM. This period t
At 1-t2, the snubber capacitors 42, 46 are overcharged and rise to -Vp. Vp can be expressed by the following formula.

Vp=VM  +Δvp  −vh  +ff−ン責5
 ・  (l  d/2)・・・(2) 但し、■M :電圧クリッパ回路のクリ・ノブ電圧L:
ハランサ用すアクトル3.5のイ ンダクタンス C:スナバコンデンサの容量 Id/2:遮断前に各G’rOに流れていた電流 なお、(2)式で、Δv p =、l’Eフモ・ (I
 d/2)は、リアクトル3.5のエネルギーが各々の
スナバコンデンサ42.62に吸収されたと仮定して計
算した式である。即ち、 L/2・(1d/2?=C/2・(ΔVp)”・・・・
・(3) 時刻t2以降は、半導体スイッチ回路4.6に印加する
電圧v1、v2は、電圧クリッパ回路7に電流が流れて
いる間、即ぢ、主回路電流i (負荷電流)が流れてい
る間はクリップ電圧VMとなり、負荷電流iが流れなく
なると電源電圧Eとなる。
Vp=VM +Δvp −vh +ff−n 5
・(l d/2)...(2) However, ■M: Clip knob voltage L of voltage clipper circuit:
Inductance C of actor 3.5 used for halancer: Capacity Id/2 of snubber capacitor: Current flowing through each G'rO before shutoff. In equation (2), Δv p =, l'Efumo・(I
d/2) is a formula calculated assuming that the energy of the reactor 3.5 is absorbed by each snubber capacitor 42.62. That is, L/2・(1d/2?=C/2・(ΔVp)”...
・(3) After time t2, the voltages v1 and v2 applied to the semiconductor switch circuit 4.6 are the same as that of the main circuit current i (load current) while the current is flowing through the voltage clipper circuit 7. When the load current i stops flowing, it becomes the power supply voltage E.

したがって、半導体スイッチ回路4.6に加わる最大電
圧Vpは、例えば、電源電圧E = 1.500ボルト
、クリップ電圧VM−3.060ボルト、スナバコンデ
ンサ容量C−20μF1バランス用リアクトルのインダ
クタンスL=1.000 μII 、遮断前にG i”
 Oに流れていた電流rd/2を1.000アンペアと
すると、Δv p =t、ooo ×、fiフ’2 =
3.162ボルトの電圧がリアクトル3.5からスナバ
コンデンサ42.62に吸収される。また、ピーク電圧
はV p −3,000+3.162 =6.162ボ
ルトとなる。コンデンサ容量のみをC=20μFとした
場合でも、ΔV p = 1.000ボルト、v p 
=4.000ボルトとなる。したがって、半導体スイ・
ソチ回路の選定にあたっては過電圧防止装置のクリ・ノ
ブ電圧VMよりも、はるかに耐圧の大きなス4 yチン
グ素子を選ぶか、あるいは非常に大きなスナバコンデン
サを選定する必要がある。
Therefore, the maximum voltage Vp applied to the semiconductor switch circuit 4.6 is, for example, power supply voltage E = 1.500 volts, clip voltage VM - 3.060 volts, snubber capacitor capacitance C - 20 μF1, balance reactor inductance L = 1. 000 μII, G i” before blocking
Assuming that the current rd/2 flowing through O is 1.000 ampere, Δv p =t, ooo ×, fi f'2 =
A voltage of 3.162 volts is absorbed from reactor 3.5 to snubber capacitor 42.62. Also, the peak voltage is V p -3,000+3.162 = 6.162 volts. Even if only the capacitor capacitance is C=20 μF, ΔV p = 1.000 volts, v p
=4.000 volts. Therefore, the semiconductor switch
When selecting the Sochi circuit, it is necessary to select a switching element with a much higher withstand voltage than the voltage VM of the overvoltage protection device, or to select a very large snubber capacitor.

これまでの説明では、各半導体スイ・ソチ回路4.6に
それぞれ同じ電流が流れていると仮定して説明したが、
電流が不平衡であり、一方のGTOに大きな電流が流れ
、それを遮断する場合は、そのGTOにはさらに過大な
ピーク電圧Vpが発生することになる。
In the explanation so far, it has been assumed that the same current is flowing through each semiconductor switch circuit 4.6.
If the currents are unbalanced and a large current flows through one GTO and is cut off, an even larger peak voltage Vp will be generated in that GTO.

なお、上記は、 電圧クリッパ回路の電圧−電流特性は
、第3図に示す理想特性であると仮定して説明した。
The above description has been made on the assumption that the voltage-current characteristics of the voltage clipper circuit are the ideal characteristics shown in FIG.

以上のように、従来装置では、スナバコンデンサで電流
バランス用リアクトルに蓄えられたエネルギーを吸収し
なげればならない為、スイッチ回路の半導体スイッチン
グ素子を選択するにあたっては、電圧クリッパ回路のク
リップ電圧よりもはるかに高い耐圧の素子を使用しなり
ればならず、又、複数のスイッチ回路に分流する電流が
不平衡になった場合は、大きな電流を遮断した半導体ス
イッチング素子に過大な電圧がかかり、最悪の場合は素
子が破壊してしまうという欠点があった。
As described above, in conventional devices, the energy stored in the current balancing reactor must be absorbed by the snubber capacitor, so when selecting the semiconductor switching element for the switch circuit, it is important to Elements with a much higher withstand voltage must be used, and if the currents that are shunted to multiple switch circuits become unbalanced, an excessive voltage will be applied to the semiconductor switching element that interrupted the large current, resulting in the worst case scenario. In this case, there was a drawback that the element would be destroyed.

この発明は、上記した従来の欠点を除去する為になされ
たもので、スイッチ回路に加わる遮断時のピーク電圧が
電圧クリッパ回路のクリップ電圧と同程度で且つ不平衡
な電流を遮断した場合でも半導体スイッチング素子に過
大な電圧が発生しない過電圧防止装置を提供することを
目的とするもので、各リアクトルを半導体スイッチング
素子の接続点をそれぞれタイオードを介して共通の電圧
クリッパ回路に接続したことを特徴とする。
This invention was made to eliminate the above-mentioned conventional drawbacks, and even when the peak voltage applied to the switch circuit at the time of interruption is comparable to the clipping voltage of the voltage clipper circuit, and an unbalanced current is interrupted, the semiconductor The purpose of this device is to provide an overvoltage prevention device that does not generate excessive voltage in switching elements, and is characterized in that each reactor is connected to a common voltage clipper circuit at the connection point of the semiconductor switching element through a diode. do.

以下、この発明の一実施例を図について説明する。An embodiment of the present invention will be described below with reference to the drawings.

第4図において、8.9はダイオードで、各スイッチ回
路4.6の電流ハランザ用すアクトル3.5と半導体ス
イッチング素子(この例では、G T O)との接続点
に各アノードが接続され、カソードは共通の電圧クリッ
パ回路7に接続される。電圧クリッパ回路7は、例えば
酸化亜鉛等の非直線抵抗からなり、その電圧−電流特性
は第3図のように理想特性を有している。その他の符号
については第1図のものと同一構成要素である。
In FIG. 4, 8.9 is a diode, each anode of which is connected to the connection point between the actuator 3.5 for the current halter of each switch circuit 4.6 and the semiconductor switching element (in this example, GTO). , the cathodes are connected to a common voltage clipper circuit 7. The voltage clipper circuit 7 is made of a non-linear resistor such as zinc oxide, and has ideal voltage-current characteristics as shown in FIG. Other symbols are the same components as those in FIG.

次に、この回路の動作について第5図、第6図の波形図
を用いて説明する。第5図(alに示すように、時刻t
oにおいて、GTO41,61に流れる電流i Al、
 iA2を遮断すると、G′「041.61の電圧vl
 、V2は第5図(C)に示すように」−昇する。鋒倚
2の時定数が非常に大なる場合には、電圧vl 、v2
が電圧クリッパ回路7のクリップ電圧VMとなる時点t
lまで直線的に上昇する。この時の電圧上昇率d v 
/ d tはft両電流1dがGT041.61に完全
に同じに分流(110、+20)している場合にはi’
iij記1式と同じになる。
Next, the operation of this circuit will be explained using the waveform diagrams of FIGS. 5 and 6. As shown in FIG. 5 (al), time t
At o, the current i Al flowing through the GTOs 41 and 61,
When iA2 is cut off, the voltage vl of G′ 041.61
, V2 rises as shown in FIG. 5(C). If the time constant of Fengqi2 is very large, the voltages vl and v2
The time t when becomes the clip voltage VM of the voltage clipper circuit 7
increases linearly to l. Voltage increase rate d v at this time
/ d t is ft If both currents 1d are completely equally divided into GT041.61 (110, +20), then i'
It is the same as formula 1 of iii.

GTOのターンオフ時の電圧変化d v / d tは
半導体スイッチング素子の場合には、その素子に定めら
れた値(d v/d t)ma x以下になるように決
定しなければならない。
In the case of a semiconductor switching element, the voltage change dv/dt at turn-off of the GTO must be determined so as to be equal to or less than a value (dv/dt)max determined for the element.

例えば、(d v/d t) ma x=500v//
j S、(l d/2) =1.OOOへの場合には、
スナバコンデンサの容量Cは2tt、Fであればよく、
むやみに大きくする必要はない。
For example, (d v/d t) max=500v//
j S, (l d/2) =1. In case of OOO,
The capacitance C of the snubber capacitor should be 2tt, F,
There is no need to make it unnecessarily large.

時刻t1でスイッチ回路4.6のGTO41,61の電
圧vl 、V2が電圧クリッパ回路7のクリップ電圧V
Mと等しくなると、電圧vl、■2は第5図(C1のよ
うにそれ以上には上昇せず、第5図fatに示すように
、それまでスナバコンデンサ42.62に流入していた
電流isl、is2は時刻t1で急激に減少し、第5図
(blに示すようにiMなる電流がクリッパ回路7に流
入する。時刻tl以隆においては、負荷2のエネルギー
及び電流バラン号用リアクトル3.5のエネルギーは電
圧クリッパ回路7によって吸収される為、GTO416
Iの電圧v、I 、 v2はクリップ電圧VM以上には
上昇しない。
At time t1, the voltage vl and V2 of the GTOs 41 and 61 of the switch circuit 4.6 are the clip voltage V of the voltage clipper circuit 7.
When it becomes equal to M, the voltage vl, 2 does not rise any further as shown in Figure 5 (C1, and as shown in Figure 5 fat, the current isl that had previously flowed into the snubber capacitor 42.62 , is2 rapidly decrease at time t1, and a current iM flows into the clipper circuit 7 as shown in FIG. Since the energy of 5 is absorbed by the voltage clipper circuit 7, GTO416
The voltages v, I, and v2 of I do not rise above the clip voltage VM.

スイッチ回路4.6の電流分担が不平衡である場合(ス
イッチ回路4に流れる電流110がスイッチ回路6に流
れるより大きい)の動作波形を第6図に示す。この場合
、遮断時にGTO41”の電圧v1は第6図(C)のよ
うに立上りは早い。しかし、両スイッチ回路4.6のG
 1” 0に加わる電圧■1、v2はクリップ電圧以上
には上昇しない。第7図は、この発明の他の実施例であ
る。負荷2が電源を含むようなものであり、スイッチ回
路4.6に逆電圧が発生ずるような場合で、G ′VO
等の主スイツチング素子の逆耐圧が大きくない場合に、
図示のように逆電流阻止用タイオー1ζ20を接続して
も過電圧防止回路は有効に作用する。符号3〜8の構成
要素は第4図と同一物である。第8図は、この発明の別
の実施例を示す図で、スイッチ装置を双方向性としたも
のである。図において、10.12は電流バラン号用す
アクトル、11.13はスイッチ回路4.6とは逆方向
に並列接続したスイッチ回路、14.15はダイオード
、3〜9は第4図のものと同一構成要素である。この構
成によると、双方向の過電圧を防止すると共に、共通電
圧クリッパ回路7を有効に利用することができる。この
例の電圧クリッパ回路7の特性は第3図に示すような双
方向の特性を有していることが必要である。
FIG. 6 shows operating waveforms when the current sharing of the switch circuits 4 and 6 is unbalanced (current 110 flowing through the switch circuit 4 is larger than flowing through the switch circuit 6). In this case, the voltage v1 of the GTO 41'' rises quickly as shown in Fig. 6 (C) when the switch is cut off.
1" 0 voltage applied to ■1, v2 does not rise above the clip voltage. FIG. 7 shows another embodiment of the present invention. The load 2 includes a power supply, and the switch circuit 4. In the case where a reverse voltage is generated at G ′VO
When the reverse breakdown voltage of the main switching element is not large, such as
Even if the reverse current blocking diode 1ζ20 is connected as shown in the figure, the overvoltage prevention circuit operates effectively. Components numbered 3 to 8 are the same as those in FIG. 4. FIG. 8 is a diagram showing another embodiment of the present invention, in which the switch device is bidirectional. In the figure, 10.12 is an actor for the current balun, 11.13 is a switch circuit connected in parallel in the opposite direction to the switch circuit 4.6, 14.15 is a diode, and 3 to 9 are the ones in Figure 4. They are the same components. According to this configuration, bidirectional overvoltage can be prevented and the common voltage clipper circuit 7 can be used effectively. The voltage clipper circuit 7 in this example must have bidirectional characteristics as shown in FIG.

上記各実施例では、電圧クリッパ回路7として酸化亜鉛
素子を用いているが、他の非線形特性を持つ素子でよい
。その特性は第3図に示すような理想的な特性でなくて
もよい。また、第8図の実施例以外では双方向性でなく
、単方向の電圧クリップ特性であってもよい。
In each of the above embodiments, a zinc oxide element is used as the voltage clipper circuit 7, but an element having other nonlinear characteristics may be used. The characteristics need not be ideal characteristics as shown in FIG. Further, in cases other than the embodiment shown in FIG. 8, the voltage clipping characteristic may be unidirectional instead of bidirectional.

また、上記各実施例では、スイッチ回路の半導体スイッ
チング素子としてGTOを用いた例を示したが、トラン
ジスタや静電誘導形サイリスク等の自己消弧形素子でも
よいし、サイリスクのような非自己消弧形素子を用いて
強制転流回路を付加してもよい。
Furthermore, in each of the above embodiments, an example was shown in which a GTO was used as the semiconductor switching element of the switch circuit, but a self-extinguishing element such as a transistor or an electrostatic induction type SIRISK, or a non-self-extinguishing element such as a SIRISK may also be used. A forced commutation circuit may be added using an arc element.

電流バランサは平衡リアクトルであってもよい。The current balancer may be a balancing reactor.

また、電流バランサ用リアクトルとスイッチ回路との直
列回路の並列数は3以上でもよいことは云うまでもない
Moreover, it goes without saying that the number of parallel circuits of the current balancer reactor and the switch circuit in series may be three or more.

以上の如く、本発明は、各リアクトルと半導体スイッチ
ング素子の接続点をそれぞれダイオードを介して共通電
圧クリッパ回路に接続したから、電圧クリッパ回路によ
って電流バランサ用リアクトルのエネルギーを吸収でき
、スイッチ回路をターンオフする時にスイッチ回路に生
じる電圧を電圧クリッパ回路のクリップ電圧に抑えるこ
とができる。更に、並列接続したスイッチ回1/&の電
流が不平衡の状態であっても、スイッチ回路をターンオ
フした時、上・記と同様にスイッチ回路の電圧をクリッ
プ電圧に抑制することができる。したがって、遮断時の
過電圧によるスイッチ回路の半導体スイッチング素子、
を破壊から防くことができるから、スイッチング素子自
体の耐圧を小さくすることができる。
As described above, in the present invention, since the connection points of each reactor and the semiconductor switching element are connected to the common voltage clipper circuit through the diodes, the energy of the current balancer reactor can be absorbed by the voltage clipper circuit, and the switch circuit can be turned off. When this happens, the voltage generated in the switch circuit can be suppressed to the clip voltage of the voltage clipper circuit. Furthermore, even if the currents of the parallel connected switch circuits 1/& are in an unbalanced state, when the switch circuit is turned off, the voltage of the switch circuit can be suppressed to the clip voltage in the same manner as described above. Therefore, the semiconductor switching element of the switch circuit due to overvoltage during interruption,
Since the switching element itself can be prevented from being destroyed, the withstand voltage of the switching element itself can be reduced.

また、半導体スイッチング素子を保護するスナバコンデ
ンサの静電容量を必要以」−に大きくする必要がなくな
るという効果も生じる。
Furthermore, there is also the effect that it is no longer necessary to make the capacitance of the snubber capacitor that protects the semiconductor switching element larger than necessary.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の過電圧防止装置の回路図、第2図は第1
図の動作説明図、第3図は電圧クリップ回路の特性図、
第4図はこの発明による半導体スイッチの過電圧防止装
置の一実施例の回路図、第5図及び第6図は上記実施例
の動作説明図、第7及び第8図は本発明の他の実施例の
回路図である。 図において、 1−電源、2−負荷、 3.5.10.12−電流ハランサ用すアクトル4.6
.11.13−スイッチ回路、 7−電圧クリッパ回路、 41.61−半導体スイッチング素子、42.62−ス
ナバコンデンサ。 なお、図中、同一符号は同−又は相当部分を示す。 代理人大岩増雄 第6図 to t4t2丁
Figure 1 is a circuit diagram of a conventional overvoltage protection device, and Figure 2 is a circuit diagram of a conventional overvoltage prevention device.
Figure 3 is a characteristic diagram of the voltage clip circuit.
FIG. 4 is a circuit diagram of an embodiment of an overvoltage prevention device for a semiconductor switch according to the present invention, FIGS. 5 and 6 are operation explanatory diagrams of the above embodiment, and FIGS. 7 and 8 are other embodiments of the present invention. FIG. 3 is an example circuit diagram. In the figure, 1-power supply, 2-load, 3.5.10.12-actor for current interrupter 4.6
.. 11.13-Switch circuit, 7-Voltage clipper circuit, 41.61-Semiconductor switching element, 42.62-Snubber capacitor. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. Agent Masuo Oiwa Figure 6 to t4t2

Claims (1)

【特許請求の範囲】[Claims] 電流パランサ用リアクトルと半導体スイッチング素子の
直列回路を複数並列接続した半導体スイッチ装置におい
て、上記各リアクトルと半導体スイッチング素子の接続
点をそれぞれダイオードを介して共通電圧クリッパ回路
に接続したことを特徴とする半導体スイッチの過電圧防
止装置。
A semiconductor switching device in which a plurality of series circuits of current paralleler reactors and semiconductor switching elements are connected in parallel, characterized in that the connection points of each of the reactors and the semiconductor switching elements are connected to a common voltage clipper circuit via a diode, respectively. Switch overvoltage protection device.
JP7695683A 1983-04-30 1983-04-30 Overvoltage preventing device of semiconductor switch Granted JPS59202727A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7695683A JPS59202727A (en) 1983-04-30 1983-04-30 Overvoltage preventing device of semiconductor switch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7695683A JPS59202727A (en) 1983-04-30 1983-04-30 Overvoltage preventing device of semiconductor switch

Publications (2)

Publication Number Publication Date
JPS59202727A true JPS59202727A (en) 1984-11-16
JPH0242247B2 JPH0242247B2 (en) 1990-09-21

Family

ID=13620229

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7695683A Granted JPS59202727A (en) 1983-04-30 1983-04-30 Overvoltage preventing device of semiconductor switch

Country Status (1)

Country Link
JP (1) JPS59202727A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60111130U (en) * 1983-12-28 1985-07-27 株式会社明電舎 semiconductor circuit breaker
JPS62272721A (en) * 1986-05-21 1987-11-26 Fuji Electric Co Ltd Semiconductor breaker
JPS62272720A (en) * 1986-05-21 1987-11-26 Fuji Electric Co Ltd Semiconductor breaker

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60111130U (en) * 1983-12-28 1985-07-27 株式会社明電舎 semiconductor circuit breaker
JPS62272721A (en) * 1986-05-21 1987-11-26 Fuji Electric Co Ltd Semiconductor breaker
JPS62272720A (en) * 1986-05-21 1987-11-26 Fuji Electric Co Ltd Semiconductor breaker

Also Published As

Publication number Publication date
JPH0242247B2 (en) 1990-09-21

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