JPS5919474A - Driving method of charge transfer image pickup device - Google Patents
Driving method of charge transfer image pickup deviceInfo
- Publication number
- JPS5919474A JPS5919474A JP57127996A JP12799682A JPS5919474A JP S5919474 A JPS5919474 A JP S5919474A JP 57127996 A JP57127996 A JP 57127996A JP 12799682 A JP12799682 A JP 12799682A JP S5919474 A JPS5919474 A JP S5919474A
- Authority
- JP
- Japan
- Prior art keywords
- shift register
- vertical shift
- section
- charge
- light receiving
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 8
- 238000003384 imaging method Methods 0.000 claims description 17
- 238000006243 chemical reaction Methods 0.000 claims description 9
- 206010047571 Visual impairment Diseases 0.000 description 14
- 238000010586 diagram Methods 0.000 description 10
- 230000003287 optical effect Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
- H04N25/62—Detection or reduction of noise due to excess charges produced by the exposure, e.g. smear, blooming, ghost image, crosstalk or leakage between pixels
- H04N25/625—Detection or reduction of noise due to excess charges produced by the exposure, e.g. smear, blooming, ghost image, crosstalk or leakage between pixels for the control of smear
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/73—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors using interline transfer [IT]
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、電荷転送撮像装置の駆動方法、特に先に本出
願人が提案した電荷転送撮像装置において、その受光部
としてPN接合型センサを用いた場合でも残像を発生さ
せないようにした駆動方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for driving a charge transfer imaging device, particularly a charge transfer imaging device previously proposed by the applicant in which an afterimage occurs even when a PN junction type sensor is used as a light receiving section. This invention relates to a driving method that prevents this from occurring.
固体撮像装置においては、その受光部として感度の良い
PN接合型センサを用いる場合、残像が発生し、固体撮
像装置としての特徴が損うことが知られている。従来P
N接合型センサを使用して残像を発生させないようにす
るには、センサ領域を完全に空乏化して読み出す方法が
知られている。しかし、表面近傍を空乏化することは、
5i−810□界面準位による暗電流が増加することや
、酸化膜中及び上の浮遊電荷の影響を受けやすく、信頼
性に問題があった。又、それを抑制するために表面の浅
い領域をホール(Nチャンネルの場合)で満りして安定
化することも報告されているが、短波長の感度を低下さ
せることも充分考慮する必要がある。In a solid-state imaging device, it is known that when a highly sensitive PN junction sensor is used as the light receiving section, an afterimage occurs and the characteristics of the solid-state imaging device are impaired. Conventional P
In order to prevent afterimages from occurring when using an N-junction sensor, a method is known in which the sensor region is completely depleted and then read out. However, depletion near the surface
5i-810□Dark current due to interface states increases, and it is easily affected by floating charges in and on the oxide film, resulting in reliability problems. It has also been reported that in order to suppress this, stabilization can be achieved by filling the shallow region of the surface with holes (in the case of N-channel), but it is also necessary to take into account the reduction in sensitivity at short wavelengths. be.
上記提案の電荷転送撮像装置において、受光部としてP
N接合型センサを用いた場の残像が発生する原因の一つ
には、読み出しr−)部のチャンネル長が短かい場合(
2〜3μm以下)、所謂ショートチャンネル変調に起因
することが考えられる。In the charge transfer imaging device proposed above, P is used as the light receiving section.
One of the reasons why field afterimages occur when using an N-junction sensor is when the channel length of the readout section (r-) is short (
(2 to 3 μm or less), which is considered to be caused by so-called short channel modulation.
次に、読み出しデート部のチャンネル長が短かい場合の
残像発生の機構について述るも、まず上記電荷転送撮像
装置の概要について説明する。Next, the mechanism of afterimage generation when the channel length of the readout date section is short will be described, but first an overview of the charge transfer imaging device will be described.
この電荷転送撮像装置は、第1図に示すように電荷転送
装置例えばCCD構成による複数列の垂直シフトレジス
タ(1)の群及びこれら各垂直シフトレジスタ(1)間
にあって電荷の蓄積可能々光電変換部即ち各絵素に対応
する受光部(2)を有する感光領域(3)と、感光領域
(3)の各垂直シフトレジスタ(1)の一端に電気的に
結合された同様のCCD構成による垂直シフトレジスタ
(4)の群からなる記憶部(5)と、この記憶部(5)
に結合された同様にCCD構成による水平シフトレジス
タ(6)とを備えて成る。感光領域(3)においては各
受光部(2)の−側即ち対応する垂直シフトレジスタ(
1)側に受光部(2)からの信号電荷を垂直シフトレジ
スタ(1)へ転送するための読み出しデート部(7)が
形成され、また各受光部(2)の他側にオーバーフロー
コントロールゲート部(8)ヲ介ジテオーバーフロード
レイン領域(9)が形成される。チャンネスルトップ領
域01は各垂直ライン間及び各受光部(2)間を分離す
るように形成される。受光部(2)以外の各部分に全て
遮光が施される。第2図A(第1図のA−A線上の断面
に相当する)は受光部(2)の信号電荷を垂直シフトレ
ジスタ(1)に転送する部分の具体的構造の一例を示す
。これは例えばP形の半導体基体<11)の主面にN影
領域a■を形成してPN型接合型の受光部(2)が形成
され、この受光部(2)に隣シ合ってN影領域(至)を
形成して所謂埋込みチャンネル型となした垂直シフトレ
ジスタ(1)が設けられ、垂直シフトレジスタ(1)は
基体αや上の絶縁膜α→を介して例えば2相駆動の転送
電極α→が被着される。この転送電極α→は受光部(2
)と垂直シフトレジスタ(1)間の読み出し?−)部(
7)上に延長される。As shown in FIG. 1, this charge transfer imaging device includes a group of charge transfer devices such as a plurality of vertical shift registers (1) having a CCD configuration, and a group of vertical shift registers (1) having a plurality of columns, and a photoelectric conversion device capable of accumulating charges between the vertical shift registers (1). a photosensitive area (3) having a light receiving area (2) corresponding to each picture element; a storage unit (5) consisting of a group of shift registers (4);
and a horizontal shift register (6) also of CCD configuration. In the photosensitive area (3), the negative side of each light receiving section (2), that is, the corresponding vertical shift register (
A read date section (7) for transferring signal charges from the light receiving section (2) to the vertical shift register (1) is formed on the side 1), and an overflow control gate section is formed on the other side of each light receiving section (2). (8) An overflow drain region (9) is formed. The channel top region 01 is formed to separate each vertical line and each light receiving part (2). All parts other than the light receiving section (2) are shielded from light. FIG. 2A (corresponding to the cross section taken along the line A--A in FIG. 1) shows an example of a specific structure of a portion that transfers signal charges of the light receiving section (2) to the vertical shift register (1). For example, an N shadow area a is formed on the main surface of a P-type semiconductor substrate <11) to form a PN junction type light receiving section (2), and an N shadow region a is formed adjacent to this light receiving section (2). A vertical shift register (1) is provided which is a so-called buried channel type by forming a shadow area (to), and the vertical shift register (1) is connected to a two-phase drive, for example, through a base body α and an insulating film α→. A transfer electrode α→ is deposited. This transfer electrode α→ is the light receiving part (2
) and vertical shift register (1)? −) part (
7) Extended upwards.
受光部(2)の他側に接するオーバーフローコントロー
ルf−)部(8)は基体αη上に絶縁膜α→を介してコ
ントロール?−)電極0Qが被着されて構成され、この
オーバーフローコントロールc )部(8)K接して
N+形領域aカによるオーバτフ叶ドレイン領域(9)
が形成される。チャンネルストップ領域α1はP+形領
領域て形成される。The overflow control f-) part (8) in contact with the other side of the light receiving part (2) is controlled via the insulating film α→ on the base αη. -) consists of an electrode 0Q deposited, and this overflow control c) part (8) is in contact with the N+ type region a due to the overflow τ drain region (9)
is formed. The channel stop region α1 is formed as a P+ type region.
斯る電荷転送撮像装置において、受光期間に受光部(2
)に蓄積された信号電荷は垂直帰線期間に受光部(2)
から垂直シフトレジスタ(1)に転送されると共に、之
よシ高速で記憶部(5)に転送されて一旦記憶される。In such a charge transfer imaging device, the light receiving section (2
) The signal charges accumulated in the light receiving section (2) during the vertical retrace period
The data is transferred from there to the vertical shift register (1), and is also transferred at a higher speed to the storage unit (5) where it is temporarily stored.
その後、1水平走査期間毎に1水平ライン分ずつ信号電
荷が記憶部から水平シフトレジスタ(6)に転送され、
出力端子よシ順次1絵素分ずつ読み出される。この電荷
転送撮像装置においては受光部(2)にて得られる信号
電荷を遮光の施された垂直シフトレジスタ(1)に読み
出し、垂直シフト(5)
レジスタ(1)から記憶部(5)へ信号電荷を高速転送
し、記憶部(5)に一旦記憶されている信号電荷を1水
平ラインずつ水平シフトレジスタ(6)を介して出力す
るので、スメアによる画質の劣化を防止し得る利点があ
る。Thereafter, signal charges for one horizontal line are transferred from the storage section to the horizontal shift register (6) every horizontal scanning period,
One picture element at a time is read out sequentially from the output terminal. In this charge transfer imaging device, a signal charge obtained by a light receiving section (2) is read out to a light-shielded vertical shift register (1), and a vertical shift (5) signal is sent from the register (1) to a storage section (5). Since the charges are transferred at high speed and the signal charges temporarily stored in the storage section (5) are outputted one horizontal line at a time via the horizontal shift register (6), there is an advantage that deterioration of image quality due to smear can be prevented.
しかして、このような電荷転送撮像装置での残像発生の
機構は次の如くである。すなわち、受光部(2)がPN
接合型の場合、第2図Bに示すように受光部(2)の基
準となる電位は、前のフレームで信号電荷を読み出した
時の読み出しe−)部(7)の表面電位φ8が次のフレ
ームの信号電荷Qsigを蓄積する際の基準電位となる
から、常に受光部のリセット電位が一定でなくてはなら
ない。なお、Q])は垂直シフトレジスタ(1)の記憶
部(5)への電荷転送時のポテンシャル、(イ)は受光
部(2)から垂直シフトレジスタ(1)への電荷読み出
し時のポテンシャルである〇しかし乍ら、第2図C(受
光部から垂直シフトレジスタへの読み出し時のポテンシ
ャル図)に示すように、読み出しゲート部(7)の表面
電位はそのチャンネル長tが短かくなると垂直シフトレ
ジスタ(6)
(1)の電位によって変調を受ける。つ壕り前のフレー
ムの信号電荷によって垂直シフトレジスタ(1)の電位
が決定され、その電位によって読み出しデート部(7)
の表面電位が変調され次のフレームの受光部(2)の基
準電位を決定しているので、次のフレームの信号電荷量
に前のフレームの影響が出て残像として表われる。例え
ば第2図Cにおいて、(n−2)番目のフレームの信号
電荷Qs(n−2)−〇テソの垂直シフトレジスタの電
位をvD1読み出しy−ト部の表面電位をφ8とした場
合、この表面室へrφ8によって次の(n−1)番目の
フレームの受光部の基準電位が決定される。次に、この
(n−1)番目のフレームの信号電荷qs(n−1)
=QBが垂直シフトレジスタに転送されてその電位が礼
になると、この電位v孔によって読み出しr−)部(7
)の表面電位がφ6からφ二に変調され、受光部(2)
にはΔφ8に相当する(n−1)番目フレームの電荷の
一部が取シ残される。従って、この読み出しゲート部(
7)の表面電位φ二が次のn番目のフレームの受光部(
2)の基準電位となるため、このΔφ8に相当する取シ
残された電荷が残像の発生にかかわってくる。The mechanism of afterimage generation in such a charge transfer imaging device is as follows. That is, the light receiving part (2) is PN
In the case of a junction type, as shown in Figure 2B, the reference potential of the light receiving section (2) is the surface potential φ8 of the readout section (e-) section (7) when the signal charge was read out in the previous frame. The reset potential of the light receiving section must always be constant because it becomes the reference potential when accumulating the signal charge Qsig of the frame. Note that Q]) is the potential at the time of charge transfer from the vertical shift register (1) to the storage section (5), and (a) is the potential at the time of charge readout from the light receiving section (2) to the vertical shift register (1). Yes However, as shown in Figure 2C (potential diagram during readout from the light receiving section to the vertical shift register), the surface potential of the readout gate section (7) shifts vertically as its channel length t becomes shorter. Modulated by the potential of register (6) (1). The potential of the vertical shift register (1) is determined by the signal charge of the previous frame, and the read date section (7) is determined by the potential of the vertical shift register (1).
Since the surface potential of the frame is modulated to determine the reference potential of the light receiving section (2) for the next frame, the signal charge amount of the next frame is influenced by the previous frame and appears as an afterimage. For example, in FIG. 2C, if the potential of the vertical shift register of the (n-2)th frame is read out as vD1 and the surface potential of the y-t part is φ8, then this The reference potential of the light receiving section of the next (n-1)th frame is determined by rφ8 to the surface chamber. Next, the signal charge qs(n-1) of this (n-1)th frame
= When QB is transferred to the vertical shift register and its potential becomes negative, this potential V hole causes the read r-) section (7
) is modulated from φ6 to φ2, and the light receiving part (2)
A part of the charge of the (n-1)th frame corresponding to Δφ8 is left behind. Therefore, this read gate section (
7) when the surface potential φ2 of the light receiving part (
2), the remaining charge corresponding to Δφ8 is involved in the generation of an afterimage.
本発明は、上述の点に鑑み受光部にPN接合型センサを
用いた場合でも残像を発生させないようにした電荷転送
撮像装置の駆動方法を提供するものである。In view of the above-mentioned points, the present invention provides a method for driving a charge transfer imaging device that does not generate afterimages even when a PN junction type sensor is used in the light receiving section.
以下、本発明を説明する。The present invention will be explained below.
第3図は本発明の電荷転送撮像装置の概略図であり、第
1図と対応する部分には同一符号を付して示す。この電
荷転送撮像装置は、第1図と同様にCCD構成による複
数列の垂直シフトレジスタ(1)の群、各垂直シフトレ
ジスタ(1)間において互にチャンネルストップ領域0
0によって分離され電荷の蓄積が可能な光電変換部即ち
複数の受光部(2)、受光部(2)の信号電荷を垂直シ
フトレジスタ(1)に転送する読み出しデート部(7)
、オーバーフローコントo −ル’r’ )部(8)
及ヒオーバーフロードレイン領域(9)からなる感光領
域(3)と、この感光領域(3)の各垂直シフトレジス
タ(1)の一端に電気的に結合されたCCD構成による
垂直シフトレジスタ(4)の列群からなる記憶部(5)
と、この記憶部(5)に結合されて信号電荷を読み出す
ためのCCD構成による水平シフトレジスタ(6)を備
えるも、さらに本発明においては、感光領域(3)の各
垂直シフトレジスタ(1)の一端に電気的に結合された
入力部(ハ)を設けて構成する。FIG. 3 is a schematic diagram of the charge transfer imaging device of the present invention, and parts corresponding to those in FIG. 1 are designated by the same reference numerals. This charge transfer imaging device consists of a group of vertical shift registers (1) in multiple columns with a CCD configuration, and a channel stop area 0 between each vertical shift register (1), similar to that shown in FIG.
a plurality of photoelectric conversion units, that is, a plurality of light receiving units (2) that are separated by 0 and capable of accumulating charges, and a read date unit (7) that transfers the signal charge of the light receiving units (2) to the vertical shift register (1).
, overflow control section (8)
and a photosensitive area (3) consisting of an overflow drain area (9) and a vertical shift register (4) with a CCD arrangement electrically coupled to one end of each vertical shift register (1) of this photosensitive area (3). Storage unit (5) consisting of column groups
and a horizontal shift register (6) having a CCD configuration coupled to this storage section (5) for reading out signal charges. An input section (c) electrically coupled to one end of the input section (c) is provided.
受光部(2)の信号を垂直シフトレジスタ(1)に転送
する部分の具体的構造の一例も、第2図Aに示すと同様
の構成をとシ得るものであり、特にこの場合受光部(2
)はPN接合型に構成する。An example of the specific structure of the part that transfers the signal from the light receiving section (2) to the vertical shift register (1) can be similar to that shown in FIG. 2
) is configured as a PN junction type.
本発明は、かかる構成において、垂直帰線期間中に、感
光領域の垂直シフトレジスタ(1)内の不要電荷のはき
出し転送と、受光部(2)から垂直シフトレジスタ(1
)への信号電荷の転送と、垂直シフ)L/レジスタ1)
から記憶部(5)の信号電荷の転送を行った後、垂直シ
フトレジスタ(1)の入力部(ハ)よシミ荷を受光部(
2)に注入して次のフレームの受光期間直前における受
光部(2)の電位を常に一定に保持し、残像を無くすよ
うにする。第4図はそのタイミングチャート図を示す。In such a configuration, the present invention enables transfer of unnecessary charges in the vertical shift register (1) of the photosensitive area and transfer from the light receiving section (2) to the vertical shift register (1) during the vertical retrace period.
) and vertical shift) L/register 1)
After transferring the signal charge from the storage section (5) to the input section (c) of the vertical shift register (1), the stain is transferred to the light receiving section (
2) to keep the potential of the light receiving section (2) constant immediately before the light receiving period of the next frame and eliminate afterimages. FIG. 4 shows a timing chart thereof.
また、第5図はその原理図を示すものでこの場合クロッ
ク電圧のタイミング期間をTA−TMまで13分割し、
夫々の期間におけ(9)
る垂直シフトレジスタ(1)、読み出しr−ト部(7)
及び受光部(2)の電位と信号電荷の様子を示す。同図
中、Toは奇数フィールド又は偶数フィールドに対応す
る垂直帰線期間、V(V、V)は垂直シφ φA φ
B
フトレジスタ(1)の転送電極に与えるクロック電圧(
2相駆動)、Vlnは入力部(ハ)よシミ荷を垂直シフ
トレジスタ(1)を通して受光部(2)に注入するとき
の入カッfルス電圧である。Moreover, FIG. 5 shows the principle diagram. In this case, the timing period of the clock voltage is divided into 13 from TA to TM,
Vertical shift register (1), readout section (7) in each period (9)
and shows the potential and signal charge of the light receiving section (2). In the figure, To is the vertical blanking period corresponding to the odd field or even field, and V (V, V) is the vertical blanking period φ φA φ
B Clock voltage applied to the transfer electrode of foot register (1) (
(2-phase drive), Vln is the input voltage when the stain from the input section (c) is injected into the light receiving section (2) through the vertical shift register (1).
第4図及び第5図に示すように読み出すべき奇数フィー
ルド又は偶数フィールドにおいてその対応する垂直帰線
期間To内の最初の期間TAで、まづ垂直シフトレジス
タ(1)を転送用クロック信号φ 及びφB1にて駆動
し、第5図の(4)に示すよう1
に垂直シフトレジスタ(1)内の不要電荷を垂直シフト
レジスタ(1)から記憶部(5)、記憶部(5)から水
平シフトレジスタ(6)へと空転送してはき出す。この
とき、受光部(2)には前のフレームの残り電荷qc(
後述で明らかとなるが常に一定である)と次のフレーム
の信号電荷Q が蓄積されている。As shown in FIGS. 4 and 5, in the first period TA within the corresponding vertical blanking period To in an odd field or an even field to be read, the vertical shift register (1) is first activated by the transfer clock signal φ and φB1, and as shown in (4) in Figure 5, unnecessary charges in the vertical shift register (1) are shifted horizontally from the vertical shift register (1) to the storage section (5) and from the storage section (5). It is empty-transferred to register (6) and written out. At this time, the remaining charge qc(
As will become clear later, this is always constant) and the signal charge Q of the next frame is accumulated.
n
この不要電荷のはき出し転送後の次の期間TB(10)
で垂直シフトレノスタ(1)の一方の転送電極に読み出
し・9ルスP1を与えて読み出すべきフィールドの受光
部(2)に対応する読み出しr−)部(7)を開き、第
5図の(B)に示すように受光部(2)から垂直シフト
レジスタ(1)に信号電荷を転送する。このとき垂直シ
フ−レジスタ(1)に転送される信号電荷量はQSnと
その垂直シフトレジスタの電位で読み出しr −ト部(
7)の表面電位の変調による変調電荷量ΔQ、nの和Q
lIn+Δqsnとガる。従って受光部(2)にはQ。n In the next period TB (10) after this discharge transfer of unnecessary charges, a readout pulse P1 is applied to one transfer electrode of the vertical shift reno star (1) to readout r corresponding to the light receiving part (2) of the field to be read out. -) section (7) is opened, and the signal charges are transferred from the light receiving section (2) to the vertical shift register (1) as shown in FIG. 5(B). At this time, the amount of signal charge transferred to the vertical shift register (1) is read out using the potential of QSn and the vertical shift register (1).
7) Modulated charge amount ΔQ due to surface potential modulation, sum Q of n
The result is lIn+Δqsn. Therefore, the light receiving part (2) has Q.
−ΔQlInの電荷が残る。A charge of -ΔQlIn remains.
次に期間Tcにおいて、垂mシフトレジスタ(])に転
送用クロック信号φA2及びφB2を与えて第5図の(
C)に示すように垂直シフトレジスタ(1)から記憶部
(5)へ信号電荷を転送する。Next, in period Tc, the transfer clock signals φA2 and φB2 are applied to the vertical shift register (]) as shown in FIG.
As shown in C), signal charges are transferred from the vertical shift register (1) to the storage section (5).
記憶部(5)へ信号電荷を転送した後、期間TDにおい
て垂直シフトレジスタ(1)の上記一方の転送電極にリ
セットパルスP2を与え、第5図の(D)に示すように
読み出しゲート部(7)を開き、その直後の期間Tつに
おいて、入力パルス電圧Vlnを入れて第5図の(匂に
示すように入力部に)よシ新らたに電荷を垂直シフトレ
ジスタ(1)を通じて受光部(2)に注入する。After transferring the signal charges to the storage section (5), a reset pulse P2 is applied to the one transfer electrode of the vertical shift register (1) in the period TD, and the read gate section ( 7) is opened, and in the immediately following period T, the input pulse voltage Vln is applied and a new charge is received through the vertical shift register (1) (to the input section as shown in Fig. 5). Inject into part (2).
そして期間TFのリセットパルスP2が切れる前に入力
部(ハ)より注入電荷を引きぬき、第5図の(乃に示す
ように垂直シフトレジスタ(1)の電位vDoを一定に
し、この電位VDOに基づく読み出しff−)部(7)
の表面電位により受光部(2)に残る電荷Q。を一定に
保つ。Then, before the reset pulse P2 of period TF expires, the injected charge is extracted from the input part (c), and the potential vDo of the vertical shift register (1) is kept constant as shown in (b) of FIG. Based reading ff-) part (7)
Charge Q remaining on the light receiving part (2) due to the surface potential of . keep constant.
このように受光部(2)に残る電荷Q0を一定にしてか
ら、受光期間T。において、第5図の(G)に示すよう
に次のフレームの信号電荷Q8 (n+1 )が蓄積さ
れる。同様にして期間T。−TM及び第5図の(G)〜
(L)に示すように次のフレームの信号電橋Q8(n+
、)+ΔQS(n+1)の記憶部(5)への転送及び垂
直シフトレジスタ(1)の入力部に)よシ受光部(2)
への一定の電荷Q0の注入がなされ、さらに次のフレー
ムの信号電荷が蓄積され、以下同様に繰返えされる。こ
のように受光部(2)には受光期間の直前に常に一定の
電荷Q0が残るために次のフレームには前のフレームの
信号を残さず、残像を無くすことが出来る。After the charge Q0 remaining in the light receiving section (2) is made constant in this way, the light receiving period T begins. At this time, the signal charge Q8 (n+1) of the next frame is accumulated as shown in FIG. 5(G). Similarly, period T. -TM and (G) in Figure 5~
As shown in (L), the signal bridge Q8(n+
, )+ΔQS(n+1) to the storage section (5) and to the input section of the vertical shift register (1)) to the light receiving section (2)
A constant charge Q0 is injected into the frame, and signal charges for the next frame are further accumulated, and the same process is repeated. In this way, since a constant charge Q0 always remains in the light receiving section (2) immediately before the light receiving period, the signal of the previous frame does not remain in the next frame, and afterimages can be eliminated.
なお、このようにした場合の光信号に対する出力Q。u
tを第6図に示す。同図示の如く光量が零であってもΔ
Qcという電荷を垂直シフトレジスタへ読み出す。この
量ΔQcは光量に基づく信号電荷量QSに依存し、ショ
ートチャンネル変調による変調電荷量ΔQ8の如く光量
が増大するに従い減少する。Note that the output Q for the optical signal in this case. u
t is shown in FIG. As shown in the figure, even if the light intensity is zero, Δ
Read out the charge Qc to the vertical shift register. This amount ΔQc depends on the signal charge amount QS based on the light amount, and decreases as the light amount increases, such as the modulated charge amount ΔQ8 due to short channel modulation.
従って受光部から垂直シフトレジスタに読み出される電
荷量QR8゜は
Qu−o = QS+ΔQ8
ΔQ8≦ΔQQ
そして、光信号が零でもΔQcという信号電荷が読み出
されるため、ダークレベルをΔQoとして処理すると、
出力Q。utは
Qout=QR1゜−ΔQ
となり実線図示の如くなる。Therefore, the amount of charge QR8° read out from the light receiving section to the vertical shift register is Qu-o = QS + ΔQ8 ΔQ8 ≦ ΔQQ And even if the optical signal is zero, a signal charge of ΔQc is read out, so if the dark level is processed as ΔQo,
Output Q. ut becomes Qout=QR1°-ΔQ, as shown by the solid line.
上述せる如く、本発明によれば受光部に蓄積された信号
電荷を垂直シフトレジスタによって記憶部へ転送したの
ち、もう一度リセット・クルスを入れて垂直シフトレジ
スタの入力部よシミ荷を受光部に注入し、しかる後、入
力部よシミ荷を引きぬいて常に受光部の電位を一定にし
てから、次のフ(13)
レームの受光を開始するので受光部として感度の良いP
N接合型センサを用いる場合にも残像の発生をなくすこ
とが出来る。As described above, according to the present invention, after the signal charge accumulated in the light receiving section is transferred to the storage section by the vertical shift register, a reset cycle is applied again to inject the stain from the input section of the vertical shift register into the light receiving section. However, after that, the potential of the light receiving part is kept constant by removing the stain from the input part, and then the light reception of the next frame (13) is started.
Even when an N-junction sensor is used, the occurrence of afterimages can be eliminated.
第1図は従来の電荷転送撮像装置の概略図、第2図は残
像の発生機構の説明に供するIテンシャル図、第3図は
本発明による電荷転送撮像装置の概略図、第4図は本発
明の駆動法を示すタイミングチャート図、第5図は残像
を無くす原理的説明図、第6図は本発明の光信号に対す
る出力Q。utを示す特性図である。
(1) ハ垂直シフトレジスタ、(2)は光電変換部、
(3)は感光領域、(5)は記憶部、(6)は水平シフ
トレジスタ、(ハ)は入力部である。
(14)
第1図
第3図
3
第2図
第4図
vr’n
ミ
ド
丘゛
ψ餐
■
舎
ト;
丁;
2
王
ζ
シ
尊
394−
w 、ノ
礎
ζ
)FIG. 1 is a schematic diagram of a conventional charge transfer imaging device, FIG. 2 is an I-tension diagram for explaining the afterimage generation mechanism, FIG. 3 is a schematic diagram of a charge transfer imaging device according to the present invention, and FIG. 4 is a diagram of the present invention. A timing chart diagram showing the driving method of the invention, FIG. 5 is a diagram explaining the principle of eliminating afterimages, and FIG. 6 is an output Q for the optical signal of the invention. It is a characteristic diagram showing ut. (1) C vertical shift register, (2) photoelectric conversion section,
(3) is a photosensitive area, (5) is a storage section, (6) is a horizontal shift register, and (c) is an input section. (14) Fig. 1 Fig. 3 Fig. 2 Fig. 4
Claims (1)
タ群、これら間にチャンネルストップ手段によって互に
電気的に分離され電荷の蓄積が可能な光電変換部及び該
光電変換部の信号電荷を対応する前記第1の垂直シフト
レジスタに転送する装置からなる感光領域と、前記各第
1の垂直シフトレジスタの一端に電気的に結合された入
力部と、前記各第1の垂直シフトレジスタの他の一端に
電気的に結合された第2の垂直シフトレジスタ列群から
なる記憶部と、前記第2の垂直シフトレジスタの一端に
電気的に結合された電荷転送水平シフトレノスフを具備
して成る電荷転送撮像装置において、受光期間後の垂直
帰線期間に前記第1の垂直シフトレジスタ内の不要電荷
のはき出し転送と、前記光電変換部から前記第1の垂直
シフトレジスタへの信号電荷の転送と、前記第1の垂直
シフトレジスタから前記第2の垂直シフトレジスタ列群
への信号電荷の転送を行った後、前記第1の垂直シフト
レジスタの前記入力部より電荷を前記光電変換部へ注入
して次の受光期間直前における前記光電変換部の電位を
常に一定に保持する電荷転送撮像装置の駆動方法。A first vertical shift register group consisting of a plurality of rows of charge transfer devices, a photoelectric conversion section between which is electrically separated from each other by a channel stop means and capable of accumulating charges, and a signal charge of the photoelectric conversion section. a photosensitive area comprising a device for transferring to said first vertical shift register; an input electrically coupled to one end of said each first vertical shift register; and another end of said each first vertical shift register; A charge transfer imaging device comprising: a storage section comprising a second vertical shift register array group electrically coupled to a second vertical shift register; and a charge transfer horizontal shift register electrically coupled to one end of the second vertical shift register. In the vertical retrace period after the light reception period, transferring unnecessary charges in the first vertical shift register, transferring signal charges from the photoelectric conversion section to the first vertical shift register, and transferring the signal charges from the photoelectric conversion section to the first vertical shift register, After the signal charge is transferred from the vertical shift register to the second vertical shift register column group, the charge is injected from the input section of the first vertical shift register to the photoelectric conversion section to receive the next light. A method for driving a charge transfer imaging device in which a potential of the photoelectric conversion unit immediately before a period is always held constant.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57127996A JPS5919474A (en) | 1982-07-22 | 1982-07-22 | Driving method of charge transfer image pickup device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57127996A JPS5919474A (en) | 1982-07-22 | 1982-07-22 | Driving method of charge transfer image pickup device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5919474A true JPS5919474A (en) | 1984-01-31 |
Family
ID=14973868
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57127996A Pending JPS5919474A (en) | 1982-07-22 | 1982-07-22 | Driving method of charge transfer image pickup device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5919474A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01252078A (en) * | 1988-03-31 | 1989-10-06 | Toshiba Corp | Solid-state image pickup device |
-
1982
- 1982-07-22 JP JP57127996A patent/JPS5919474A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01252078A (en) * | 1988-03-31 | 1989-10-06 | Toshiba Corp | Solid-state image pickup device |
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