JPS59168742A - Data communication system - Google Patents

Data communication system

Info

Publication number
JPS59168742A
JPS59168742A JP4283483A JP4283483A JPS59168742A JP S59168742 A JPS59168742 A JP S59168742A JP 4283483 A JP4283483 A JP 4283483A JP 4283483 A JP4283483 A JP 4283483A JP S59168742 A JPS59168742 A JP S59168742A
Authority
JP
Japan
Prior art keywords
frequency
signal
data
bus
reference carrier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4283483A
Other languages
Japanese (ja)
Other versions
JPH0457142B2 (en
Inventor
Nobuo Yasuda
信夫 安田
Kiyoshi Masuda
清 増田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Tateisi Electronics Co
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tateisi Electronics Co, Omron Tateisi Electronics Co filed Critical Tateisi Electronics Co
Priority to JP4283483A priority Critical patent/JPS59168742A/en
Publication of JPS59168742A publication Critical patent/JPS59168742A/en
Publication of JPH0457142B2 publication Critical patent/JPH0457142B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To reduce the regeneration stable period of a synchronizing carrier wave for PSK demodulation by designating a bus connecting a head end device and plural commuication stations as the frequency multiplex center split system and always synchronizing all communication stations to a reference carrier wave of the head end device. CONSTITUTION:Plural communication stations Ti are connected to a bus 1 one end of which is provided with the head end device HE. The head end device HE is provided with a reference oscillator 2 generating a clock signal f1 and two reference carrier waves f2, f3, a frequency divider 3, means 4, 5 receiving and demodulating a 2-phase PSK demodulating signal in the frequency f2 outputted from each communication station, and means 6,7 forming and transmitting the 2-phase PSK signal in fequency f3 modulating a data string coding differentially the consecution of ''1'' data when no receiving signal exists. Each communication station Ti receives the 2-phase PSK signal in the frequency f3, regenerates the clock signal f1 and the reference carrier waves f2, f3 and forms the 2-phase PSK signal in the frequency f2.

Description

【発明の詳細な説明】 (発明の分野) この発明は、比較的狭い地域に分散したコンピュータ機
器を相互接続するローカル・ネットワークに属するデー
タ通信システムに関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention This invention relates to data communication systems belonging to local networks interconnecting computer equipment distributed over a relatively small area.

(発明の背景) 最近、+61−のビルや工場、敷地内に存在する一Jシ
ンピユー機器を相互接続する小規模なネットワーク、ず
なわらローカル・ネットワークが盛んに開発されている
。規在知られている各種のローカル・ネッ]・ワークは
、ベースバンド電送がほとんどで、搬送式は非常に少な
い。一部に見られる搬送式のシステムは、送信端末のキ
ャリアのオン・オーツに従って受信回線のキャリアをオ
ン・Aフしているため、受信端末におけるキャリア安定
時間が比較的太ぎくなるなどの問題のため、同期の必要
なPSK(位相シフ1−ヤーイング)方式は使用されて
おらず、主としてFSK(周波数シフトキーインク)方
式になっていた。このため、各端末どうしの同期は取れ
ず、またC8MA/CD (主11リアセンス多重アク
セス/衝突検出)制御のlζめのキ1rリア、1!T!
i突検出プロセスが長くなり、ベースバンド電送より効
率が落らるという欠点かあつ lこ 。
(Background of the Invention) Recently, Zunawara Local Networks, which are small-scale networks that interconnect 1J Shinpyu equipment existing in +61- buildings, factories, and premises, have been actively developed. Most of the currently known local networks are based on baseband transmission, with very few carrier-type networks. In some carrier-type systems, the carrier of the receiving line is turned on and off according to the on/off state of the carrier of the transmitting terminal, which causes problems such as the carrier stabilization time at the receiving terminal being relatively long. Therefore, the PSK (phase shift one-yearing) method, which requires synchronization, was not used, and the FSK (frequency shift keying) method was mainly used. For this reason, each terminal cannot be synchronized, and C8MA/CD (main 11 rear sense multiple access/collision detection) control lζth key 1r rear, 1! T!
The disadvantage is that the detection process is longer and the efficiency is lower than that of baseband transmission.

(発明の目的) この発明の目的は、一端にヘッドエンド装置を設(ブた
バスに複数の通信局を接続し、これら通(n局間で2相
PSK変調方式、HDLC(ハイレベルデータリンク)
手順のデータフレーム形式、C3MA’/’CDのアク
セス方式でデータ通信を行なうシステムで、特に、上記
バスを周波数多重センタースプリット式とし、ヘッドエ
ンド装置の基準搬送波に常時全通信局を同期させ、各通
信局でのPSK復調用同期搬送波の再生安定時間が短く
、またC3MA/CD制御の検出プロセスが短くなるよ
うにしたデータ通信システムを提供することにある。
(Object of the Invention) The object of the present invention is to connect a plurality of communication stations to a head-end device at one end (buta bus), and to communicate between them using two-phase PSK modulation method and HDLC (high level data link). )
This is a system that performs data communication using the procedural data frame format and the C3MA'/'CD access method.In particular, the bus is of a frequency multiplexing center split type, all communication stations are always synchronized with the reference carrier wave of the headend equipment, and each It is an object of the present invention to provide a data communication system in which the reproduction stabilization time of a synchronous carrier wave for PSK demodulation at a communication station is short, and the detection process of C3MA/CD control is shortened.

(発明の構成と効果) 上記の目的を達成するために、この発明に係るデータ通
信システムでは、上記ヘッドエンド装置は、周波数f1
のクロック信号、flの整数倍の周波数f2の基準搬送
波、f2の整数比の周波数f3の基準搬送波を発生する
手段と、上記通信局から上記バスに出力された周波数f
2の2相PSK信号を受信し、上記基準搬送波f2Jj
よびクロック信号11を用いて復調する受信/復調手段
と、この受イに/復調手段の受信信号がないときは゛1
″データの連続を差動符号化しでなるデータ列を変調デ
ータとし、上記受信信号があるときにはそれの復調出力
を変調データとし、上記基準搬送波f3を用いて周波数
f3の2相PSK信号を作り、」−記バスに出力する変
調/送信手段を有し、−11記通信局は、上記ヘッドエ
ンド装置から上記バスに出力された周波数f3の2相)
) S K信号を受信りる受信手段と、この受信手段の
出力からクロック信8f1.基準搬送波f2およびf3
を再生ずるとともに、受信出力を復調する再生/復調手
段と、差動符号化された送信データを変調データとし、
」二を己i1T %されIこクロック信号f1および基
*+m送波f2を用いて周波数f2の2相PSK信号を
作り、上記バスに出力する変調/送信手段と、上記再生
/′復調手段の出力に基づいてC8MA/CD方式のア
クセス制御を行なう≠段とを有することを特徴とする。
(Structure and Effects of the Invention) In order to achieve the above object, in the data communication system according to the present invention, the head end device has a frequency f1.
means for generating a clock signal, a reference carrier wave having a frequency f2 that is an integer multiple of fl, a reference carrier wave having a frequency f3 that is an integer ratio of f2, and a frequency f output from the communication station to the bus.
2 two-phase PSK signal is received, and the reference carrier wave f2Jj is
and a receiving/demodulating means that demodulates using the clock signal 11, and when there is no received signal of the receiving/demodulating means,
``A data string obtained by differentially encoding a series of data is used as modulation data, and when the received signal is present, the demodulated output thereof is used as modulation data, and a two-phase PSK signal of frequency f3 is created using the reference carrier f3, - has a modulation/transmission means for outputting to the bus;
) A receiving means for receiving the SK signal, and a clock signal 8f1. from the output of this receiving means. Reference carrier f2 and f3
and a reproducing/demodulating means for reproducing the received output and demodulating the received output, and using the differentially encoded transmission data as modulation data,
A modulation/transmission means for producing a two-phase PSK signal of frequency f2 using the clock signal f1 and the base*+m transmission wave f2 and outputting it to the bus, and a reproduction/demodulation means for It is characterized by having a ≠ stage for performing C8MA/CD type access control based on the output.

このシステムにJ、れば、ずべての通信局を常時ヘッド
エンド装置からの基準搬送波で同期状態に保つことがで
き、各通信局でのPSK復調動作の立上りが極めて良く
なり、またC5MA/CD制御の立上りも良(なり、効
率の良いデータ通信が行なえる。
If this system is used, all communication stations can be kept in synchronization with the reference carrier wave from the headend device at all times, the start-up of PSK demodulation operation at each communication station will be extremely good, and C5MA/CD Control start-up is also good (and efficient data communication can be performed).

(実施例の説明) 第1図は本システムの全体構成を示している。(Explanation of Examples) Figure 1 shows the overall configuration of this system.

バス1の一端にヘッドエンド装置HEIfi設けられ、
バス1に多数の通信局T1〜Tnが接続される。
A head end device HEIfi is provided at one end of the bus 1,
A large number of communication stations T1 to Tn are connected to bus 1.

ヘッドエンド装置HEからバス1に周波数f3の2相P
SK信号が常時出力されており、各通信局下1〜Tnは
これを受信する。
2-phase P with frequency f3 from headend device HE to bus 1
The SK signal is constantly output, and each communication station 1 to Tn receives it.

通信局−r;<t=1〜11)は、CS MA / C
Dのアクセス制御に従って、HD L C手順のデータ
フレーム形式の送信データを周波数f2の2相PSK信
号の形態でバス1に出力する。この信号をヘッドエンド
装置HEが受信し、復調し、再び周波数f3の搬送波に
よる2相PSK信号の形態でバス1に出力する。
Communication station-r;<t=1-11) is CS MA/C
According to the access control of D, transmission data in the data frame format of the HD LC procedure is output to the bus 1 in the form of a two-phase PSK signal of frequency f2. The headend device HE receives this signal, demodulates it, and outputs it to the bus 1 again in the form of a two-phase PSK signal using a carrier wave of frequency f3.

送信データを送出した通信局T1では、自らが送出した
データとヘッドエンド装置HEから周波数f3の2相P
SK信号の形でバス7に返送されたデータとを比較して
、衝突検知を行なう。
The communication station T1 that sent the transmission data transmits the data it sent and the two-phase P of frequency f3 from the headend device HE.
Collision detection is performed by comparing the data sent back to the bus 7 in the form of an SK signal.

また、ある送信局Tiから送出されたデータは、ヘッド
エンド装置HEからの周波数f3の2相PSK信号の形
で他のす、べての通信局T1〜T 11に受信される。
Further, data sent from a certain transmitting station Ti is received by all other communication stations T1 to T11 in the form of a two-phase PSK signal of frequency f3 from the headend device HE.

各通イに局1゛1〜Tnは受信フレームに膚かれでいる
目的アドレスを読み、そのアドレスと自分のアドレスと
が一致すれば、引続くデータを読込む。そして、CRC
チェックの結果、誤りがな=()ればA CKフレーム
を送信局へ送る。
In each case, the stations 1-1 to Tn read the target address appearing in the received frame, and if the address matches their own address, they read the following data. And the CRC
As a result of the check, if there is no error (), an ACK frame is sent to the transmitting station.

第2図はヘッドエンド装置HEの構成を示している。ヘ
ットエンド装置トIEでは、ど単発振器2の出ノjを分
周器3で分周するこ、とにより、周波数f1のクロック
信号、flの整数倍の周波数f2の基81−搬送波、f
2の整数比の周波数f3の基準搬送波を作り出り。以下
、これらの信号をり[1ツク信号f1.基準搬送波f2
.基準搬送波f3と記′!l。
FIG. 2 shows the configuration of the head end device HE. In the head end device IE, by dividing the output j of the single oscillator 2 by the frequency divider 3, a clock signal of frequency f1, a base 81-carrier wave of frequency f2 which is an integral multiple of fl, and f
Create a reference carrier wave with a frequency f3 of an integer ratio of 2. Hereinafter, these signals will be referred to as [1 signal f1. Reference carrier f2
.. Described as reference carrier wave f3'! l.

通信局Tiからバス1に出力された周波数f2の2相P
SK信号は、ヘッドエンド装置HEにおける帯域フィル
タと自動利得制御型増幅器力日らなる受信回路4で受信
され、復調回路5に入力される。受信回路4はバス1上
に周波数f2のキャリアが存在するか否かを示すキャリ
ア検出信号CI)を出力し、己れを変調回路6に与える
2-phase P of frequency f2 output from communication station Ti to bus 1
The SK signal is received by a reception circuit 4 consisting of a bandpass filter and an automatic gain control type amplifier in the headend device HE, and is input to a demodulation circuit 5. The receiving circuit 4 outputs a carrier detection signal CI) indicating whether or not a carrier of frequency f2 is present on the bus 1, and supplies it to the modulation circuit 6.

復調回路5は、分周器3からのクロック信号11と基準
搬送波f2を使い、受信回路4の出力を復調し、復調デ
ータR8Dを得る。この復調データR3Dは変調回路6
の変調入力となる。
The demodulation circuit 5 demodulates the output of the reception circuit 4 using the clock signal 11 from the frequency divider 3 and the reference carrier wave f2, and obtains demodulated data R8D. This demodulated data R3D is transmitted to the modulation circuit 6
becomes the modulation input.

変調回路6は、受信回路4で周波数f2の2相PSK信
号が受信されている場合(キャリア検出信号CDが出力
されている)、復調回路5の復調出力R8Dを変調デ、
−夕とし、分周器3のりaツク信号f1および基準搬送
波f3を使い、データR8D、で変調された周波数f3
の2相PSK信号を作る。この信号は、増幅器と帯域フ
ィルタからなる送信回路7によってバス1に出力される
。つまり、通信局T1から出力された周波数f2の2相
PSK信号は、ヘッドエンド装置1−I Eにて周波数
f3の2相PSK信号に周波数変換され、再びバス1に
出力される。
When the two-phase PSK signal of frequency f2 is received by the receiving circuit 4 (the carrier detection signal CD is output), the modulating circuit 6 modulates the demodulated output R8D of the demodulating circuit 5.
- Frequency f3 modulated by data R8D, using frequency divider 3's a clock signal f1 and reference carrier wave f3.
Create a two-phase PSK signal. This signal is output to the bus 1 by a transmitting circuit 7 consisting of an amplifier and a bandpass filter. That is, the two-phase PSK signal of frequency f2 output from the communication station T1 is frequency-converted by the headend device 1-IE into a two-phase PSK signal of frequency f3, and is output to the bus 1 again.

また変調回路6は、何れの通信局T1〜T 11からb
周波数f2の4ニヤリアが出力されておらず、受信回路
4のキトリア検出信号CDが出力されない場合、次のよ
うに動作づる。このとき変調回路6は、II I I+
データの連続を差動符号化してなるデータ列を変調デー
タとし、上記クロック信号f1おJ:び基準搬送波f3
を使って周波数f3の2相t〕S K (ffi号を作
り、この信号を送信回路7をfiしてバス1に出ツノす
る。つまり、各通(U局Tl−T’ nが何れも送信を
行なっていない状態にては、l\ラッドンド装置1−1
トから常時II I I+データの連続を差動符号化し
てなるデータ列で変調した周波数f3の2相PSK信号
がバス1に出力されている。各通信局下1〜Tnはこの
信号を受信し、その受信信号からり[1ツク信号f1.
基4f搬送波f2、基準搬送波f3を再生する。このた
め、各通信局]1〜T nは常ロ4ヘッドエンド装置ト
IFによって同期状態に保たれている。
Further, the modulation circuit 6 is connected to any of the communication stations T1 to T11 to b.
When the 4-Near signal of frequency f2 is not output and the chitria detection signal CD of the receiving circuit 4 is not output, the operation is as follows. At this time, the modulation circuit 6
A data string obtained by differentially encoding a series of data is used as modulation data, and the clock signal f1 and the reference carrier f3 are
A two-phase signal t]S K (ffi) of frequency f3 is generated using When not transmitting, l\Radnd device 1-1
A two-phase PSK signal of frequency f3 modulated with a data string obtained by differentially encoding a series of II II I+ data is always output to bus 1 from the bus 1. Each communication station 1 to Tn receives this signal, and from the received signal [1st signal f1.
The base 4f carrier wave f2 and the reference carrier wave f3 are reproduced. For this reason, each communication station [1 to Tn] is always kept in a synchronized state by the head end device IF.

第3図は1つの通信局T1の構成を示している。FIG. 3 shows the configuration of one communication station T1.

ヘッドエンド装置H’Eからバス1に出力された周波数
f3の2相PSK信号は、通信局Tiにおいて、帯域フ
ィルタと自動利得制御型増幅器からなる受信回路8で受
信される。受信回路8の出力は基準信号再生回路9に入
力され、この回路でクロック信号f1.基準搬送波f2
.基t1!;搬送波f3が再生される。
A two-phase PSK signal of frequency f3 output from the headend device H'E to the bus 1 is received by a receiving circuit 8 comprising a bandpass filter and an automatic gain control type amplifier at the communication station Ti. The output of the receiving circuit 8 is input to the reference signal reproducing circuit 9, which converts the clock signal f1. Reference carrier f2
.. Base t1! ; Carrier wave f3 is reproduced.

復調回路10は、再生されたクロック信号11と基準搬
送波f3を使って、受信回路8の出力を復調し、受信デ
ータRDを得る。ノックセス制御部15は、復調回路1
0から入力される受信データRDをチュックし、このデ
ータが°゛1°′1°′データ差動符号化してなるデー
タ列である場合、バス1に何れの通信局下1〜7’ r
+かうも周波数f2のキャリアが出力されていないこと
を認識する。
The demodulation circuit 10 demodulates the output of the reception circuit 8 using the reproduced clock signal 11 and the reference carrier wave f3 to obtain reception data RD. The knock access control section 15 includes the demodulation circuit 1
Check the received data RD input from 0, and if this data is a data string obtained by differentially encoding °1°'1°' data, which communication station 1 to 7'r is connected to bus 1?
+ It is recognized that the carrier of frequency f2 is not output.

つまり、バス1が非使用状態であることを■する。In other words, it is assumed that the bus 1 is not in use.

なお、受信回路8はバス1に周波数f3のキトリアが存
在するか否かを示づキャリア検出信号CDを出力し、こ
れをアクセス制御部15に与える。
Note that the receiving circuit 8 outputs a carrier detection signal CD indicating whether or not a kitria of frequency f3 exists on the bus 1, and provides this to the access control section 15.

アクセス制御部15は、キャリア検出信号CI)が入力
されている状態が正常で、この信@CDがなくなるとシ
ステムになんらかの貨常が生じていることを認識する。
The access control unit 15 recognizes that the state in which the carrier detection signal CI) is input is normal, and that some kind of abnormality has occurred in the system when this signal @CD disappears.

アクセス制御部15は、送信ずべきデータがあ゛る場合
、上述のようにバス1が非使用状態であることを確認し
て、差動符号化された送信データSD←231;1回路
11に与える。変調回路11は、再生されたクロック信
号f1と基準搬送波f2を使い、送信データS ))で
変調された周波数12の2相1−) S K イM号を
作る。この信号は増幅器と帯域フィルタhI Iうなる
送信回路12によってバス1に出力される。
When there is too much data to be transmitted, the access control unit 15 confirms that the bus 1 is not in use as described above and transfers the differentially encoded transmission data SD←231;1 to the circuit 11. give. The modulation circuit 11 uses the reproduced clock signal f1 and the reference carrier wave f2 to generate a two-phase 1-) S K I M signal of frequency 12 modulated with the transmission data S )). This signal is output to bus 1 by an amplifier and a bandpass filter hII transmitter circuit 12.

このように通信局T iからデータSDで変調された周
波t!if2の2相P S K信号が出力されると、上
述したヘッド土ンド’!冒HEの作用により、上記の送
信データS l)で変調された周波数f3の2相P S
 K信号がバス1に返送される。この信号は通信局T 
iの受信回路8で受信され、復調回路10で復調される
。このときの復調データRDは、送信データSDに対し
て2クロック分の遅れを伴った同じ内容のデータである
。従って、送信を行なった通信局T iにおいて、送信
データSDを再生されたクロック信号f2を使ってシフ
トレジスタ13で2クロック分だけ遅延させ、そのW゛
延させたデータと復調回路10から出力される受信デー
タRDとをEOR回路14で比較づる。E OR回路1
4の両入力データが一致しておれば、その出力DSは”
 o ”であり、これは衝突が起こっていないことを示
す。複数の通信局から同時に送信が行われると、それぞ
れの送信局において、FOR回路14の両入力データが
一致せず、その出力DSが1″となる。アクセス制御部
15はDS=″゛1″を受けて衝突が起こったことを認
識する。
In this way, the frequency t! modulated by the data SD from the communication station T i! When the two-phase PSK signal of if2 is output, the above-mentioned head position '! Due to the effect of HE, the two-phase P S of frequency f3 modulated by the above transmission data S
The K signal is sent back to bus 1. This signal is from communication station T
i is received by the receiving circuit 8 and demodulated by the demodulating circuit 10. The demodulated data RD at this time has the same content as the transmitted data SD with a delay of two clocks. Therefore, in the communication station T i that performed the transmission, the transmitted data SD is delayed by two clocks in the shift register 13 using the reproduced clock signal f2, and the delayed data and the data are output from the demodulation circuit 10. The EOR circuit 14 compares the received data RD. E OR circuit 1
If both input data of 4 match, the output DS is "
o'', which indicates that no collision has occurred. When multiple communication stations simultaneously transmit data, the input data of the FOR circuit 14 at each transmitting station do not match, and the output DS 1″. The access control unit 15 receives DS="1" and recognizes that a collision has occurred.

この後は、周知のC8MA/CD制御手順に則って再送
信の動作が行なわれる。
After this, the retransmission operation is performed according to the well-known C8MA/CD control procedure.

なお、バス1は同軸ケーブルなどの専用の電送線を用い
ても良いが、搬送式の利点を生かして、電源配線をバス
1として利用しても良い。その場合、電送線の配線コス
トが不要となり、簡便なローカル・ネッ1〜ワークには
最適な構成となる。
Note that a dedicated power transmission line such as a coaxial cable may be used as the bus 1, but power supply wiring may also be used as the bus 1, taking advantage of the transport type. In that case, the wiring cost of electric transmission lines becomes unnecessary, and the configuration becomes optimal for a simple local network.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本シスデムの全体の概略構成を示り図、第2図
はヘッドエンド装置)−IEの構成を示す図、第3図は
1つの通信局T iの構成を示す図である。 1−(E・・・・・・・・・・・・ヘッドエンド装置「
1〜l−n・・・通信局 1・・・・・・・・・・・・・・・バス2・・・・・・
・・・・・・・・・基準発振器3・・・・・・・・・・
・・・・・分周器4・・・・・・・・・・・・・・・受
信回路5・・・・・・・・・・・・・・・復調回路6・
・・・・・・・・・・・・・・変調回路7・・・・・・
・・・・・・・・・送信回路8・・・・・・・・・・・
・・・・受(+’i回路9・・・・・・・・・・・・・
・・基準信号再生回路′10・・・・・・・・・・・・
復調回路11・・・・・・・・・・・・変調回路12・
・・・・・・・・・・・送信回路13・・・・・・・・
・・・・シフ1−レジスタ14・・・EOR回路 15・・・アクセス制御部 特許出願人 立石電機株式会社
FIG. 1 is a diagram showing the overall general configuration of this system, FIG. 2 is a diagram showing the configuration of the headend device (IE), and FIG. 3 is a diagram showing the configuration of one communication station T i. 1-(E・・・・・・・・・Head end device “
1~l-n・・・Communication station 1・・・・・・・・・・・・Bus 2・・・・・・
......Reference oscillator 3...
..... Frequency divider 4 ..... Receiving circuit 5 ..... Demodulating circuit 6.
......Modulation circuit 7...
......Transmission circuit 8...
・・・・Reception (+'i circuit 9・・・・・・・・・・・・・
・Reference signal regeneration circuit '10・・・・・・・・・・・・
Demodulation circuit 11...Modulation circuit 12.
.........Transmission circuit 13...
...Schiff 1-Register 14...EOR circuit 15...Access control unit Patent applicant Tateishi Electric Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] (1)一端にヘッドエンド装置を設けたバスに複数の通
信局を接続し、これら通信局間で2相PSK変調方式、
HDLC手順のデータフレーム形式。 C8MA/CDのアクセス方式でデータ通信を行なうシ
ステムで、上記ヘッドエンド装置は、周波数f1のクロ
ック信号、flの整数倍の周波数f2の基準搬送波、f
2の整数比の周波数f3の基準搬送波を発生ずる手段と
、上記通信局から上記バスに出力された周波数f2の2
相PSK信号を受信し、上記基準搬送波f2およびクロ
ック信号f1を用いて復調Jる受信/復調手段と、この
受信/復調手段の受信信号がない・ときは゛1″データ
の連続を差動旬月化してなるデータ列を変調データとし
、上記受信信号があるときにはそれの復調出力を変調デ
ータとし、上記基準搬送波f3を用いて周波数f3の2
相PSK信号を作り、上記バスに出力する変調/送信手
段を有し、上記通信局は、上記ヘッドエンド装置から上
記バスに出力された周波数f3の2相PSK信号を受信
する受信手段と、この受信手段の出力からクロック信号
f1.基準搬送波f2およびf3を再生するとともに、
受信出力を復調づ−る再生/復調手段と、差動符号化さ
れた送信データを変調データとし、上記再生されたクロ
ック信号f1および基準搬送波f2を用いて周波数f2
の2相P S K信号を作り、上記バスに出力する変調
/送信手段と、上記再生/復調手段の出力に基づいてC
8MA/CD方式のアクセス制御を行なう手段とを有す
る、 ことを特徴とするデータ通信システム。
(1) Multiple communication stations are connected to a bus with a head-end device installed at one end, and two-phase PSK modulation is used between these communication stations.
Data frame format for HDLC procedure. In a system that performs data communication using the C8MA/CD access method, the headend device receives a clock signal of frequency f1, a reference carrier wave of frequency f2 which is an integral multiple of fl, and f
means for generating a reference carrier wave with a frequency f3 having an integer ratio of 2; and 2 of the frequency f2 outputted from the communication station to the bus;
Receiving/demodulating means receives the phase PSK signal and demodulates it using the reference carrier wave f2 and clock signal f1, and when there is no reception signal of this receiving/demodulating means, the series of "1" data is differentially transmitted. The data string formed by the above-mentioned received signal is used as modulation data, and when the received signal is present, the demodulated output thereof is used as modulation data, and the reference carrier wave f3 is used to convert the frequency f3 to 2.
The communication station has modulation/transmission means for generating a phase PSK signal and outputting it to the bus, and the communication station includes a reception means for receiving a two-phase PSK signal of frequency f3 output from the headend device to the bus; Clock signal f1. from the output of the receiving means. While regenerating reference carrier waves f2 and f3,
A reproduction/demodulation means demodulates the received output, uses the differentially encoded transmission data as modulation data, and uses the reproduced clock signal f1 and reference carrier f2 to generate the frequency f2.
A modulation/transmission means that generates a two-phase PSK signal and outputs it to the bus, and a C
1. A data communication system, comprising means for performing 8MA/CD access control.
JP4283483A 1983-03-15 1983-03-15 Data communication system Granted JPS59168742A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4283483A JPS59168742A (en) 1983-03-15 1983-03-15 Data communication system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4283483A JPS59168742A (en) 1983-03-15 1983-03-15 Data communication system

Publications (2)

Publication Number Publication Date
JPS59168742A true JPS59168742A (en) 1984-09-22
JPH0457142B2 JPH0457142B2 (en) 1992-09-10

Family

ID=12646996

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4283483A Granted JPS59168742A (en) 1983-03-15 1983-03-15 Data communication system

Country Status (1)

Country Link
JP (1) JPS59168742A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62208728A (en) * 1986-02-12 1987-09-14 Fujitsu Ltd Data transmitter receiver
US4931816A (en) * 1988-05-30 1990-06-05 Minolta Camera Kabushiki Kaisha Internal pressure adjusting mechanism for underwater and waterproof products

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62208728A (en) * 1986-02-12 1987-09-14 Fujitsu Ltd Data transmitter receiver
US4931816A (en) * 1988-05-30 1990-06-05 Minolta Camera Kabushiki Kaisha Internal pressure adjusting mechanism for underwater and waterproof products

Also Published As

Publication number Publication date
JPH0457142B2 (en) 1992-09-10

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