JPS59158580A - Method of producing printed circuit board - Google Patents
Method of producing printed circuit boardInfo
- Publication number
- JPS59158580A JPS59158580A JP3347283A JP3347283A JPS59158580A JP S59158580 A JPS59158580 A JP S59158580A JP 3347283 A JP3347283 A JP 3347283A JP 3347283 A JP3347283 A JP 3347283A JP S59158580 A JPS59158580 A JP S59158580A
- Authority
- JP
- Japan
- Prior art keywords
- board
- hole
- printed wiring
- wiring board
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明は、プリント配線基板の製造方法（（係り、特に
本発明は、電子部品の発熱に苅し熱放散性を改良した薄
型コンバク１〜化（小型化）の可能なプリント配線基板
の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a printed wiring board (particularly, the present invention is a method for manufacturing a printed wiring board, and in particular, the present invention is a method for manufacturing a printed wiring board, and in particular, the present invention is directed to a method for manufacturing a printed wiring board. The present invention relates to a method of manufacturing a printed wiring board.
従来、プリント配線基板に半導体素子、殊に発熱の大＠
な電子部品を塔載したものは、該基板の材質は一般には
有機系樹脂とガラヌ繊維又は紙基材であるため、該基板
の熱伝導が悪く、広い面積で銅箔部分を残したり、別途
電子部品に放熱板を取り付けるなどの余分の処理がなさ
れていた。Conventionally, printed wiring boards contain semiconductor elements, especially those that generate a lot of heat.
In the case of electronic components mounted on the board, the material of the board is generally organic resin, galanic fiber, or paper base material, so the heat conduction of the board is poor, and the copper foil part is left over a large area, or it is made separately. Extra processing was done, such as attaching heat sinks to electronic components.
一方、半導体素子やその他の電子部品などを実装する基
板を薄型コンパクト化するために、切削ドリルやエンド
ミルなどにより電子部品形状に相応した形状の四部を設
けるザグリ加工が施されていた。On the other hand, in order to make substrates on which semiconductor elements and other electronic components are mounted thinner and more compact, counterbore processing has been performed using cutting drills, end mills, etc. to create four parts with a shape that corresponds to the shape of the electronic components.
しかしながら、上記ザグリ加工は切削ドリルの摩耗が激
しく生産性を低下させる原因にもなっていた。However, the above-mentioned counterboring process causes severe wear of the cutting drill and causes a decrease in productivity.
本発明は、上記従来技術の欠点に鑑み、これらの欠点を
解決・除去し、安価でかつ信頼性が高く、実装後も薄型
コンパクトなプリント配線基板の製造方法を提供するこ
とを目的とするものである。SUMMARY OF THE INVENTION In view of the above-mentioned drawbacks of the prior art, it is an object of the present invention to provide a method for manufacturing a printed wiring board that is inexpensive, highly reliable, and thin and compact even after mounting, by solving and eliminating these drawbacks. It is.
以下、本発明のプリント配線基板の製造方法を図面に基
づいて具体的に説明する。EMBODIMENT OF THE INVENTION Hereinafter, the manufacturing method of the printed wiring board of this invention will be specifically demonstrated based on drawing.
第１図は、従来のプリント配線基板の製造方法によって
得られたプリント配線基板上に電子部品を塔載した状態
の断面図である。FIG. 1 is a cross-sectional view of electronic components mounted on a printed wiring board obtained by a conventional printed wiring board manufacturing method.
この図面において、（１）はガラス繊維基材のエポキシ
樹脂板、紙基材のエポキシ樹脂板又は紙基材のフェノー
ル樹脂板などのいずれかから成るプリント配線用基板で
ある。＜２＞ ｌｄ該基板上に積層貼着された銅箔であ
り、本図面においては表裏両面銅張り板を示すものであ
る。（３）は各種の半導体素子などの電子部品である。In this drawing, (1) is a printed wiring board made of either a glass fiber-based epoxy resin board, a paper-based epoxy resin board, or a paper-based phenol resin board. <2> ld A copper foil laminated and adhered on the substrate, and this drawing shows a copper-clad board on both the front and back sides. (3) are electronic components such as various semiconductor elements.
第２図の＋ａ＋から（ｆ）は、本発明のプリント配線基
板の製造方法の工程の概要を示す該基板の断面図であり
、ｆｇｌは電子部品を実装した該基板の断面図である。+a+ to (f) in FIG. 2 are cross-sectional views of the printed wiring board showing an overview of the steps of the manufacturing method of the printed wiring board of the present invention, and fgl is a cross-sectional view of the board on which electronic components are mounted.
（ａ＋の図面は本発明の製造方法において使用される両
面銅張りプリント配線用基板の断面図を示すものであり
、（１）はガラス繊維基材のエポキシ樹脂板、紙基材の
エポキシ樹脂板又は紙基材のフェノ−ｌ’ＭＪ脂板など
のいずれかから成るプリント配線用基板、（２）は該基
板上に貼着された銅箔であり、本図面においては両面銅
張りの板を示すものである。(Drawing a+ shows a cross-sectional view of a double-sided copper-clad printed wiring board used in the manufacturing method of the present invention, (1) shows an epoxy resin board with a glass fiber base material and an epoxy resin board with a paper base material. (2) is a copper foil pasted on the board; in this drawing, a board with copper lining on both sides is shown. It shows.
（ｂ）の図面は上記＋８）の図面に示した両面銅張りプ
リント配線用基板に穴（４） 、（４）’ ｆｆｉ複数
明けた状態の該基板の断面図を示すものであり、（４）
は金型などによる打ち抜き加工で形成される実装される
電子部品形状に相応した形状の穴、（４）′は切削ドリ
ルなどにより形成されるスルホール用の穴である。Drawing (b) shows a cross-sectional view of the double-sided copper-clad printed wiring board shown in drawing +8) above with multiple holes (4) and (4)'ffi drilled. )
(4)' is a hole formed by punching using a mold or the like and has a shape corresponding to the shape of the electronic component to be mounted, and (4)' is a hole for a through hole formed by a cutting drill or the like.
（Ｃ）の図面は上記（ｂｌの図面に示した該基板の実装
される電子部品形状に相応した形状の穴の中に該基板の
厚さよりも薄い板厚の金属板又は該基板と同質材料の板
（以下挿入板という）を挿入固定した状態の該基板の断
面図を示すものであり、（５）は前記穴（４）に挿入固
定された該基板の厚さよりも薄い板厚の金属板又は該基
板と同質材料の板である挿入板を示すものである。Drawing (C) is a metal plate with a thickness thinner than the thickness of the board or a material same as the board is placed in a hole of a shape corresponding to the shape of the electronic component mounted on the board shown in the drawing of (bl) above. This is a cross-sectional view of the board in which a plate (hereinafter referred to as an insertion plate) is inserted and fixed, and (5) is a metal plate having a thickness thinner than the thickness of the board inserted and fixed into the hole (4). The insert plate is a plate or a plate of the same material as the substrate.
（ｄｌの図面は上記（Ｃ）の図面に示した挿入板と該基
板の接触部の一部とを接着剤、たとえばエポキシ樹脂、
フェノール樹脂などの熱硬化性樹脂の接着剤又はマスク
用インク、感光性フィルムなどのソルダ−レジストによ
り接合、した状態を示す該基板の断面図であり、（６）
は上記接着剤の接合層である。(dl drawing shows that the insertion plate shown in the above drawing (C) and a part of the contact part of the board are bonded with adhesive, such as epoxy resin.
FIG. 6 is a cross-sectional view of the substrate in a state where it is bonded with an adhesive of thermosetting resin such as phenol resin, ink for a mask, or a solder resist such as photosensitive film, and (6)
is the bonding layer of the above adhesive.
なお、前記挿入板と該基板との接触部分には若干の空隙
部なども存在するので、本図に図示した接合部分に限定
することなく画板の接触部分の全ての空隙部分にエポキ
シ樹脂などの接着剤を圧入充填することもできる。これ
によシ挿入固定のみでは後の電子部品の実装工程又は実
装後の工程において挿入板が脱落するなど接合強度が不
十分であったものが数倍ないしそれ以上の固着強度を得
ることができるようになり補強されると同時に、接触部
分め空隙部に各種の薬品や腐食性物質が侵入しなくなり
、画板間を完全に封止することが可能となった。Note that there are some gaps in the contact area between the insertion board and the board, so fill all the gaps in the contact area of the drawing board with epoxy resin, etc., without limiting it to the joint area shown in this figure. Adhesive can also be press-fitted. As a result, it is possible to obtain a bonding strength several times or more that would otherwise be insufficient due to insertion and fixation alone, such as the insertion plate falling off during the subsequent electronic component mounting process or post-mounting process. At the same time, various chemicals and corrosive substances are prevented from entering the gap between the contact areas, making it possible to completely seal the area between the drawing boards.
次に、（ｅ）の図面は上記（ｄ）の図面に示した接着剤
又はソルダーレジストなどにより両板を接合した該基板
の全表面にメッキを施した状態を示す該基板の断面図で
あり、（７）は銅メッキ又はニッケルメッキなどの金属
被覆層である。この金属被覆層（７）は前記電子部品形
状に相応した形状の穴（４）及びスルホール用の穴（４
）′の全表面にも施されているので該基板の底部などか
らの湿度を完全に防止することが可能となった。Next, drawing (e) is a cross-sectional view of the board showing a state in which the entire surface of the board is plated, with both boards bonded together using adhesive or solder resist as shown in drawing (d) above. , (7) is a metal coating layer such as copper plating or nickel plating. This metal coating layer (7) has a hole (4) having a shape corresponding to the shape of the electronic component and a hole (4) for a through hole.
)', it is possible to completely prevent moisture from entering the bottom of the substrate.
（ｆ）の図面は、上記（Ｃ）の図面に示した全表面に金
属被覆を施した該基板の所望の部分の金属被覆層を残し
て、他の不要部分はエツチングなどにより除去しパター
ン導体回路（７）、（７）′を該基板の表裏両面に形成
する。Drawing (f) shows the patterned conductor shown in drawing (c) above, in which the entire surface is coated with metal, leaving the metal coating layer on the desired parts, and removing other unnecessary parts by etching etc. Circuits (7) and (7)' are formed on both the front and back surfaces of the substrate.
そして、前記電子部品形状に相応した形状の穴（４）及
びスルホ−ｐ用の穴（４どの全表面にも金属被覆されて
いるので、前者の穴（４）は半導体素子、特に発熱し易
い電子部品をこの穴の中に塔載すれば熱伝導が良好であ
るため熱放散性が向上し蓄熱することはなくなり、また
該基板表面に電子部品が突出しない。ただし、この穴（
４）は前記パターン導体回路とは遮断された独立した金
属被覆層を形成することがその性質上必要である。Then, there is a hole (4) with a shape corresponding to the shape of the electronic component, and a hole (4) for Sulfo-P (all surfaces of which are coated with metal, so the former hole (4) is used for semiconductor elements, especially those that easily generate heat. If electronic components are mounted in these holes, heat conduction is good, so heat dissipation is improved and no heat is accumulated, and electronic components do not protrude from the surface of the board.
4) Due to its nature, it is necessary to form an independent metal coating layer that is isolated from the patterned conductor circuit.
一方、スルホール用の穴（４）′の全表面には、前記パ
ターン導体回路と連らなる金属被覆層が形成されるため
この穴はスルホールを形成することになる。On the other hand, on the entire surface of the through-hole hole (4)', a metal coating layer that is continuous with the patterned conductor circuit is formed, so that this hole forms a through-hole.
寸た、（ｇ＋の図面は、本発明の製造方法によって得ら
れたプリント配線基板上に電子部品を塔載し前記パター
ン導体回路とワイヤイーボンディングで実装した状態を
示す該基板の断１ｍ図であり、（３）は各種の半導体素
子などの電子部品であり、（８）は挿入板の裏面及び接
着剤の接合層をメッキなどにより金属被覆した層である
。(Drawing g+ is a 1 meter cross-sectional view of the printed wiring board obtained by the manufacturing method of the present invention, showing a state in which electronic components are mounted on the board and mounted with the patterned conductor circuit by wire e-bonding. (3) is an electronic component such as various semiconductor elements, and (8) is a layer in which the back surface of the insertion plate and the adhesive bonding layer are coated with metal by plating or the like.
以上のように、本発明の製造方法によれば安価でかつ信
頼性が高く実装後も薄型コンパクトなプリント配線基板
を提供することができる。As described above, according to the manufacturing method of the present invention, it is possible to provide a printed wiring board that is inexpensive, highly reliable, and is thin and compact even after mounting.
第１図は従来の製造方法により得られたプリント配線基
板上に電子部品′ｆ：実装した状態の該基板の断面図、
第２図の（，１〜（ｆ）は本発明の製造方法の概要を示
す各工程に、おける該基板の断面図、第２図の（ｇ）は
本発明の製造方法によって得られたプリント配線基板上
に電子部品を実装した状態ρ該基板の断面図をそれぞれ
示すものである。
（１）・・・・・・基板、（２）・・・・・・銅箔層、
（３）・・・・・・電子部品、（４）・・・・・・電子
部品実装用の穴、（４）′・・・・・・スルホール用の
穴、（５）・・・・・挿入板、（６）−・・・・・接合
層、（７）・・・・・・金属被覆層、（８）・・・・・
・金属被覆による補強層。
特許出願人の名称
イビデン株式会社
代表者 多賀潤一部FIG. 1 is a cross-sectional view of an electronic component 'f mounted on a printed wiring board obtained by a conventional manufacturing method;
FIG. 2 (, 1 to (f) is a cross-sectional view of the substrate at each step showing an outline of the manufacturing method of the present invention, and FIG. 2 (g) is a print obtained by the manufacturing method of the present invention. The state in which electronic components are mounted on the wiring board ρ shows a cross-sectional view of the board. (1) ... board, (2) ... copper foil layer,
(3)...Electronic components, (4)...Holes for electronic component mounting, (4)'...Holes for through holes, (5)...・Insert plate, (6)...joining layer, (7)...metal coating layer, (8)...
・Reinforcement layer with metal coating. Patent applicant name IBIDEN Co., Ltd. Representative Jun Taga
Claims (1)
子部品形状に相応（−だ形状の穴を明け、前記穴の形状
に相応しかつ核？ｌ＝板の厚さよりも薄い板厚の金属板
又は該プリント配線用基板と同質材料の板を前記穴に紐
挿入固定した後、該基板と紐挿入固定した板との接触部
分を接着剤又はソルダーレジストにより固着した後、該
接着剤又はソノ１／ダーレジストにより固定ｌ−だ部分
を含む該基板の一部と紐挿入固定した板の裏面にメッキ
を施すことを特徴とするプリント配線基板の製造方法。1. Drill a hole in the shape of the electronic component to be mounted at the desired position on the printed wiring board, and make a hole in the shape of the hole that corresponds to the shape of the hole and has a core thickness that is thinner than the thickness of the board. After inserting and fixing a board or a board made of the same material as the printed wiring board into the hole with a string, fixing the contact portion between the board and the board into which the string has been inserted and fixed with an adhesive or solder resist, and then using the adhesive or solder resist. 1/ A method for manufacturing a printed wiring board, which comprises plating a part of the board including the l-shaped portion fixed by a laser resist and the back surface of the board fixed by inserting a string.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3347283A JPS59158580A (en) | 1983-02-28 | 1983-02-28 | Method of producing printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3347283A JPS59158580A (en) | 1983-02-28 | 1983-02-28 | Method of producing printed circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59158580A true JPS59158580A (en) | 1984-09-08 |
| JPH0378794B2 JPH0378794B2 (en) | 1991-12-16 |
Family
ID=12387479
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3347283A Granted JPS59158580A (en) | 1983-02-28 | 1983-02-28 | Method of producing printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59158580A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6252992A (en) * | 1985-09-02 | 1987-03-07 | 松下電工株式会社 | Chip carrier for electronic element |
| JP2017069253A (en) * | 2015-09-28 | 2017-04-06 | ニチコン株式会社 | Semiconductor Power Module |
| US10813209B2 (en) | 2016-01-07 | 2020-10-20 | Murata Manufacturing Co., Ltd. | Multilayer substrate, electronic device, and a method for manufacturing a multilayer substrate |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI584420B (en) * | 2015-09-16 | 2017-05-21 | 旭德科技股份有限公司 | Package carrier and manufacturing method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5669264U (en) * | 1979-10-25 | 1981-06-08 | ||
| JPS5678284U (en) * | 1979-11-09 | 1981-06-25 | ||
| JPS5678282U (en) * | 1979-11-09 | 1981-06-25 | ||
| JPS56172974U (en) * | 1980-05-19 | 1981-12-21 |
-
1983
- 1983-02-28 JP JP3347283A patent/JPS59158580A/en active Granted
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5669264U (en) * | 1979-10-25 | 1981-06-08 | ||
| JPS5678284U (en) * | 1979-11-09 | 1981-06-25 | ||
| JPS5678282U (en) * | 1979-11-09 | 1981-06-25 | ||
| JPS56172974U (en) * | 1980-05-19 | 1981-12-21 |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6252992A (en) * | 1985-09-02 | 1987-03-07 | 松下電工株式会社 | Chip carrier for electronic element |
| JP2017069253A (en) * | 2015-09-28 | 2017-04-06 | ニチコン株式会社 | Semiconductor Power Module |
| US10813209B2 (en) | 2016-01-07 | 2020-10-20 | Murata Manufacturing Co., Ltd. | Multilayer substrate, electronic device, and a method for manufacturing a multilayer substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0378794B2 (en) | 1991-12-16 |
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