JPS5914317A - Counter time limiting characteristic overcurrent relay - Google Patents

Counter time limiting characteristic overcurrent relay

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Publication number
JPS5914317A
JPS5914317A JP12275582A JP12275582A JPS5914317A JP S5914317 A JPS5914317 A JP S5914317A JP 12275582 A JP12275582 A JP 12275582A JP 12275582 A JP12275582 A JP 12275582A JP S5914317 A JPS5914317 A JP S5914317A
Authority
JP
Japan
Prior art keywords
voltage
resistor
circuit
overcurrent relay
parallel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12275582A
Other languages
Japanese (ja)
Inventor
修 土屋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Fuji Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Electric Manufacturing Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP12275582A priority Critical patent/JPS5914317A/en
Publication of JPS5914317A publication Critical patent/JPS5914317A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明はコンデンサの充電特性を利用した静止形の反限
時特性過電流継電器に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a static type overcurrent relay with inverse time-limiting characteristics that utilizes the charging characteristics of a capacitor.

過電流継電器は、警戒すべき回路の過電流の大きさに関
係なく一定時間後に動作する限時形のものと過電流が大
きくなると動作時間が短くなる反限時形のものなどがあ
り、一般に反限時形のものが多く用いらnている。第1
図は静止形反限時特性過電流継電器の一例金示すブロッ
ク図である。
There are two types of overcurrent relays; one is a time-limiting type that operates after a certain period of time regardless of the magnitude of the overcurrent in the circuit to be alerted to, and the other is a counter-time-limiting type that operates for a shorter period of time as the overcurrent increases. Many shapes are used. 1st
The figure is a block diagram showing an example of a static type overcurrent relay with inverse time-limiting characteristics.

第1図において、第1の変流器1と第2の変流器2とは
互いに直列に接続されて警戒回路に挿入される。電流値
検出回路3は、第1の変流器lの二次側が整流器4.レ
ベル検出回路5.パルス連続回路6とつぎつぎに接続さ
れている。変流器1の二次出力は整流されて、この直流
電流がレベル検出回路5によシその大小を比較され、こ
の電流が一定の大きさを超えると次のパルス連続回路6
で連続出力とされる。また、反限時特性回路7は。
In FIG. 1, a first current transformer 1 and a second current transformer 2 are connected in series with each other and inserted into a warning circuit. In the current value detection circuit 3, the secondary side of the first current transformer l is a rectifier 4. Level detection circuit 5. It is connected to the pulse continuous circuit 6 one after another. The secondary output of the current transformer 1 is rectified, and this DC current is compared in magnitude by a level detection circuit 5. If this current exceeds a certain level, it is passed to the next pulse continuous circuit 6.
It is considered as continuous output. Further, the inverse time characteristic circuit 7 is as follows.

第2の変流器2の二次側が整流回路81%流−電圧変換
回路9(以下においてはI−V回路9と呼ぶ)、限時回
路10とつぎつぎに接続されている。
The secondary side of the second current transformer 2 is connected in succession to a rectifier circuit 81% current-to-voltage conversion circuit 9 (hereinafter referred to as an IV circuit 9) and a time limit circuit 10.

変流器2の二次出力は整流さnこの直流電流がI−■回
路9で電圧に変換され、この電圧の大きさいい換えnは
変流器2の二次電流の大きさに応じて限時回路10が所
璧時時間後動作信号を発する。
The secondary output of the current transformer 2 is rectified, and this DC current is converted into a voltage by the I-■ circuit 9, and the magnitude of this voltage, n, is determined according to the magnitude of the secondary current of the current transformer 2. A time limit circuit 10 issues an operating signal after a predetermined time period.

この電流値検出回路3と反限時特性回路7とはと、もに
アンド回路11に接続され、さらに増幅回路12、補助
リレー13とつぎつぎに接続されている。そしてアンド
回路11で電流値検出回路3と反限時特性回路7の両回
路に出方があることが確認されると、増幅回路12で増
幅され、この出力で補助リレー13が駆動され、接点1
3aが閉じまたは開かnる。
The current value detection circuit 3 and the inverse time characteristic circuit 7 are both connected to an AND circuit 11, and further connected to an amplifier circuit 12 and an auxiliary relay 13 in turn. When it is confirmed by the AND circuit 11 that there is an output in both the current value detection circuit 3 and the inverse time characteristic circuit 7, the output is amplified by the amplifier circuit 12, and the auxiliary relay 13 is driven by this output, and the contact 1
3a is closed or opened.

この反限時特性回路7の詳細結線図の一例を第2図に示
す。第2図において、変流器2の二次側が整流回路8に
接続され、この直流出方側にはろ波コンデンサ14と出
方抵抗15とが並列に接続さnたI−V回路9が接続さ
nている。限時回路10は抵抗値Rが可変できる充電抵
抗16と容量Cの限時コンデンサ17とが直列に接続さ
れ、このコンデンサ17の両端がこのコンデンサ17の
充電電圧の大小を検出するレベル検出回路18に接続さ
nている。いま変流器2の一次側に電流Iが流れると、
この変流器2の二次出方は整流回路8によシ直流に変換
さnろ波コンデンサ14で平滑にされて出力抵抗15に
直流電流として流れる。
An example of a detailed wiring diagram of this inverse time characteristic circuit 7 is shown in FIG. In FIG. 2, the secondary side of the current transformer 2 is connected to a rectifier circuit 8, and the I-V circuit 9 in which a filtering capacitor 14 and an output resistor 15 are connected in parallel is connected to the DC side. I'm here. In the time limit circuit 10, a charging resistor 16 whose resistance value R can be varied and a time limit capacitor 17 having a capacity C are connected in series, and both ends of this capacitor 17 are connected to a level detection circuit 18 that detects the magnitude of the charging voltage of this capacitor 17. I'm here. Now, when current I flows through the primary side of current transformer 2,
The secondary output of the current transformer 2 is converted into a direct current by a rectifier circuit 8, smoothed by an N-filtering capacitor 14, and flows to an output resistor 15 as a direct current.

このとき変流器2の二次側電流をiとする。出力抵抗1
5に直流電流が流れると、この両端の電圧降下Eによシ
限時コンデンサ17が充電抵抗16を介して充電される
。このときの電圧降下(コンデンサを充電する電圧)E
とコンデンサ17の端子電圧との関係は。
At this time, the secondary current of the current transformer 2 is assumed to be i. Output resistance 1
When a DC current flows through the capacitor 5, the time-limit capacitor 17 is charged via the charging resistor 16 due to the voltage drop E across the capacitor 5. Voltage drop at this time (voltage that charges the capacitor) E
What is the relationship between and the terminal voltage of capacitor 17?

h Ec=E(1−ε  ) となる。ただしTは充電経過時間で、この時間Tと端子
電圧Ec との関係は、変流器2の二次電流iに対し、
第3図に示すような変化をする。すなわち電流iが2i
、5iと大きくなるほど時間Tと端子電圧Ec  との
関係曲線は急峻になる。この時間Tがレベル検出回路1
8で検出される一定の電圧Ec、、に達し、アンド回路
に大刀(信号)を与えて補助リレーを動作させる時間で
あり、第4図に示すように反限時特性を示す。すなわち
Ec、に達する時間Tは、電流ilではT、と長いがb
 2 rとなるとT!s  5 iとなるとT、と急減
する。なお電流iを一足とし、コンデンサ17を充電す
る電圧Eを一定とした場合、コンデンサ17の端子電圧
Ecは、第5図に示すように時間Tの経過とともに電電
圧Ec、に達する時間Tは充電抵抗16に比列する。そ
して充電抵抗16を変化させることにより第4図に示す
反限時特性曲線そのものを第1象眼の45度方向にほぼ
平行移動したような種々の反限時特性曲線を得ることが
でき、反限時特性過電流継電器をこ几らの任意の特性曲
線に従って動作するように設定することができる。以上
の説明は出力抵抗の両端の電圧降下Eを直接限時回路に
与は同じである。
hEc=E(1-ε). However, T is the charging elapsed time, and the relationship between this time T and the terminal voltage Ec is as follows for the secondary current i of the current transformer 2:
Changes occur as shown in Figure 3. That is, the current i is 2i
, 5i, the steeper the relationship curve between time T and terminal voltage Ec becomes. This time T is the level detection circuit 1
This is the time when the constant voltage Ec detected at 8 is reached and a signal is given to the AND circuit to operate the auxiliary relay, and exhibits an inverse time limit characteristic as shown in FIG. In other words, the time T to reach Ec is long, T for current il, but b
When it comes to 2 r, T! When it comes to s 5 i, it decreases rapidly to T. Note that when the current i is one foot and the voltage E used to charge the capacitor 17 is constant, the terminal voltage Ec of the capacitor 17 reaches the electric voltage Ec as time T elapses, as shown in FIG. It is proportional to the resistor 16. By changing the charging resistor 16, it is possible to obtain various inverse time characteristic curves in which the inverse time characteristic curve itself shown in FIG. The current relay can be set to operate according to any of these characteristic curves. The above explanation is the same as applying the voltage drop E across the output resistor directly to the time limit circuit.

ところでこのような従来の反限時特性過電流継電器は、
一般にその動作時間を変更することはできるが、この動
作時間の変更は、上述のように反限時粘性曲atはぼ4
5度の方向に平行移動させることであ91曲線の形を変
更し、特に電流値の大きい部分とか、小さい部分の特性
を変えることは困難である。
By the way, such conventional overcurrent relays with inverse time-limiting characteristics are
Generally, the operating time can be changed, but as mentioned above, the inverse time viscous curve at is approximately 4
It is difficult to change the shape of the 91 curve by moving it in parallel in the direction of 5 degrees, and especially to change the characteristics of the portion where the current value is large or the portion where the current value is small.

本発明は上述の点にかんがみなされたもので。The present invention has been made in view of the above points.

反限時特性曲線の異なった形の種々の反限時特性過電流
継電器を提供することを目的とするdこの目的は、系統
線路に挿入された変流器の二次電流を整流したのち平滑
用コンデンサおよび抵抗回路網からなる電流−電圧変換
回路に供給し、該変換回路の電圧出力全可変抵抗器と積
分用コンデンサからなる積分回路に加え、前記積分用コ
ンデンサの充電電圧をレベル検出回路に加えて動作出力
を得ることによシ反限時特性を得るようにした過電流継
電器において、前記抵抗回路網の所定の抵抗に非線形特
性素子が並列接続されることによシ塊成される。なお抵
抗回路網は、前記平滑用コンデンサに並列接続され分圧
点より前記レベル検出回路への電圧出力を得る分圧抵抗
器からなり前記非線形特性素子は前記分圧抵抗器に対し
て並列接続されたものとすることができる。
The purpose is to provide various anti-time characteristic overcurrent relays with different shapes of anti-time characteristic curves. and a current-to-voltage conversion circuit consisting of a resistor network, and in addition to the voltage output of the conversion circuit and an integrating circuit consisting of a fully variable resistor and an integrating capacitor, the charging voltage of the integrating capacitor is added to a level detection circuit. In an overcurrent relay that obtains inverse time-limiting characteristics by obtaining an operational output, the overcurrent relay is constructed by connecting a nonlinear characteristic element in parallel to a predetermined resistance of the resistor network. The resistor network includes a voltage dividing resistor connected in parallel to the smoothing capacitor to obtain a voltage output from a voltage dividing point to the level detection circuit, and the nonlinear characteristic element is connected in parallel to the voltage dividing resistor. It can be made into

さらに、抵抗回路網は、前記平滑用コンデンサにそれぞ
れ並列接続される抵抗器と分圧抵抗器とからなり、前記
非線形特性素子は前記分圧抵抗器のいずれか一方の抵抗
に並列接続され、前記分圧抵抗器の分圧点よりレベル検
出回路への電圧出力を得るようにすることもできる。ま
た非線形特性素子の種類もバリスタダイオードやツェナ
ダイオードのように特性の異なる素子を用いることによ
って種々の異なった特性曲線の反限時特性過電流継電器
が得られる。
Further, the resistor network includes a resistor and a voltage dividing resistor each connected in parallel with the smoothing capacitor, the nonlinear characteristic element is connected in parallel with one of the voltage dividing resistors, and the nonlinear characteristic element is connected in parallel with one of the voltage dividing resistors, and the It is also possible to obtain the voltage output to the level detection circuit from the voltage dividing point of the voltage dividing resistor. Furthermore, by using elements with different characteristics such as varistor diodes and Zener diodes as nonlinear characteristic elements, inverse time-limiting characteristic overcurrent relays with various different characteristic curves can be obtained.

次に本発明の実施例を図TkUに基づいて詳細に説ンド
回路、増幅回路および補助リレーは従来のものと全く同
じであるからこの部分の構成と動作の説明は省略する。
Next, an embodiment of the present invention will be explained in detail based on FIG. TkU, since the output circuit, amplifier circuit, and auxiliary relay are exactly the same as those of the conventional ones, so the explanation of the structure and operation of these parts will be omitted.

第7図は反限時特性回路の第1の実施例である。第7図
において、第2の変流器2の二次側が整流回路8に接続
され、この直流出力がl−V回路9に接続さ扛ているこ
とは従来のものと同様である。そしてこのI−V回路9
はろ波コンデンサ14と出力抵抗とが互いに並列に接続
されているが、この出力抵抗は既に説明したように限時
回路10に与える電圧Eの大きさを適当にするため第1
の抵抗15aと第2の抵抗15bとに分割され、第2の
抵抗15bの両端に可変抵抗16を介して充電されるコ
ンデンサ17からなる限時回路10が接続さnている。
FIG. 7 shows a first embodiment of the inverse time characteristic circuit. In FIG. 7, the secondary side of the second current transformer 2 is connected to the rectifier circuit 8, and its DC output is connected to the l-V circuit 9, as in the conventional case. And this I-V circuit 9
The filtering capacitor 14 and the output resistor are connected in parallel with each other, and as described above, this output resistor is connected to the first filter capacitor 14 in order to appropriate the magnitude of the voltage E applied to the time limit circuit 10.
A time limit circuit 10 consisting of a capacitor 17 that is charged via a variable resistor 16 is connected to both ends of the second resistor 15b.

この発明が従来の回路と異なる点は直列に接続さf′し
た両出力抵抗15a、15b  の両端に並列に非線形
特性素子20が接続されていることである。以下コンデ
ンサ170両端にレベル検出回路18が接続さnている
点は従来の回路と同様である。非線形特性素子20は1
例えば加える電圧が高くなると抵抗値が減るバリヤダイ
オードや逆電圧を加えると、ある電圧から急に逆電流が
増加する(抵抗値が減少する)ツェナダイオードなどが
用いらnる。このような非線形特性素子20が出力抵抗
15a、15b  と並列に接続されると、電流iが増
加してもコンデンサ17を充電するための電圧EFiあ
る値以上では余り増加しないから、コンデンサ17の端
子電圧Ecがレベル検出回路で検出さnる一定電圧Ec
The present invention differs from conventional circuits in that a nonlinear characteristic element 20 is connected in parallel to both ends of both output resistors 15a and 15b connected in series f'. This circuit is similar to the conventional circuit in that the level detection circuit 18 is connected to both ends of the capacitor 170. The nonlinear characteristic element 20 is 1
For example, a barrier diode whose resistance value decreases as the applied voltage increases, or a Zener diode whose reverse current suddenly increases (resistance value decreases) from a certain voltage when a reverse voltage is applied are used. When such a nonlinear characteristic element 20 is connected in parallel with the output resistors 15a and 15b, even if the current i increases, the voltage EFi for charging the capacitor 17 does not increase much above a certain value, so the terminal of the capacitor 17 Voltage Ec is a constant voltage Ec detected by the level detection circuit.
.

に達する時間Tは長くなる。特にツェナダイオードの場
合はこの傾向がいちぢるしい。したがって電流iと動作
時間Tとの関係は第8図に示すように第6図とは形の異
なる反限時特性曲線を示す。
The time T required to reach this point becomes longer. This tendency is particularly noticeable in the case of Zener diodes. Therefore, the relationship between the current i and the operating time T shows an inverse time characteristic curve, as shown in FIG. 8, which is different in shape from that shown in FIG.

第8図において、従来の回路では8曲線、第7図に示す
回路において非線形特性素子としてノ(リヤダイオード
が用いられると5曲線、ツェナダイオードが用いられる
とC曲線が得られる。勿論従来の曲線と同様に5曲線も
C曲線も可変抵抗16を調節して第1象眼の45度方向
にずらすことは可能である。次に第2の実施例として示
す第9図のようにろ波コンデンサ14と出力抵抗15と
は互と並列に非線形特性素子20が接続され、この両端
の電圧で充電抵抗16を介してコンデンサ17が充電さ
れてもほぼ第8図に示すような非線形特性素子20にバ
リスタダイオードを用いるとb曲線、ツェナダイオード
を用いるとC曲線が得られる。さらに第3の実施例を述
べると、第10図に示すようにそのほかの回路は第9図
と全く同じとされ、非線形特性素子20だけが第1の抵
抗15aと並列に接続されるとこの場合は電流iが増加
するとコンデンサ17を充電する電圧Eはある値以上か
ら急速に増加するからコンデンサ17の端子電圧Ec、
に達する時間TVi短くなる。したがって電流iと動作
時間Tとの関係は、第11図に示すように従来の3曲線
に対し、非線形特性素子20にバリスタダイオードを用
いると6曲線、ツェナダイオードを用いると6曲線に示
すようになり。
In FIG. 8, 8 curves are obtained in the conventional circuit, 5 curves are obtained when a rear diode is used as a nonlinear characteristic element in the circuit shown in FIG. 7, and a C curve is obtained when a Zener diode is used. Similarly, it is possible to shift the 5th curve and the C curve in the 45 degree direction of the first quadrant by adjusting the variable resistor 16. Next, as shown in FIG. 9 as a second embodiment, the filtering capacitor 14 A non-linear characteristic element 20 is connected in parallel with the output resistor 15 and the non-linear characteristic element 20, and even if the capacitor 17 is charged with the voltage across these ends through the charging resistor 16, the non-linear characteristic element 20 as shown in FIG. If a diode is used, a curve B will be obtained, and if a Zener diode is used, a curve C will be obtained.Furthermore, in the third embodiment, as shown in FIG. 10, the other circuits are exactly the same as those in FIG. If only the element 20 is connected in parallel with the first resistor 15a, in this case, as the current i increases, the voltage E charging the capacitor 17 will rapidly increase from a certain value or above, so the terminal voltage Ec of the capacitor 17,
The time to reach TVi becomes shorter. Therefore, the relationship between current i and operating time T is as follows: 6 curves when a varistor diode is used as the nonlinear characteristic element 20, and 6 curves when a Zener diode is used, compared to the conventional 3 curves shown in FIG. Become.

大きい過電流に対して動作時間Tは短くなる。The operating time T becomes shorter for large overcurrents.

以上述べたように本発明は、静止形反限時特性継電器の
反限時特性回路の出力抵抗の両端またはその一部に並列
に非線形特性素子を接続したもので、この素子の接続箇
所、または素子の特性によって種々の反限時特性曲線が
得られ、従来の電流検出回路とともに接続して補助リレ
ーを動作させ種々の特性の反限時特性過電流継電器が提
供でき
As described above, the present invention connects a nonlinear characteristic element in parallel to both ends or a part of the output resistance of the inverse time characteristic circuit of a static inverse time characteristic relay. Various inverse time characteristic curves can be obtained depending on the characteristics, and by connecting with a conventional current detection circuit to operate an auxiliary relay, it is possible to provide inverse time characteristic overcurrent relays with various characteristics.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の反限時特性過電流継電器のブロック図、
第2図は第1図の反限時特性回路の結線図、第3(9)
は第2図に示す回路の変流器各二次電流に対する時間−
充電電圧曲線、第4図は第2図に示す回路の反限時特性
曲線、第5図は第2図に示す回路の各充電抵抗に対する
時間−充電電圧曲線、第6図は第2図に示す回路の各充
電抵抗に対する反限時特性曲線、第7図以下は本発明に
よる継電器に用いる反限時特性回路の結線図と反限時特
性曲線を示し、第7図は第1の実施例を示す結線図、第
8図は第7図に示す回路の特性曲線、第9図は第2の実
施例を示す結線図、第10図は第3の実施例を示す結線
図、第11図は第10図に示す回路の特性曲線である。 電抵抗、17・・・時限コンデンサ、20・・・非線形
特性素子。 代理人弁理十山 口  顎 才 1 u P2関 □T 才4図 □i □T □i オフ (2) オb(9) □ ノ 才q閃 才10図 一一一 え
Figure 1 is a block diagram of a conventional overcurrent relay with inverse time-limiting characteristics.
Figure 2 is a wiring diagram of the inverse time characteristic circuit in Figure 1, and Figure 3 (9).
is the time for each secondary current of the current transformer in the circuit shown in Figure 2.
Charging voltage curve, Figure 4 is the inverse time characteristic curve of the circuit shown in Figure 2, Figure 5 is the time-charging voltage curve for each charging resistance of the circuit shown in Figure 2, and Figure 6 is shown in Figure 2. Inverse time characteristic curves for each charging resistance of the circuit, Figure 7 and the following show a wiring diagram and inverse time characteristic curve of the inverse time characteristic circuit used in the relay according to the present invention, and Figure 7 is a connection diagram showing the first embodiment. , FIG. 8 is a characteristic curve of the circuit shown in FIG. 7, FIG. 9 is a wiring diagram showing the second embodiment, FIG. 10 is a wiring diagram showing the third embodiment, and FIG. 11 is a wiring diagram showing the third embodiment. This is the characteristic curve of the circuit shown in . Electrical resistance, 17... Time capacitor, 20... Nonlinear characteristic element. Attorney Toyama Mouth Jaw Sai 1 u P2 Seki □T Sai 4 Figure □i □T □i Off (2) Ob (9) □ No Talent q Genius 10 Figure 111 E

Claims (1)

【特許請求の範囲】 1)系統線路に挿入された変流器の二次電流を整流した
のち平滑用コンデンサおよび抵抗回路網からなる電流−
電圧変換回路に供給し、該変換回路の電圧出力を可変抵
抗器と積分用コンデンサからなる積分回路に加え、前記
積分用コンデンサの充電電圧をレベル検出回路に加えて
動作出力を得ることにより反限時特性を得るようにした
過電流継電器において、前記抵抗回路網の所定の抵抗に
非線形特性素子が並列接続さnたどとを特徴とする反限
時特性過電流継電器。 2、特許請求の範囲第1項記載の過電流継電器において
、前記抵抗回路網は、前記平滑用コンデンサに並列接続
され分圧点より前記レベル検出回路への電圧出力を得る
分圧抵抗器からなり前記非線形特性素子は前記分圧抵抗
器に対して並列接続されたことを特徴とする反限時特性
過電流継電器。 3)特許請求の範囲第1項記載の過電流継電器において
、前記抵抗回路網は、前記平滑用コンデンサにそnぞれ
並列接続さnる抵抗器と分圧抵抗器とからなり、前記非
線形特性素子は前記分圧抵抗器のいずれか一方の抵抗に
並列接続され、前記分圧抵抗器の分圧点よりレベル検出
回路への電圧出力を得ることを特徴とする反限時特性過
電流継電器。 4)特許請求の範囲第1項ないし第3項のいずれ過電流
継電器。 5)%許請求の範囲第1項ないし第3項のいずnかに記
載のものにおいて非線形特性素子がツェナダイオードで
あることを特徴とする反限時特性過電流継電器。
[Claims] 1) After rectifying the secondary current of a current transformer inserted into the system line, the current is generated by a smoothing capacitor and a resistor network.
A voltage conversion circuit is supplied, the voltage output of the conversion circuit is added to an integration circuit consisting of a variable resistor and an integration capacitor, and the charged voltage of the integration capacitor is added to a level detection circuit to obtain an operating output, thereby inverting the time limit. An overcurrent relay with inverse time-limiting characteristics, characterized in that a nonlinear characteristic element is connected in parallel to a predetermined resistance of the resistor network. 2. In the overcurrent relay according to claim 1, the resistor network includes a voltage dividing resistor that is connected in parallel to the smoothing capacitor and obtains a voltage output from a voltage dividing point to the level detection circuit. An inverse time characteristic overcurrent relay, characterized in that the nonlinear characteristic element is connected in parallel to the voltage dividing resistor. 3) In the overcurrent relay according to claim 1, the resistor network includes a resistor and a voltage dividing resistor connected in parallel with the smoothing capacitor, and the nonlinear characteristic An overcurrent relay with inverse time-limiting characteristics, characterized in that an element is connected in parallel to one of the resistors of the voltage dividing resistor, and a voltage output to a level detection circuit is obtained from a voltage dividing point of the voltage dividing resistor. 4) An overcurrent relay according to any one of claims 1 to 3. 5) % Permissible An inverse time-limiting characteristic overcurrent relay according to any one of claims 1 to 3, characterized in that the nonlinear characteristic element is a Zener diode.
JP12275582A 1982-07-14 1982-07-14 Counter time limiting characteristic overcurrent relay Pending JPS5914317A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12275582A JPS5914317A (en) 1982-07-14 1982-07-14 Counter time limiting characteristic overcurrent relay

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12275582A JPS5914317A (en) 1982-07-14 1982-07-14 Counter time limiting characteristic overcurrent relay

Publications (1)

Publication Number Publication Date
JPS5914317A true JPS5914317A (en) 1984-01-25

Family

ID=14843803

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12275582A Pending JPS5914317A (en) 1982-07-14 1982-07-14 Counter time limiting characteristic overcurrent relay

Country Status (1)

Country Link
JP (1) JPS5914317A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5298953A (en) * 1976-02-16 1977-08-19 Hitachi Ltd Interrupter for wiring
JPS5425450A (en) * 1977-07-29 1979-02-26 Hitachi Ltd Protective relay
JPS5525696A (en) * 1978-08-10 1980-02-23 Krupp Ag Huettenwerke Acoustic absorber

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5298953A (en) * 1976-02-16 1977-08-19 Hitachi Ltd Interrupter for wiring
JPS5425450A (en) * 1977-07-29 1979-02-26 Hitachi Ltd Protective relay
JPS5525696A (en) * 1978-08-10 1980-02-23 Krupp Ag Huettenwerke Acoustic absorber

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