JPS59138388A - Manufacture of semiconductor light emitting element - Google Patents
Manufacture of semiconductor light emitting elementInfo
- Publication number
- JPS59138388A JPS59138388A JP58012240A JP1224083A JPS59138388A JP S59138388 A JPS59138388 A JP S59138388A JP 58012240 A JP58012240 A JP 58012240A JP 1224083 A JP1224083 A JP 1224083A JP S59138388 A JPS59138388 A JP S59138388A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- resist
- junction
- semiconductor light
- light emitting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title abstract description 12
- 239000004065 semiconductor Substances 0.000 title description 11
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 14
- 239000011347 resin Substances 0.000 claims abstract description 11
- 229920005989 resin Polymers 0.000 claims abstract description 11
- 230000003287 optical effect Effects 0.000 claims abstract description 9
- 238000005530 etching Methods 0.000 claims abstract description 8
- 238000000206 photolithography Methods 0.000 abstract description 6
- 230000015572 biosynthetic process Effects 0.000 abstract description 3
- 238000009413 insulation Methods 0.000 abstract 2
- 238000000034 method Methods 0.000 description 17
- 238000009792 diffusion process Methods 0.000 description 7
- 238000007796 conventional method Methods 0.000 description 5
- 239000002184 metal Substances 0.000 description 4
- 239000004593 Epoxy Substances 0.000 description 1
- 244000017020 Ipomoea batatas Species 0.000 description 1
- 235000002678 Ipomoea batatas Nutrition 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000008014 freezing Effects 0.000 description 1
- 238000007710 freezing Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000012538 light obscuration Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Led Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔技術分野〕
本発明は、半導体発光素子に関し、より詳細には、簡略
化された合理的な方法による性能の向上が図られた半導
体発光素子の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a semiconductor light emitting device, and more particularly to a method for manufacturing a semiconductor light emitting device in which performance is improved by a simplified and rational method.
従来、半導体発光素子の製造工程において、ＰＮ接合お
よび電極が形成されたウエノ・上に電気的絶縁部および
光学的遮へい部を設ける方法として、第１図または第２
図に示すような方法がとられていた。Conventionally, in the manufacturing process of semiconductor light emitting devices, as a method of providing an electrically insulating part and an optical shielding part on a wafer on which a PN junction and an electrode are formed, the method shown in FIG. 1 or 2 is used.
The method shown in the figure was used.
第１図に示す方法は、Ｐ層／とＮ層コによるＰＮ接合お
よび電極３か形成されたウェー・の所望部分にエンチン
グによりＰ層／に達する溝を設け、さらにこの溝に絶縁
膜≠および退光用金属層ｊを設けることにより、電気的
絶縁部および光学的遮へい部を形成するものである。In the method shown in FIG. 1, a groove reaching the P layer/ is formed by etching in a desired part of the wafer in which the PN junction and electrode 3 are formed by the P layer/ and the N layer. By providing the light extinction metal layer j, an electrically insulating part and an optical shielding part are formed.
一方、第２図に示す方法は、甘ずウエノ・の所望部分に
選択拡散によってＰ層ｔを形成し、これを光学的遮へい
部とし、さらにこの上に絶縁膜ｊを設けて電気的絶縁部
とするものである。On the other hand, in the method shown in FIG. 2, a P layer t is formed by selective diffusion in a desired part of sweet potato, this is used as an optical shielding part, and an insulating film j is further provided on this to create an electrically insulating part. That is.
しかしながら、上記の従来法には、次のような問題があ
る。However, the above conventional method has the following problems.
たとえば、第１図の方法においては、絶縁膜および遮光
用金属のホ） ＩＪソグラフィや蒸着工程などの多数の
工程が必要であり、また、絶縁膜や金属膜のマスク合せ
などの条件が厳しく、これが充分精度よく行われないと
、光のリークやクロストークあるいは電気的なりロスト
ークが生じてし凍り・
また、第１図に示す方法においては、選択拡散を行うた
めのマスク形成、絶縁膜や電極形成のためのホトリソグ
ラフィ、エツチングなどの多藪の工程が必要となる。さ
らに、選択拡散を行う場合、拡散は横方向にも広がり、
拡散の停止を制御することも困難なため、素子密度（単
位面積当たりのビット数）を小さくするのが極めて雛し
い。For example, the method shown in Figure 1 requires many steps such as IJ lithography and vapor deposition for the insulating film and light-shielding metal, and also has strict conditions such as mask alignment for the insulating film and metal film. If this is not done with sufficient precision, optical leakage, crosstalk, or electrical losstalk may occur, resulting in freezing.In addition, in the method shown in Figure 1, mask formation for selective diffusion, insulating films, electrodes, etc. Many processes such as photolithography and etching are required for formation. Furthermore, when performing selective diffusion, the diffusion also spreads horizontally,
Since it is difficult to control the stoppage of diffusion, it is extremely difficult to reduce the element density (number of bits per unit area).
本発明は、１上述の問題点に鉤みてなされたものであり
、簡略化された工程で、しかも素子性能の向上が図られ
た半導体発光素子の製造方法を提供することを目的とす
る。The present invention has been made in view of the above-mentioned problems, and it is an object of the present invention to provide a method for manufacturing a semiconductor light emitting device using a simplified process and improving device performance.
本発明の半導体発光素子の製造法は、ＰＭ接合および電
極が形成されたウェー・に′電気的絶縁部と光学的遮へ
い部を設けるに際し、下記の工程（イ）、（ロ）、（）
→およびに）を含むことを％徴とするものであるＯ
（イ） ＰＮ接合および電極が形成されたウエノ・上
に、所望パターンのホトレジストを設ける工程。The method for manufacturing a semiconductor light emitting device of the present invention includes the following steps (a), (b), and () when providing an electrically insulating part and an optical shielding part on a wafer on which a PM junction and an electrode are formed.
(a) A step of providing a photoresist in a desired pattern on the wafer on which the PN junction and electrodes have been formed.
（ロ） エツチングにより、上記ホトレジストが形成さ
れていない部分に、ＰＮ接合部に達する凹部を形成する
工程。(b) A step of forming, by etching, a recessed portion reaching the PN junction in the portion where the photoresist is not formed.
（・ウ 前記凸部の表面に遮光性樹脂層を形成する工
程。(C) A step of forming a light-shielding resin layer on the surface of the convex portion.
に）前記ホトレジストを除去する工程。B) removing the photoresist.
以下、本発明を、／実施例に基づいて具体的に説明する
。Hereinafter, the present invention will be specifically explained based on examples.
第３図は、本発明の実施例に係る半導体発光素子の製造
工程を示す断面図である。本図に示すように、まずＰ層
／、ＮＮｔ２によるＰＮ接合および電極３の形成された
ウエノ・上に、常法に従い、ホトリソグラフィによって
所望形状のホトレジスト７を設ける（第３図（ａ））。FIG. 3 is a cross-sectional view showing the manufacturing process of a semiconductor light emitting device according to an embodiment of the present invention. As shown in this figure, first, a photoresist 7 having a desired shape is provided by photolithography in accordance with a conventional method on the wafer on which the P layer/NNt2 PN junction and the electrode 3 are formed (Figure 3 (a)). .
次いで、ホトレジスト７をマスクにして、エツチングを
行い、上記ホトレジストが設けられていない部分に、Ｐ
層／（Ｃ達する凹部を形成する（第３図（ｂ））。この
凹部によって、ＰＮ接合は完全に切られ°電気的絶縁部
が形成されることになる。Next, etching is performed using the photoresist 7 as a mask, and P is applied to the areas where the photoresist is not provided.
A recess is formed reaching the layer C (FIG. 3(b)).The recess completely cuts the PN junction and forms an electrically insulating part.
次いで、上記四部に遮光用樹脂♂をオ布する（第３図（
Ｃ））。遮光用樹脂としては、絶縁性であってしかも半
導体素子が発した光を良く吸収するものが使用される。Next, apply light-shielding resin ♂ to the above four parts (see Fig. 3).
C)). As the light-shielding resin, one that is insulative and also absorbs well the light emitted by the semiconductor element is used.
たとえば、エポキシテクノロジー社（米国）製梢脂扁３
λ０．ＡＨ−＆二などが好ましく用いられる。遮光用樹
脂の鉄血は、たとえばスピンナあるいはローラー等を用
いて均一な膜厚が１１１もれるよう注意することが必要
である。樹脂をぞ２布したのちに、該樹脂の乾燥および
硬化を行う・
次いで、常法に従いホトレジストアの除去を行う（第３
図（ｄ））。このとき、ホトレジストアの上部に付着し
ていた遮光用樹脂も同時に除去される。For example, Epoxy Technology Co., Ltd. (USA)
λ0. AH-&2 etc. are preferably used. It is necessary to use, for example, a spinner or a roller to ensure that the coating of the light-shielding resin has a uniform film thickness. After applying the resin twice, dry and harden the resin. Next, remove the photoresist according to the usual method (third step).
Figure (d)). At this time, the light-shielding resin attached to the top of the photoresist is also removed at the same time.
このようにして本発明の半導体発光素子の製造工程が完
了する。In this way, the manufacturing process of the semiconductor light emitting device of the present invention is completed.
上述したように、本発明の方法は、７回のホトリソグラ
フィおよびエツチングにより電気的絶縁部および光学的
遮へい部を設けるようにしたので、従来法において必要
であった逝択拡散あるいは複雑なホトリソグラフィ工程
は不要となり、製造工程が簡略化され、製造コストも大
巾に低減し得る。As mentioned above, the method of the present invention uses seven photolithography and etching steps to provide the electrically insulating portion and the optical shielding portion, thereby eliminating the need for selective diffusion or complicated photolithography that was required in the conventional method. This eliminates the need for a manufacturing process, simplifies the manufacturing process, and significantly reduces manufacturing costs.
さらに、本発明の方法によλ１は、従来法における初、
雑な工程に伴なう、光学的あるいは電気的クロストーク
の問題が解消され、１だ素子の高照度化が可能となる。Furthermore, by the method of the present invention, λ1 is the first in the conventional method,
The problem of optical or electrical crosstalk associated with complicated processes is eliminated, and it becomes possible to increase the illumination of a single element.
【図面の簡単な説明】
第１図および第２図は従来法で製造される半導体発光素
子の断面図、第３図は本発明の半導体発光素子の製造工
程を示す断面図である。
ｌ・・・Ｐ層、２・・・Ｎ層、３・・・電極、≠・・・
絶縁膜、ｊ・・・遮光用金属膜、６・選択拡散層、７・
・・ホトレシスト、ｇ・遮光用樹脂。
出願人代理人 猪 股 消５１ 図
５３ 図BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1 and 2 are cross-sectional views of a semiconductor light-emitting device manufactured by a conventional method, and FIG. 3 is a cross-sectional view showing the manufacturing process of the semiconductor light-emitting device of the present invention. l...P layer, 2...N layer, 3...electrode, ≠...
Insulating film, j... Light-shielding metal film, 6. Selective diffusion layer, 7.
・・Photoresist, g・Light-shielding resin. Applicant's agent Inomata 51 Figure 53
Claims (1)
部と光学的遮へい部を設けるに際し、下記の工程（イ）
、（ロ）、←→およびに）を含むことを特徴とする、半
導体発光素子の製造法。 （イ） ＰＮ接合および電極が形成されたウエノ・上
に、所望パターンのホトレジストを設ける工程、（ロ）
エツチングにより、上記ホトレジストが形成されていな
い部分に、ＰＮ接合部に達する凹部を形成する工程、 ←→ 前記凹部の表面に遮光性樹脂層を形成する工程、 に）ｍＪ記ホトレジストを除去する工程。[Claims] When providing an electrically insulating part and an optical shielding part to the wafer on which the PN junction and electrodes are formed, the following step (a) is carried out.
, (b), ←→ and ii). (b) Step of providing a photoresist with a desired pattern on the wafer on which the PN junction and electrodes are formed; (b)
a step of forming a recessed portion reaching the PN junction in a portion where the photoresist is not formed by etching; a step of forming a light-shielding resin layer on the surface of the recessed portion; and b) a step of removing the mJ photoresist.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58012240A JPS59138388A (en) | 1983-01-28 | 1983-01-28 | Manufacture of semiconductor light emitting element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58012240A JPS59138388A (en) | 1983-01-28 | 1983-01-28 | Manufacture of semiconductor light emitting element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59138388A true JPS59138388A (en) | 1984-08-08 |
Family
ID=11799840
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58012240A Pending JPS59138388A (en) | 1983-01-28 | 1983-01-28 | Manufacture of semiconductor light emitting element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59138388A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6471187A (en) * | 1987-09-11 | 1989-03-16 | Stanley Electric Co Ltd | Light emitting diode array |
| JP2005277152A (en) * | 2004-03-25 | 2005-10-06 | Daido Steel Co Ltd | Point light source light emitting diode and its manufacturing method |
-
1983
- 1983-01-28 JP JP58012240A patent/JPS59138388A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6471187A (en) * | 1987-09-11 | 1989-03-16 | Stanley Electric Co Ltd | Light emitting diode array |
| JP2005277152A (en) * | 2004-03-25 | 2005-10-06 | Daido Steel Co Ltd | Point light source light emitting diode and its manufacturing method |
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