JPS59138117A - Analog-digital converting method - Google Patents

Analog-digital converting method

Info

Publication number
JPS59138117A
JPS59138117A JP1232183A JP1232183A JPS59138117A JP S59138117 A JPS59138117 A JP S59138117A JP 1232183 A JP1232183 A JP 1232183A JP 1232183 A JP1232183 A JP 1232183A JP S59138117 A JPS59138117 A JP S59138117A
Authority
JP
Japan
Prior art keywords
signal
noise
digital
analog
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1232183A
Other languages
Japanese (ja)
Inventor
Masahiro Watanabe
雅弘 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1232183A priority Critical patent/JPS59138117A/en
Publication of JPS59138117A publication Critical patent/JPS59138117A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0626Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by filtering
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/08Continuously compensating for, or preventing, undesired influence of physical parameters of noise
    • H03M1/0863Continuously compensating for, or preventing, undesired influence of physical parameters of noise of switching transients, e.g. glitches

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To eliminate noise without deteriorating quality of signal by A/D- converting an analog signal including noise so as to apply digital filtering. CONSTITUTION:After a demodulated analog signal from an FM detecting circuit is converted into a digital signal by an ADC1, noise is eliminated by a digital low pass filter 2 passing through only a component in 0-53kHz. On the other hand, if a pulsive noise hardly eliminated by the low pass filter 2 is included in the said demodulated analog signal, a pulsive noise detector 3 detects it, its output is applied to a pulsive noise eliminating circuit 5, where the noise is eliminated by interpolation.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、アナログ−ディジタル変換方法に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an analog-to-digital conversion method.

従来例の構成とその問題点 従来1例えばF’Mステレオ受信機において、PM検波
回路出力信号であるステレオコンポジット信号からのス
テレオ復調、パルス性雑音の除去は。
Configuration of Conventional Example and Its Problems Conventional Example 1 For example, in an F'M stereo receiver, stereo demodulation and removal of pulse noise from a stereo composite signal which is an output signal of a PM detection circuit are required.

アナログ回路で行なわれている。This is done using analog circuits.

しかし、ディジタル信号処理技術の進歩、及°びディジ
タμ信号也埋用の各種半導体製造技術の進歩等によって
、上記信号処理をディジタル的に行うことのできるLS
Iの実用化も夢ではなくなってきた。これが実現すると
、受信様の実装密度の向上による小型化、無調整化、性
能向上が可能となる。
However, with advances in digital signal processing technology and various semiconductor manufacturing technologies for digital μ signals and embedded devices, LS that can perform the above signal processing digitally has become available.
The practical application of I is no longer a dream. If this is achieved, it will be possible to reduce the size, eliminate adjustment, and improve performance by increasing the packaging density of the receiver.

ところで、ステレオコンポジット信号の周波数スベクト
ワムは、第1図に示す如くである(但しSCA信号は除
く)。従って、この信号ftA−D変換するためのサン
プリング周波数は最低IQ(5KHz(==53KHz
 X2 )であればよい。しかしこの場合、ステレオコ
ンポジット信号に重畳して53KHz f:mえる周波
数成分をもつ雑音があると、この雑音成分力エリアシン
グによってステレゝオコンボジット信号周波数帯域0〜
53KHz内に落ち込み、ステレオコンポジット信号の
S/N f:劣化させてしまう。
Incidentally, the frequency spectrum of the stereo composite signal is as shown in FIG. 1 (excluding the SCA signal). Therefore, the sampling frequency for converting this signal ftA-D is the lowest IQ (5KHz (==53KHz
X2) is sufficient. However, in this case, if there is noise with a frequency component of 53kHz f:m superimposed on the stereo composite signal, this noise component power aliasing will cause the stereo composite signal frequency band 0 to
The frequency drops to within 53KHz, degrading the S/N f of the stereo composite signal.

これを防止するためには、第2図に示す如(、F’M検
波回路とA−D変換回路との間に、 53KHz以下の
帯域は通過させ、これ以外の周波数成分を4つ信号(雑
音)は除去するアナログ式LPF t−設けることが一
般的に要求される。
In order to prevent this, as shown in Figure 2, the band below 53KHz is passed between the F'M detection circuit and the A-D conversion circuit, and the other frequency components are passed through four signals ( It is generally required to provide an analog LPF to remove noise (noise).

発明の目的 本発明は上記従来の欠点を解消するもので、LPF’を
設けず、かつ信号のS/N比を劣化させないで、A−D
変換する方法を提供することを目的とする。
Purpose of the Invention The present invention solves the above-mentioned drawbacks of the conventional technology.
The purpose is to provide a method to convert.

発明の構成 上記目的を達するため1本発明のアナログ−ディジタル
変換方法は、アナログ信号をディジタル変換するに際し
、前記アナログ信号中の雑音成分を含む周波数帯域幅の
2倍以上のサンプリング周波数をもって前記アナログ信
号をサンプリングして、A−D変換し、この後前記信号
中の不要周波数成分をディジタルフィルタで除去する構
成とした本のである。
Structure of the Invention In order to achieve the above object, the analog-to-digital conversion method of the present invention provides, when converting an analog signal into a digital signal, converting the analog signal into a digital signal at a sampling frequency that is twice or more of a frequency bandwidth including noise components in the analog signal. This book has a structure in which the signal is sampled, A-D converted, and then unnecessary frequency components in the signal are removed by a digital filter.

例えば1通常のFMステレオ受信優においては。For example, in a normal FM stereo receiver.

IP部及びF’M検波部の周波数帯域幅Bは200〜3
QQ KHz程度であることから、 F’M @波回路
品力中の最扁周波数f、、=−z= 100〜15QK
Hz s 度トナル。
The frequency bandwidth B of the IP section and F'M detection section is 200 to 3
Since QQ is about KHz, the lowest frequency f in the F'M @ wave circuit quality, = -z = 100 ~ 15QK
Hz s degree tonal.

従ってPM検波回路出力であるステレオコンポジット信
号を前記最高周波#L成分の2倍以上の周波数であるZ
fMAX= 200〜300 KHz以上(1’) t
 ン7’ !J >グ周波数でサンプリングしA−D変
換すれば。
Therefore, the stereo composite signal that is the output of the PM detection circuit is
fMAX = 200-300 KHz or more (1') t
N7'! If you sample at J>g frequency and perform A-D conversion.

fMAI! /2以上の周波数成分をもつ雑音のエリア
シングによる0〜53KHz帯域への落ち込みによるコ
ンポジット信号のS/N低下はない。又56一〜fMA
x/2帯域の雑音成分の除去は、 A−D変換後、コン
ポジット信号周波数帯域以外の周波数成分を除去するデ
ィジタ/L/LPFを設けることにより可能である。こ
のディジタ1vLPF (以下DLPF ト称す)は、
ディジタル回路で構成されることから。
fMAI! There is no S/N reduction of the composite signal due to a drop in the 0 to 53 KHz band due to aliasing of noise having frequency components of /2 or more. Also 561~fMA
Removal of noise components in the x/2 band is possible by providing a digital/L/LPF that removes frequency components other than the composite signal frequency band after A/D conversion. This digital 1vLPF (hereinafter referred to as DLPF) is
Because it is composed of digital circuits.

この後段に設けるステレオ復調回路等と共にLSI化が
可能である。又カーラジオの如く、ステレオコンポジッ
ト信号に重畳した自動車のイグニッションノイズ等に起
因するパルス性雑音を除去する必要がある場合、上記パ
ルス性雑音の検出は一般的にステレオコンポジット信号
中からコ′ンボジット信号周波数帯域(0〜53KHz
)より高い周波数成分の信号のみを通過させるHPFを
用いる。ところで、第2図に示した如(、F’M検波出
力信号を0〜53KH2(7) ステレオコンポジット
信号成分ノミを通過させるLPF’を通した後、A−D
変換した場合は、A−D変換後の信号からノ<ルス性雑
音の有無の検出は難みくなる。一方、ステレオコンポジ
ット信号へのパルス性雑音の悪影響はあまり減少しない
で残る。この場合、パルス性雑音の検出は。
It is possible to implement it into an LSI together with a stereo demodulation circuit and the like provided at the subsequent stage. In addition, when it is necessary to remove pulsed noise caused by car ignition noise superimposed on the stereo composite signal, such as in a car radio, the detection of the pulsed noise is generally carried out by removing the composite signal from the stereo composite signal. Frequency band (0~53KHz
) Uses an HPF that passes only signals with higher frequency components. By the way, as shown in FIG.
In the case of conversion, it becomes difficult to detect the presence or absence of noise noise from the signal after A/D conversion. On the other hand, the negative influence of pulse noise on the stereo composite signal remains without being significantly reduced. In this case, the detection of pulsed noise is.

前記LPFを通過させる前のF’M検波回路出力から前
記A−D変換後の信号処理系列とは別の何らかの方法で
行うことが必要となり、回路構成の複雑化をまねく。し
かし、前述の如(、FM検波回路出力cFMステレオコ
ンポジット信号t” 2 fhihx以上のサンプリン
グ周波数でサンプリングし、A−D変換を行う場合は、
A、−D変換後のディジタルHPF (以下DHPF’
と称す)出力からパルス性雑音の検出ができる。
It is necessary to process the output of the F'M detection circuit before passing through the LPF using some method other than the signal processing sequence after the A/D conversion, which leads to a complicated circuit configuration. However, as mentioned above (if the FM detection circuit output cFM stereo composite signal t"2fhihx or higher sampling frequency is sampled and A-D conversion is performed,
Digital HPF after A, -D conversion (hereinafter DHPF'
Pulse noise can be detected from the output.

次にサンプリング周波数について述べる。前記サンプリ
ング周波数は、ステレオコンポジット信号をA−D変換
後、ディジタル的にステレオ複画するためには、ステレ
オコンポジット信号中の19KHzパイロット信号に同
期し、かつ19KHzの偶数倍(従ってステジオコンポ
ジット信号のサブキャリア周波数である38KHzの整
数倍)であることも必要である。これはFMステレオ復
調が、ステレオコンポジット信号(但し19KHzパイ
ロット信号は除<)S(t) S(tl=(L+R)+(L−R)sin wctL:
右チヤンネル音声信号 R;右チヤンネル音声信号 WC:サブキャリア角周波数 をsin wct = 1なるタイミングでサンプリン
グした信号が左チヤンネル音声信号となり、sin w
ct =1なるタイミングでサンプリングした信号が右
チヤンネル音声信号となることから明らかである。
Next, we will discuss the sampling frequency. In order to digitally perform stereo duplication after A-D conversion of the stereo composite signal, the sampling frequency must be synchronized with the 19 KHz pilot signal in the stereo composite signal and an even multiple of 19 KHz (therefore, the sampling frequency must be an even multiple of 19 KHz (therefore It also needs to be an integral multiple of the subcarrier frequency of 38 KHz). This means that FM stereo demodulation produces a stereo composite signal (excluding the 19KHz pilot signal) S(t) S(tl=(L+R)+(L-R) sin wctL:
Right channel audio signal R; Right channel audio signal WC: The signal obtained by sampling the subcarrier angular frequency at a timing where sin wct = 1 becomes the left channel audio signal, and sin wct = 1.
This is clear from the fact that the signal sampled at the timing of ct = 1 becomes the right channel audio signal.

実施例の説明 以下1本発明の一実施例について1図面に基づいて説明
する。
DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to one drawing.

第6図において、11)はAD変換回路、(2)はDL
PF 、f+lはパルス性雑音検品回路、(4)はディ
ジタルPLL (以下DPLLと称す) 、+5)はス
テレオ復調回路である。A−D変換回路(1)は、サン
プリングs波数ノ条件を満たすf8= 304KHz 
(= 19KHzx+ 6)でF’M検波回路出力でお
るステレオコンポジ・ソト信号をサンプリングしディジ
タμ変換する。DLPF’(2)は、前記A−D変換回
路fi+の出力中のQ 〜53KHz帯域の信号成分の
みを通過させる。パルス性雑音検品回路(3)は、前記
A−D変換回路fi+の出力中からパルス性雑音の存在
を検品するため、概略76KHz以上の周波数帯域の信
号のみを通過させるDHPFと。
In Fig. 6, 11) is an AD conversion circuit, (2) is a DL
PF and f+l are pulse noise inspection circuits, (4) is a digital PLL (hereinafter referred to as DPLL), and +5) is a stereo demodulation circuit. The A-D conversion circuit (1) satisfies the sampling s wave number condition f8 = 304KHz
(=19KHzx+6) The stereo composite/soto signal output from the F'M detection circuit is sampled and subjected to digital μ conversion. DLPF'(2) passes only the signal component in the Q to 53 KHz band output from the A/D conversion circuit fi+. The pulse noise inspection circuit (3) is a DHPF that passes only signals in a frequency band of approximately 76 kHz or higher in order to inspect the presence of pulse noise in the output of the A-D conversion circuit fi+.

このDf(PF出力が一定しベ1vt−越えたときパル
ス性雑音が混入したとして雑音検出信号を出す雑音検出
回路とから構成されている。DPLL +4)は、前記
DLPF +2)の出力中の19KHzパイロット信号
に同J91t、た3Q4KHzサンプリングパルス及び
位相の180″ずれた2種類の76KHzステレオ復調
用タイミングパルスを出力する。ステレオ復調回路(5
)は、IttI記DLPF’(2)の出力中のコンポジ
ット信号から左チヤンネル音声信号(L信号)、右チヤ
ンネル音声信号(R信号)を分離し、かつ前記パルス性
雑音検品回路から雑音検出信号が出力された場合は、こ
の出力に対応したL(i号、R信号成分を各々その前後
のL信号、R信号を用いて補完を行うことによって音声
信号中からパルス性雑音の悪影響を除去し、又これら出
力をアナログ変換する。
This Df (DPLL +4) is composed of a noise detection circuit that outputs a noise detection signal as if pulse noise has been mixed in when the PF output is constant and exceeds 1vt. Outputs the same J91t, 3Q4KHz sampling pulse and two types of 76KHz stereo demodulation timing pulses with a phase difference of 180'' as the pilot signal.Stereo demodulation circuit (5
) separates the left channel audio signal (L signal) and right channel audio signal (R signal) from the composite signal being output from the IttI DLPF' (2), and also detects the noise detection signal from the pulse noise inspection circuit. If the signal is output, the L(i) signal component and the R signal component corresponding to this output are complemented using the L signal and R signal before and after it, respectively, thereby removing the adverse effects of pulse noise from the audio signal, These outputs are also converted into analog.

このように、 F’M検波回路出力信号を工F’回路及
びFM検波回路の周波数帯域幅Bより大きくかつコンポ
ジット信号中の19KHzパイロット信号に同期り、 
L 19KHz )偶数倍の周波数(228KHz 、
 266Kl(Z。
In this way, the F'M detection circuit output signal is larger than the frequency bandwidth B of the F' circuit and the FM detection circuit and is synchronized with the 19KHz pilot signal in the composite signal.
L 19KHz) Even multiple frequency (228KHz,
266Kl (Z.

3Q4KH2等)でA−D変換した後、必要な信号(ス
テレオコンポジット信号)帯域以外の帯域成分はディジ
タルLPF’で除去し、その後ステレオ復v14′f:
行うので1例えばアナログ方式のLPFでステレオコン
ポジット信号周波数成分のみを抽出した後。
3Q4KH2 etc.), band components other than the required signal (stereo composite signal) band are removed by digital LPF', and then stereo reconstruction v14'f:
1. For example, after extracting only the stereo composite signal frequency components using an analog LPF.

A−D変換してステレオ復調する場合に比べて。Compared to A-D conversion and stereo demodulation.

アナログ回路部が不要となり、 LSI化が容易になる
。又本実施例のようにパルス性雑音除去機能を付加すれ
ば、効果はより大きくなる。
No analog circuit is required, making it easier to integrate into LSI. Furthermore, if a pulse noise removal function is added as in this embodiment, the effect will be even greater.

なお上記実施例においては、FMステレオ受信層におけ
るステレオコンポジット信!IA−Df換する場合につ
いて説明したが、同様な特性をもつアナログ信号の場合
、即ちA−D変換すべきアナログ信号の周波数帯域が、
その中の必要とする成分の周波数帯域に比べて比較的広
い場合、そのアナログ信号の帯域中の2倍以上の周波数
でサンプリングして、A−D変換した後、必要とする信
号成分のみをディジタルフィルタを用いて抽出スること
により、一般的にも応用できる。
In the above embodiment, the stereo composite signal in the FM stereo reception layer! We have explained the case of IA-Df conversion, but in the case of analog signals with similar characteristics, that is, the frequency band of the analog signal to be A-D converted is
If the frequency band is relatively wide compared to the frequency band of the necessary components, sample at a frequency that is more than twice the frequency of the analog signal, perform A-D conversion, and then digitalize only the necessary signal components. It can also be applied generally by extracting it using a filter.

発明の詳細 な説明したように本発明によれば、アナログLPFを用
論ることなく、かつ信号のS/N比を劣化させないでA
−D変換を行い得る。
DETAILED DESCRIPTION OF THE INVENTION According to the present invention, as described in detail, A
-D conversion can be performed.

【図面の簡単な説明】[Brief explanation of the drawing]

一第1図dステレオコンポジット信号の周波数スベクト
ヲム(SCA信号は除く)の説明図、第2図はステレオ
コンポジット信号をA−D変換する一般的な回路のブロ
ック図、第5図は本発明の一実施例におけるステレオコ
ンポジット信号のA−D変換方法を用いてステレオコン
ポジツ)信ft−ディジタμ処理する回路のブロック図
である。 +11・・・A−D変換回路、(2)・・・ディジタ/
L’ LPF 、131・・・パルス性雑音検品回路、
(4)・・・ディジタyv PLL 。 (5)・・・ステレオ復調回路 代理人   森  本  義  弘
Figure 1 is an explanatory diagram of the frequency spectrum of a stereo composite signal (excluding SCA signals), Figure 2 is a block diagram of a general circuit that converts a stereo composite signal from AD to FIG. 2 is a block diagram of a circuit that performs stereo composite signal ft-digital μ processing using a stereo composite signal A-D conversion method in an embodiment. +11...A-D conversion circuit, (2)...digital/
L' LPF, 131...Pulse noise inspection circuit,
(4)...Digital yv PLL. (5)... Stereo demodulation circuit agent Yoshihiro Morimoto

Claims (1)

【特許請求の範囲】 1、 アナログ信号をディジタμ変換するに際し。 前記アナログ信号中の雑音成分を含む周波数帯域幅の2
倍以上のサンプリング周波数をもって前記アナログ信号
をサンプリングして AD変換し、この後前記信号中の
不要周波数成分をディジタル的イ/I//で除去するア
ナログ−ディジタ)V変換方法。 2、アナログ信号は、PMステレオ受信磯の1’M検波
回路品力信号であるところのステレオコンポジット信号
である特許請求の範囲第1項記載のアナログ−ディジタ
ル変換方法。 3、 サンプリング周波数は、ステレオコンポジット信
号中のパイロット信号に同期してお蛙、かつパイロット
信号周波数の偶数倍の周波数である特許請求の範囲第2
項記載のアナログ−ディジタル変換方法。
[Claims] 1. When converting an analog signal into digital μ conversion. 2 of the frequency bandwidth including the noise component in the analog signal.
An analog-to-digital (V) conversion method in which the analog signal is sampled at a sampling frequency that is twice or more, A/D conversion is performed, and unnecessary frequency components in the signal are then removed by digital I/I//. 2. The analog-to-digital conversion method as claimed in claim 1, wherein the analog signal is a stereo composite signal which is a 1'M detection circuit quality signal of a PM stereo receiver. 3. The sampling frequency is synchronized with the pilot signal in the stereo composite signal and is an even multiple of the pilot signal frequency.
Analog-to-digital conversion method described in Section.
JP1232183A 1983-01-27 1983-01-27 Analog-digital converting method Pending JPS59138117A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1232183A JPS59138117A (en) 1983-01-27 1983-01-27 Analog-digital converting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1232183A JPS59138117A (en) 1983-01-27 1983-01-27 Analog-digital converting method

Publications (1)

Publication Number Publication Date
JPS59138117A true JPS59138117A (en) 1984-08-08

Family

ID=11802047

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1232183A Pending JPS59138117A (en) 1983-01-27 1983-01-27 Analog-digital converting method

Country Status (1)

Country Link
JP (1) JPS59138117A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5428520A (en) * 1977-08-08 1979-03-03 Hitachi Ltd Method and apparatus for sampling frequency conversion

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5428520A (en) * 1977-08-08 1979-03-03 Hitachi Ltd Method and apparatus for sampling frequency conversion

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