JPS59116055A - Voltage-frequency conversion circuit - Google Patents

Abstract

PURPOSE:To obtain a voltage-frequency conversion circuit which is simple in circuit constitution by connecting in cascade (n) stages of active type integration circuits to each other, comparing the outputs thereof with a reference voltage and discharging capacitors through a one-shot circuit. CONSTITUTION:A titled circuit is constituted of two stages of active type integration circuits 1, 2 which are connected in cascade to each other, a voltage comparator 3 which compares the output voltage of the circuit 2 in the final stage thereof with a prescribed reference voltage VS, a one-shot circuit 4 which is driven by the comparing output of the circuit 3, and switches 7, 8 which discharge quickly the capacitors 5, 6 of the circuits 1, 2 in response with the output of the circuit 4. When the value of the output V02 of the circuit 2 exceeds the voltage VS, the output of the circuit 3 goes to an H, and the circuit 4 is driven, from which an H pulse of a very small width is outputted. A voltage- frequency conversion circuit which is simpler in circuit constitution than a circuit utilizing a logarithmic amplifier and outputs the pulse train of the frequency proportional to the 1/n power of the input voltage is thus obtd.

Description

【発明の詳細な説明】 （発明の分野） この発明は、静１１形過電流に１＊電器のタイマ回路等
どして好適な電１１・周波数変換回路に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of the Invention) The present invention relates to an electric power/frequency conversion circuit suitable for use in static electric overcurrents, such as timer circuits of 1* electric appliances.

（従来技術とぞの問題点） 従来、パノノ電圧の１／１）乗に比例した周波数のパル
ス列を１ｑるためには、対数増幅器を利用した回路が多
く使用されているが、これらの回路ではス・ｊ歓待性を
得るためにダイΔ−ドウ１−ランジスタ等の固有特性を
利用し−Ｃいるため、回路製作にあたっては、特殊部品
が必要であったり、１８９密な部品の選別が必要である
等により比較的Ｔ１ス１へが高いという問題があった。(Problems with the prior art) Conventionally, circuits using logarithmic amplifiers have often been used to generate 1q pulse trains with a frequency proportional to the 1/1) power of the panonovoltage. Because the unique characteristics of die Δ transistors, etc. are utilized in order to obtain hospitality, special parts are required for circuit fabrication, and 189 parts must be carefully sorted. There was a problem that the T1 speed was relatively high due to some reasons.

（発明の目的） この発明の目的は、対数増幅器を利用した回路に比べ回
路構成が簡単で、しかム特殊部品あるいは部品の選別等
が不要な回路、′？Ｊなりら入力電圧の１／１１乗に比
例した周波数のパルス列を１することがで゛ぎる回路を
提供Ｊることにある。(Objective of the Invention) The object of the present invention is to provide a circuit which has a simpler circuit configuration than a circuit using a logarithmic amplifier and does not require special parts or selection of parts. The object of the present invention is to provide a circuit that is capable of multiplying by 1 a pulse train having a frequency proportional to the 1/11th power of the input voltage.

（発明の構成と効果） この発明は上記の目的を達成りるために、１１段の能動
形積分回路を互いに従属接続するとともに、終段の能動
形梢分回路の出力電圧を電圧比較回路によって基ｒ浩電
圧と比較し、この比較出ノ〕でワンショッ１〜回路を駆
動覆るとともに、このワンショット回路の出力に応答し
て各能動形積分回路のコンデンリーを急３ｎｒ　ｔｉ夕
電さＩＪるにうにしたものである。(Structure and Effects of the Invention) In order to achieve the above object, the present invention connects 11 stages of active integrating circuits to each other in a subordinate manner, and uses a voltage comparison circuit to determine the output voltage of the active division circuit at the final stage. By comparing with the base voltage, this comparison output is used to drive the one-shot circuit, and in response to the output of this one-shot circuit, the capacitance of each active integrating circuit is suddenly increased to 3nr ti. It was made by sea urchin.

このにう＞２回路構成によれにＬ、能動形積分回路は単
に０１〕アンプとコンアン１すｉ１５　Ｊ：び抵抗で構
成できるため、特殊な部品が不要で、また部品の選別等
の必要もなく、更に対数増幅器を利用した従来回路に比
べ回路構成が著しく簡単になる。With this >2 circuit configuration, the active integrator circuit can be configured simply with an amplifier, a converter, and a resistor, so there is no need for special parts, and there is no need to select parts. Furthermore, the circuit configuration is significantly simpler than conventional circuits using logarithmic amplifiers.

（実施例の説明） 第１図は、この発明に係わる電圧・周波数変換回路の一
実施例を示ダ回路図である。同図において、この電圧・
周波数変換回路は、互いに従属接続された２段の能動形
積分回路１，２と、前記終段の能動形積分回路２の出力
電圧を所定の基準電圧Ｖ　Ｓと比較する電圧比較回路３
ど、前記電圧比較回路３の比較出力で駆動されるワンシ
ョット回路４と、このワンショッ１へ回路の出力に応答
して、各能動形積分回路１，２のコンデン→）Ａ）、６
を急速放電させるスイッチ７．８とから１１１１成され
ている。(Description of an Embodiment) FIG. 1 is a circuit diagram showing an embodiment of a voltage/frequency conversion circuit according to the present invention. In the same figure, this voltage
The frequency conversion circuit includes two stages of active integrator circuits 1 and 2 connected in series with each other, and a voltage comparison circuit 3 that compares the output voltage of the final stage active integrator circuit 2 with a predetermined reference voltage VS.
The one-shot circuit 4 is driven by the comparison output of the voltage comparison circuit 3, and in response to the output of the circuit to the one-shot 1, the capacitors of the active integrating circuits 1 and 2 are connected →) A), 6
1111, and a switch 7.8 for rapidly discharging the battery.

能動形栢分回路１，２は、それぞれ反転増幅器として肋
作りるＯＰアンプ９．１０の入力側に抵抗１１．１２を
介挿し、更に入出力間に」ンデン４ノ５，６を接続り−
るとともに、これらのコンデンリ′と並列に「１三−１
−で）１１を成されたスイッチ７．８を並列接続してな
るものである。The active type divider circuits 1 and 2 each have a resistor 11 and 12 inserted on the input side of an OP amplifier 9 and 10, each of which serves as an inverting amplifier, and further connect 4 nodes 5 and 6 between the input and output.
At the same time, in parallel with these condensation
-) 11 are connected in parallel.

また、電圧比較回路３は、Ｊ（三反転増幅器として使用
されたＯＰアンプ１会の反転入力側に、抵抗１３と１４
とぐ電源十Ｖを分圧して基１．１ら電圧としＣ与えると
どちに、非反φへ入り側に終段の能動形積分回路２の出
力ＶＯ２を供給ηるＪ：うにしたものである。In addition, the voltage comparator circuit 3 has resistors 13 and 14 connected to the inverting input side of the OP amplifier 1 used as a tri-inverting amplifier (J).
When the voltage of the power source 1.1 is divided and the voltage is given as C, the output VO2 of the active integrating circuit 2 at the final stage is supplied to the input side of the non-reciprocal φ. It is.

そして、前段の能動形積分回路２の出力Ｖｏ　２の値が
基準電圧Ｖｓｆ越えると、電圧比較回路１２の出力は′
１ドとなり、この”ｌド°のｔｒ上りに応答してワンシ
ョット回路４が駆動され、微小幅”　ｌ−１”パルスが
出力される。Then, when the value of the output Vo2 of the active integrating circuit 2 in the previous stage exceeds the reference voltage Vsf, the output of the voltage comparator circuit 12 becomes '
The one-shot circuit 4 is driven in response to the rise in tr of this "l-do", and a minute width "l-1" pulse is output.

次に、以上の構成よりなる回路の動作を第２図の波形図
を参照しながら説明りる。まず、初段の積分回路１の入
力Ｖ　Ｉｔｒの圃が所定の正電圧になると、その出力Ｖ
ｏ　Ｉの値は所定の時定数）Ｊ−ブを描きながらほぼ直
線的に低下りる。Next, the operation of the circuit having the above configuration will be explained with reference to the waveform diagram in FIG. First, when the input V Itr of the first-stage integrating circuit 1 reaches a predetermined positive voltage, the output V
o The value of I decreases almost linearly while following a predetermined time constant (J-b).

一方、この初段出力ｖ０１が低下すると、終段の積分回
路２の出力ＶＯ２の１「１は、２乗カ〜ノを描きながら
」二介する。On the other hand, when the first-stage output v01 decreases, the output VO2 of the final-stage integrating circuit 2 decreases by 1 while drawing a square.

そして、この終段出ノＪＶＯ２の値が１５準電圧ＶＳを
越えると、電圧比較回路１２が反転して、その立上りに
応答してワンシッフ１〜回路４が駆動され、出力■Ｏｕ
Ｔには微小幅”１１”パルスが出ツノされる。When the value of this final stage output JVO2 exceeds the 15 quasi-voltage VS, the voltage comparator circuit 12 is inverted, and in response to the rising edge, one shift 1 to circuit 4 are driven, and the output
A minute width "11" pulse is output at T.

一方、このワンショット出力にＪ＝−、＞て、スイッチ
７，８が瞬間的にオンして、コンデンリ・５，６の電荷
が急速ｂ’ｌ電されると、初段および終段の積分回路１
，２はぞれぞれ初期状態にりしツ１−・され、再び以上
の動作が繰り返し行な４つれ、この結果ワンショット回
路４の出力Ｖｏｕｒは同門［を有する微小幅パルス列ど
なる。On the other hand, when this one-shot output J=->, switches 7 and 8 are momentarily turned on and the charges of condensers 5 and 6 are rapidly b'l charged. 1
.

ここで、初段おＪ、び終段用ツノをぞれぞれ、Ｖ。Here, the horns for the first stage, J, and final stage are respectively V.

＋　、Ｖｏ　２とｄ３　＜と、 ＶＯ１＝ｋ　＋　伊Ｖ＋　Ｎ−ｔ Ｖｏ　２　＝＝ｋ　２　・Ｖｔ、Ｎ−Ｌ　２トｌＪｒ、
ル。+, Vo 2 and d3 <, VO1=k + Italian V+ N-t Vo 2 ==k 2 ・Vt, N-L 2 TolJr,
Le.

ここ（゛、ＶＯ２−ＶＳの関係から ｋ　２　・Ｖｔ　Ｎ−」’　＝Ｖｓ　ト’ｃ’Ｗ’）、
方、出力パルス列の周波数には ｒニー１　、／　ｔ　＝ｋ　３・７＝ ｋ　＋　、　ｋ　２　、　ｋ　３は係数従って、この実
施例では入力電圧ＶＩＮの１！２乗に比例した周波数の
パルス列を１！することができることが証明される。Here (゛, from the relationship of VO2-VS, k 2 ・Vt N-' = Vs 'c'W'),
On the other hand, the frequency of the output pulse train is r knee 1, / t = k 3 7 = k + , k 2 , k 3 are coefficients. Therefore, in this embodiment, the pulse train has a frequency proportional to the 1!2 power of the input voltage VIN. 1! It is proven that it can be done.

なお、前記実施例Ｃ（よ能動形仙分回路を２段従属接し
Ｉｃシたが、これを３段、４段・・・と増加ずれは、そ
れぞれ入力端子の１！４乗、１／ε３乗、１／１Ｇ乗に
比例した周波数のパルス列を得ることができることは勿
論である。Incidentally, in the above-mentioned embodiment C, the active type dividing circuit was connected in two stages as Ic, but when this is changed to three stages, four stages, etc., the increase deviation is the 1!4th power of the input terminal, 1/ε3, respectively. Of course, it is possible to obtain a pulse train with a frequency proportional to the power of 1/1G.

まｌζ、この回路にＪ、れば、厳密な特性選別を必要ど
するｆｉ殊部品は一切使用されておらり゛、このため、
回路構成も簡１ｉで安価に製作づることができる。Also, this circuit does not use any special parts that require strict characteristic selection, and therefore,
The circuit configuration is also simple and can be manufactured at low cost.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の一実施例を承り回路図、第２図は第１
図におりる各部の信号状態を示づ波形図である。 １・・・・・・初段の能動形積分回路 ２・・・・・・終段の能動形積分回路 ３・・・・・・電圧比較回路 ４・・・・・・ワシショット・回路 ５・・・・・・コンデンリ ６・・・・・・コンアン１ノ ア・・・・・−スイッチ ８・・・−・・スイッチ 特Ｙ［出願人Fig. 1 is a circuit diagram of an embodiment of the present invention, and Fig. 2 is a circuit diagram of an embodiment of the present invention.
FIG. 3 is a waveform diagram showing signal states of each part in the figure. 1... First stage active type integrating circuit 2... Last stage active type integrating circuit 3... Voltage comparison circuit 4... Eagle shot circuit 5. ... Condenri 6 ... Conden 1 Noah ... - Switch 8 ... Switch Special Y [Applicant

Claims (1)

【特許請求の範囲】[Claims] （１）ｎいに従属接続された１１段の能動形積分回路と
； 前記終段の能動形偵分回路の出力電圧を所定の基ｔ１（
電１［と比較づる電圧比較回路と；前記電圧比較回路の
比較出力で駆動されるワンショット回路と； 前記ワンショッＩ・回路の出力に応答して、各能動形積
分回路のコンア′ンリーを急速放電さμるスイッチとを
備え： 入力端子の１／１１乗に比例した周波数のパルス列を出
力づるＪ、うに構成しｌζことを特徴と１する電圧・周
波数変換回路。(1) 11 stages of active integrating circuits connected in series;
a voltage comparator circuit that compares voltage 1; a one-shot circuit driven by the comparison output of the voltage comparator circuit; and a one-shot circuit that rapidly adjusts the conversion of each active integrator circuit in response to the output of the one-shot I circuit; 1. A voltage/frequency conversion circuit comprising: a switch for discharging the voltage;