JPS5910586B2 - Metal substrate for attaching semiconductor pellets - Google Patents
Metal substrate for attaching semiconductor pelletsInfo
- Publication number
- JPS5910586B2 JPS5910586B2 JP53029521A JP2952178A JPS5910586B2 JP S5910586 B2 JPS5910586 B2 JP S5910586B2 JP 53029521 A JP53029521 A JP 53029521A JP 2952178 A JP2952178 A JP 2952178A JP S5910586 B2 JPS5910586 B2 JP S5910586B2
- Authority
- JP
- Japan
- Prior art keywords
- pellet
- metal substrate
- mounting part
- pellet mounting
- outer circumferential
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
- H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3205—Shape
- H01L2224/32057—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83009—Pre-treatment of the layer connector or the bonding area
- H01L2224/83051—Forming additional members, e.g. dam structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
Description
【発明の詳細な説明】
この発明は半導体装置の半導体ペレット（以下単にペレ
ットと記す）を装着する金属基板の改良に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement of a metal substrate on which a semiconductor pellet (hereinafter simply referred to as pellet) of a semiconductor device is mounted.
５ 例えば電力用トランジスタもしくは電力用サイリス
タなどの定格出力の大きい電力用半導体装置では、その
ペレット内に動作時に消費される電力量が比較的大きい
ので、この消費電力により上記ペレットの温度が高温度
に上昇する。5 For example, in a power semiconductor device with a large rated output, such as a power transistor or a power thyristor, a relatively large amount of power is consumed in the pellet during operation, so this power consumption causes the temperature of the pellet to rise. Rise.
このように、１０電力用半導体装置では、動作する度毎
にそのペレットの温度が繰返し高温度になるヒートサイ
クルよつて、上記ペレットとこのペレットが装着されて
いる金属基板との間に熱膨張係数の差による熱応力が繰
返し発生し、この熱応力により上記ペレ１５ ツトが劣
化するという問題があつた。この問題を解決するために
、上記ペレットを金属基板に装着するろう材の厚さが厚
くなるようにすることによつて、上記熱応力を緩和する
方法が広く用いられている。なお上記ろう材としては、
一般に鉛とス２０ズを主成分とした半田が使用されてい
る。第１図はこのような配慮をした従来のメサ形パワー
トランジスタペレット装着用金属基板を示す斜視図、第
２図は第１図の…−■線での断面図である。２５図にお
いて、１は銅製の金属基板、２はペレットが装着される
ペレット装着部で、このペレット装着部２はこゝに装着
されるペレットの外形より多少小さくなるように形成さ
れている。In this way, in the 10-power semiconductor device, due to the heat cycle in which the temperature of the pellet repeatedly increases each time it is operated, the coefficient of thermal expansion between the pellet and the metal substrate on which this pellet is mounted increases. There was a problem in that thermal stress caused by the difference in temperature repeatedly occurred, and the pellet 15 deteriorated due to this thermal stress. To solve this problem, a method is widely used in which the thermal stress is alleviated by increasing the thickness of the brazing material used to attach the pellets to the metal substrate. The brazing filler metal mentioned above is
Generally, solder whose main components are lead and tin is used. FIG. 1 is a perspective view showing a conventional metal substrate for mounting mesa-type power transistor pellets with such consideration, and FIG. 2 is a sectional view taken along the line . . . -■ in FIG. 1. In Fig. 25, 1 is a copper metal substrate, 2 is a pellet mounting part on which a pellet is mounted, and this pellet mounting part 2 is formed to be somewhat smaller than the outer shape of the pellet to be mounted thereon.
３はペレット装着部２の主面部に所定間隔おいて互いに
平３０行に配設された複数条の細溝、４は隣接する細溝
３間に形成された凸条、５はペレット装着部２を取り囲
んで形成された外周溝で、この外周溝５の外周壁はペレ
ット装着部２に装着されるペレットの外形より大きくな
るように形成され、その底面３５は、第２図に示すよう
に、金属基板１の主面に実質的に平行である。3 is a plurality of thin grooves arranged in 30 rows on the main surface of the pellet mounting portion 2 at predetermined intervals; 4 is a protrusion formed between adjacent narrow grooves 3; 5 is a pellet mounting portion 2. The outer circumferential wall of the outer circumferential groove 5 is formed to be larger than the external shape of the pellet to be mounted on the pellet mounting section 2, and the bottom surface 35 of the outer circumferential groove 5 is, as shown in FIG. It is substantially parallel to the main surface of the metal substrate 1.
なお第２図において、Ｗ１およびｔｌはそれぞれ細溝３
の幅および深さである。第３図はメサ形パワートランジ
スタのペレツトが、第１図および第２図に示す金属基板
１のペレツト装着部２に装着された状態を示し、第２図
に対応する断面図である。図において、６はメサ形パワ
ートランジスタのペレツト、７はペレツト６をペレツト
装着部２に装着する半田層を示す。In FIG. 2, W1 and tl are the narrow grooves 3, respectively.
width and depth. FIG. 3 is a sectional view corresponding to FIG. 2, showing a state in which a pellet of a mesa-type power transistor is mounted on the pellet mounting portion 2 of the metal substrate 1 shown in FIGS. 1 and 2. FIG. In the figure, reference numeral 6 indicates a pellet of a mesa-type power transistor, and reference numeral 7 indicates a solder layer for attaching the pellet 6 to the pellet attachment portion 2.
このように、ペレツト装着部２の主面部に細溝３を設け
れば、ペレツト６をペレツト装着部２に装着するときに
、毛細現象により細溝３に流れこんだ半田と、ペレツト
６と凸条４との間に介在する半田との間の表面張力によ
り、ペレツト装着部２の主面部が平坦なものに比べて半
田層７の厚さｄ１を厚くすることができる。In this way, if the narrow grooves 3 are provided in the main surface of the pellet mounting section 2, when the pellet 6 is mounted on the pellet mounting section 2, the solder that has flowed into the narrow groove 3 due to the capillary phenomenon and the pellets 6 and the convex Due to the surface tension between the strip 4 and the solder interposed between the strips 4 and the solder, the thickness d1 of the solder layer 7 can be made thicker than when the main surface of the pellet mounting section 2 is flat.
よつて、この厚さの厚い半田層７により、ペレツト６と
ペレツト装着部２との間に生ずる熱膨張係数の差による
熱応力を緩和することができる。また、外周溝５の外周
壁がペレツト６の外径より大きくなるように形成されて
いるので、ペレツト６とペレツト装着部２とのろう付け
時に、これらの間からはみ出た余分の半田が外周溝５内
へ流れ込んで収容されるため、上記余分の半田によりペ
レツト６のＰＮ接合が短絡されるようなことがない。と
ころで、細溝３の幅Ｗ１と深さＴ，とが小さい場合には
、例えば半田層７内に発生した気泡などが細溝３内を移
動してその両端から脱出することが困難になるので、半
田層７内に空泡（巣）８ができやすくなる。Therefore, the thick solder layer 7 can alleviate the thermal stress caused by the difference in coefficient of thermal expansion between the pellet 6 and the pellet mounting portion 2. In addition, since the outer circumferential wall of the outer circumferential groove 5 is formed to be larger than the outer diameter of the pellet 6, when the pellet 6 and the pellet mounting part 2 are brazed, excess solder that protrudes from between them is transferred to the outer circumferential groove. Since the solder flows into the pellet 5 and is contained therein, the PN junction of the pellet 6 will not be short-circuited by the excess solder. By the way, if the width W1 and depth T of the narrow groove 3 are small, it becomes difficult for air bubbles generated in the solder layer 7 to move inside the narrow groove 3 and escape from both ends thereof. , voids (cavities) 8 are likely to be formed within the solder layer 7.
そして、この空泡８が発生すれば、半田層７の接着強度
が低下すると共に、ペレツト６から金属基板１への熱抵
抗が増大する。しかしながら、通常、ペレツト装着部２
は金属基板１の主面部に外周溝５と細溝３と共に同時に
コイニング加工（圧印加工）によつて形成されるので、
このコイニング加工時に、ペレツト装着部２の肉が第２
図の矢印Ｐ方向に流動する。しかるに、第２図に示す外
周溝５の断面形状では、上記ペレツト装着部２の肉の流
動が容易でないので、細溝３の幅Ｗ１と深さｔ１とを十
分大きな所望の大きさに形成することが非常に困難であ
るという欠点があつた。この発明は、上述の欠点に鑑み
てなされたもので、ペレツト装着部の少なくとも細溝を
横切る方向の両側に、上記ペレツト装着部から離れるに
つれて深さが深くなるような断面形状の溝部を設けフる
ことにより、上記ペレツト装着部のコイニング成形時に
上記ペレツト装着部の肉の逃げを少なくして、所望の幅
と深さの細溝を上記ペレツト装着部の主面部に容易に形
成することができる半導体ペレツト装着用金属基板を提
案することを目的とする。If these air bubbles 8 are generated, the adhesive strength of the solder layer 7 decreases, and the thermal resistance from the pellet 6 to the metal substrate 1 increases. However, usually the pellet loading section 2
is formed simultaneously with the outer circumferential groove 5 and the narrow groove 3 on the main surface of the metal substrate 1 by coining process (coining process).
During this coining process, the meat of the pellet attachment part 2 is
It flows in the direction of arrow P in the figure. However, the cross-sectional shape of the outer circumferential groove 5 shown in FIG. 2 does not allow the meat of the pellet mounting portion 2 to flow easily, so the width W1 and depth t1 of the narrow groove 3 are formed to a sufficiently large desired size. The drawback was that it was extremely difficult to do so. This invention has been made in view of the above-mentioned drawbacks, and includes grooves having a cross-sectional shape that becomes deeper as the distance from the pellet mounting section increases at least on both sides of the pellet mounting section in the direction across the narrow groove. By doing so, it is possible to reduce the escape of the flesh of the pellet mounting part during coining molding of the pellet mounting part, and to easily form a narrow groove of a desired width and depth on the main surface of the pellet mounting part. The purpose is to propose a metal substrate for mounting semiconductor pellets.
以下、この発明によるメサ形パワートランジスタのペレ
ツト装着用金属基板について説明する。Hereinafter, a metal substrate for attaching pellets to a mesa-type power transistor according to the present invention will be explained.
第４図および第５図において、第１図および第２図と同
一符号は夫々同一または相当部分を示しており、第１図
および第２図と異なるところは、外周溝５を、ペレツト
装着部２から離れるに従つて深さが深くなるような断面
形状にした点である。なお、第５図において、θは外周
溝５の底面５ｂが金属基板１の主面に対するテーパー角
である。このような金属基板１は、第５図に示したパン
チ１０を用いてペレツト装着部２と外周溝５とを同時に
コイニング加工して形成される。しかるに外周溝５の底
部５ｂに角度θをつけるようにしたので、コイニング時
にペレツト装着部２から外周溝５へ向かう被加工物の肉
の逃げを少なくすることができ、安定したコイニング加
工が可能となる。このテーパ角θは約２イから約４５が
までが有効で、第４図および第５図のものに関する実験
では、θ＝３４〜２０びが最も好ましい角度であつた。
これにより、所望する十分な大きさの深さ及び幅を持つ
た細溝３を容易に形成することができる。例えば第２図
に示した従来の断面形状の外周溝５では、細構３の断面
形状が深さｔ１ご２５μｍ、幅Ｗｌ．：′１２０μｍあ
るいはｔ１ご３０μＭ，ｗｌご８０μｍ程度であつたの
に対し、第５図に示したテーパ角θをθ：５た程度にし
た場合は、細溝３の断面形状を深さｔ１ご５０μｍ１幅
Ｗ２ご１５０μｍ程度にすることができた。このように
第５図に示した細溝３の断面積を従来のもの＼それに比
べて２倍以上にすることができるので、従来例において
述べた半田層７の巣８の発生を少なくすることができる
。従つて固着に寄与する半田厚みを適当な値にまで厚く
でき、金属基板１とペレツト６との間の十分な固着が得
られると共に、半導体装置のより小さな熱抵抗を実現で
き、耐ヒートサイクル性の向上が可能となつた。実際に
本発明を適用して組立てた結果、上記特徴のうち特に半
田の巣８は従来のものに比べて大きなものは全くなくな
り、細溝３の底部付近に極く一部存在するのみにまで改
善でき、また、固着強度も十分な値が得られるに至つた
。なお、上記実施例では外周溝５の底面をテーパー角θ
の平面にしたが、必ずしも平面にする必要はなく、ペレ
ツト装着部２から離れるにつれて深さが深くなるような
断面形状の溝であれば差支えない。In FIGS. 4 and 5, the same reference numerals as in FIGS. 1 and 2 indicate the same or corresponding parts, and the difference from FIGS. 1 and 2 is that the outer circumferential groove 5 is The point is that the cross-sectional shape is such that the depth increases as the distance from No. 2 increases. In FIG. 5, θ is the taper angle of the bottom surface 5b of the outer circumferential groove 5 with respect to the main surface of the metal substrate 1. Such a metal substrate 1 is formed by simultaneously coining the pellet mounting portion 2 and the outer circumferential groove 5 using a punch 10 shown in FIG. However, since the angle θ is formed at the bottom 5b of the outer circumferential groove 5, it is possible to reduce the escape of the material of the workpiece from the pellet mounting part 2 toward the outer circumferential groove 5 during coining, and stable coining processing is possible. Become. This taper angle .theta. is effective from about 2 to about 45 degrees, and in experiments with the ones shown in FIGS. 4 and 5, the most preferable angle was .theta.=34 to 20 degrees.
Thereby, it is possible to easily form the narrow groove 3 having a desired sufficient depth and width. For example, in the outer circumferential groove 5 having the conventional cross-sectional shape shown in FIG. 2, the cross-sectional shape of the fine structure 3 has a depth t1 of 25 μm and a width Wl. :'120 μm or 30 μM per t1 and 80 μm per wl, but when the taper angle θ shown in Fig. 5 is set to θ:5, the cross-sectional shape of the narrow groove 3 is It was possible to make the width W2 approximately 50 μm and 150 μm. In this way, the cross-sectional area of the narrow groove 3 shown in FIG. 5 can be more than doubled compared to the conventional one, so that the occurrence of cavities 8 in the solder layer 7 mentioned in the conventional example can be reduced. Can be done. Therefore, the solder thickness that contributes to adhesion can be increased to an appropriate value, and sufficient adhesion between the metal substrate 1 and the pellet 6 can be obtained, as well as lower thermal resistance of the semiconductor device and improved heat cycle resistance. It has become possible to improve As a result of actually assembling the present invention, the solder cavities 8, which have the above-mentioned features, are no longer large compared to the conventional ones, and only a small portion exists near the bottom of the narrow groove 3. It was possible to improve the bonding strength, and a sufficient value of adhesion strength was also obtained. In addition, in the above embodiment, the bottom surface of the outer circumferential groove 5 has a taper angle θ.
However, it is not necessarily necessary to have a flat surface, and any groove having a cross-sectional shape that becomes deeper as it moves away from the pellet mounting portion 2 may be used.
また上記実施例では、ペレツト装着部２の全周に亘つて
外周溝５を設けるようにしたが、ペレツト装着部２の少
なくとも細溝３を横切る方向の両側に、ペレツト装着部
から離れるにつれて深さが深くなるような断面形状の溝
を設ければ、この発明の効果は十分得られる。Further, in the above embodiment, the outer circumferential groove 5 is provided over the entire circumference of the pellet mounting part 2, but at least on both sides of the pellet mounting part 2 in the direction crossing the narrow groove 3, the depth increases as the distance from the pellet mounting part increases. The effects of the present invention can be sufficiently obtained by providing a groove with a cross-sectional shape that is deep.
更にこの発明は、電力用トランジスタのみならず他の電
力用半導体装置、例えばサイリスタ、ダイオードなどに
も適用できることはいうまでもない。Furthermore, it goes without saying that the present invention can be applied not only to power transistors but also to other power semiconductor devices such as thyristors and diodes.
以上、説明したように、この発明によれば、ペレツト装
着部の少なくとも細溝を横切る方向の両側に、上記ペレ
ツト装着部から離れるにつれて深さが深くなるような形
状の溝部を設けるようにしたので、上記ペレツト装着部
のコイニング成形が容易となり、上記ペレツト装着部の
主面部に十分な大きさの幅と深さを有する細溝を形成す
ることができるので、上記ペレツト装着部にペレツトを
装着する半田層内に気泡が発生するのを抑制し、上記半
田層の接着強度の減少を防止すると＼もにその放熱抵抗
が増大するのを防止することができる。As explained above, according to the present invention, grooves are provided at least on both sides of the pellet mounting section in the direction across the narrow groove, and the grooves are shaped so that the depth increases as the distance from the pellet mounting section increases. , the coining of the pellet mounting part is facilitated, and a narrow groove having a sufficient width and depth can be formed on the main surface of the pellet mounting part, so that pellets can be mounted in the pellet mounting part. By suppressing the generation of air bubbles in the solder layer and preventing the adhesive strength of the solder layer from decreasing, it is also possible to prevent the heat dissipation resistance from increasing.
第１図は従来のメサ形パワートランジスタのペレツト装
着用金属基板を示す斜視図、第２図は第１図の一線での
断面図、第３図はメサ形パワートランジスタのペレツト
が第１図および第２図に示す金属基板に装着された状態
を示す断面図、第４図はこの発明の一実施例を示す斜視
図、第５図は第４図のＶ−Ｖ線での断面図である。
図において、１は金属基板、２はペレツト装着部、３は
細溝、４は凸条、５は外周溝、６はペレツトである。Fig. 1 is a perspective view showing a metal substrate for attaching pellets of a conventional mesa-type power transistor, Fig. 2 is a cross-sectional view taken along the line in Fig. 1, and Fig. 3 shows a pellet of a mesa-type power transistor shown in Fig. FIG. 2 is a cross-sectional view showing the state in which the metal board is mounted, FIG. 4 is a perspective view showing an embodiment of the present invention, and FIG. 5 is a cross-sectional view taken along line V-V in FIG. 4. . In the figure, 1 is a metal substrate, 2 is a pellet mounting part, 3 is a thin groove, 4 is a convex strip, 5 is an outer circumferential groove, and 6 is a pellet.
Claims (1)
定間隔を隔てゝ互いに平行に整列した複数条の細溝を有
するペレット装着部と、少なくとも上記細溝を横切る方
向のペレット装着部両側に上記ペレット装着部から離れ
るにつれて深さが深くなるような断面形状の溝部を備え
た半導体ペレット装着用金属基板。1. A pellet mounting part that is provided on the main surface part on which the semiconductor pellets are mounted and has a plurality of thin grooves arranged parallel to each other at predetermined intervals, and the pellet mounting part is provided on both sides of the pellet mounting part in a direction that crosses at least the narrow grooves. A metal substrate for attaching semiconductor pellets, which has a groove section with a cross-sectional shape that becomes deeper as it moves away from the attachment section.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53029521A JPS5910586B2 (en) | 1978-03-15 | 1978-03-15 | Metal substrate for attaching semiconductor pellets |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53029521A JPS5910586B2 (en) | 1978-03-15 | 1978-03-15 | Metal substrate for attaching semiconductor pellets |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS54122088A JPS54122088A (en) | 1979-09-21 |
| JPS5910586B2 true JPS5910586B2 (en) | 1984-03-09 |
Family
ID=12278398
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP53029521A Expired JPS5910586B2 (en) | 1978-03-15 | 1978-03-15 | Metal substrate for attaching semiconductor pellets |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5910586B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62178532U (en) * | 1986-04-30 | 1987-11-12 | ||
| TWI281717B (en) * | 2006-05-17 | 2007-05-21 | Univ Tsinghua | Apparatus for aligning microchips on substrate and method for the same |
| EP2605278A1 (en) * | 2011-12-15 | 2013-06-19 | Nxp B.V. | Lead Frame with Die Attach Bleeding Control Features |
-
1978
- 1978-03-15 JP JP53029521A patent/JPS5910586B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS54122088A (en) | 1979-09-21 |
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