JPS5888429U - ultrasonic delay circuit - Google Patents
ultrasonic delay circuitInfo
- Publication number
- JPS5888429U JPS5888429U JP18290081U JP18290081U JPS5888429U JP S5888429 U JPS5888429 U JP S5888429U JP 18290081 U JP18290081 U JP 18290081U JP 18290081 U JP18290081 U JP 18290081U JP S5888429 U JPS5888429 U JP S5888429U
- Authority
- JP
- Japan
- Prior art keywords
- ultrasonic delay
- delay
- delay time
- delay circuit
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
- Networks Using Active Elements (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は、固体超音波遅延素子の1例の平面−を示す。
第2図は、従来の1個の遅延素子の出力信号の状態、第
3図は従来の2個接続された遅延素子の出力信号の状態
、第4図は本考案の2個接続された遅延素子の出力信号
の状態を、それぞれ 、示す。第5図は、本考案の超
音波遅延回路の1例の全体を示す回路図である。
tl順FIG. 1 shows a plan view of an example of a solid-state ultrasonic delay element. Fig. 2 shows the state of the output signal of a conventional delay element, Fig. 3 shows the state of the output signal of a conventional delay element with two connected delay elements, and Fig. 4 shows the state of the output signal of the conventional delay element with two connected delay elements. The states of the output signals of the elements are shown respectively. FIG. 5 is a circuit diagram showing an entire example of the ultrasonic delay circuit of the present invention. tl order
Claims (2)
出力間の位相差で規定したとき、該遅延時間が互に45
°以上異なる2つの固体超音波遅延素子を、コイル等の
受動インピーダンス素子あるいはトランジスタ等の能動
素子からなる回路素子により直列接続してなる固体超音
波遅延回路。(1) When the delay time is defined by the phase difference between input and output at the center frequency of the passband, the delay time is 45
A solid-state ultrasonic delay circuit in which two solid-state ultrasonic delay elements that differ by more than 100 degrees are connected in series by a circuit element consisting of a passive impedance element such as a coil or an active element such as a transistor.
合には、画素子の中心周波数の平均周波数を用いて入出
力間の位相差に基ずく遅延時間を規定する実用新案登録
請求の範囲第1項記載の回路。(2) If the center frequencies of the two delay elements are different, the average frequency of the center frequencies of the pixel elements is used to define the delay time based on the phase difference between input and output. The circuit described in item 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18290081U JPS5888429U (en) | 1981-12-10 | 1981-12-10 | ultrasonic delay circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18290081U JPS5888429U (en) | 1981-12-10 | 1981-12-10 | ultrasonic delay circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5888429U true JPS5888429U (en) | 1983-06-15 |
JPH04581Y2 JPH04581Y2 (en) | 1992-01-09 |
Family
ID=29981680
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18290081U Granted JPS5888429U (en) | 1981-12-10 | 1981-12-10 | ultrasonic delay circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5888429U (en) |
-
1981
- 1981-12-10 JP JP18290081U patent/JPS5888429U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH04581Y2 (en) | 1992-01-09 |
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