JPS58790A - Pointer type multifunctional clock - Google Patents

Pointer type multifunctional clock

Info

Publication number
JPS58790A
JPS58790A JP9914881A JP9914881A JPS58790A JP S58790 A JPS58790 A JP S58790A JP 9914881 A JP9914881 A JP 9914881A JP 9914881 A JP9914881 A JP 9914881A JP S58790 A JPS58790 A JP S58790A
Authority
JP
Japan
Prior art keywords
circuit
counting
counting circuit
signal
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9914881A
Other languages
Japanese (ja)
Inventor
Katsuo Nishimura
西村 克男
Minoru Watanabe
稔 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Holdings Co Ltd
Citizen Watch Co Ltd
Original Assignee
Citizen Holdings Co Ltd
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Holdings Co Ltd, Citizen Watch Co Ltd filed Critical Citizen Holdings Co Ltd
Priority to JP9914881A priority Critical patent/JPS58790A/en
Priority to US06/361,226 priority patent/US4470706A/en
Priority to GB08208843A priority patent/GB2102601B/en
Publication of JPS58790A publication Critical patent/JPS58790A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G04HOROLOGY
    • G04CELECTROMECHANICAL CLOCKS OR WATCHES
    • G04C3/00Electromechanical clocks or watches independent of other time-pieces and in which the movement is maintained by electric means
    • G04C3/14Electromechanical clocks or watches independent of other time-pieces and in which the movement is maintained by electric means incorporating a stepping motor
    • G04C3/146Electromechanical clocks or watches independent of other time-pieces and in which the movement is maintained by electric means incorporating a stepping motor incorporating two or more stepping motors or rotors

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electromechanical Clocks (AREA)

Abstract

PURPOSE:To restrain the increment of the IC chip size due to the extension of functions to a required minimum, by constituting a function counting circuit with plural main counting circuits and an auxiliary counting circuit for common use, which is used for plural functions commonly, in a multipointer digital clock. CONSTITUTION:The signal of a time reference source 1 is given to a frequency dividing circuit 2. A control switching circuit 3 receives the signal of the circuit 2 to control the transmission of a time counting signal, a switch input signal, and the counting signal of a function counting circuit. Main counting circuits 4 and 5 consists of counters which can count 60 and 720 respectively, and an auxiliary counting circuit 6 for common use consists of a counter which can count 60 and 720. Circuits 4 and 6 are used for the display of seconds of the normal time and the alarm mode display, and circuits 5 and 6 are used for the display of hours and minutes of the normal time and the display of alarm set hours and minutes and output alarm signals. Driving circuits 7 and 8 operate an alalog display mechanism 11 through motors 9 and 10, and a ring controlling circuit 12 drives an alarm device 13. A switch controlling circuit 16 is controlled by the input of an external operation member.

Description

【発明の詳細な説明】 本発明は指針式多機能時計の改良に関し、特にノーマル
時刻機能、アラーム時刻機能、クロノグラフ時刻機能等
の多機能情報を切替表示する機能計数回路の簡素化に関
する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a pointer-type multifunction timepiece, and particularly to the simplification of a function counting circuit that switches and displays multifunction information such as a normal time function, an alarm time function, and a chronograph time function.

従来、デジタル時計、複合時計で普及しているアラーム
機能やクロノグラフ機能や別時刻(デュアルタイム)機
能を指針式時計に付加する試みはいろいろ提案されてい
るが、精度も高く、テザイノ性も良く、信頼性も高い商
品は実現していない。
Various attempts have been made to add alarm functions, chronograph functions, and dual time functions, which have been popular in digital watches and composite watches, to pointer-type watches, but they are both highly accurate and have good functionality. However, a highly reliable product has not yet been realized.

特に腕時計ではスペース制約が犬ぎく、操作1牛が重視
され、ス々−ト九方式が望まれている。
Particularly in the case of wristwatches, where space constraints are severe and only one operation is important, a nine-to-one system is desired.

主計数回路と補助計数回路から構成される機能計数回路
を用いると指針よりなるアナログ表示機構を早送り切讐
して、多機能化が可能となる。M個の機能計数回路を用
いると2M個の計数回路が必要となる・。本発明はM個
の機能計数回路で構成される指針式多機能時計をM個の
主計数回路と複数の機能にわたり兼用で使用される兼用
補助計数回路を用いることにより2M個より少ない数の
計数回路で構成することにより、機能を増加する毎゛に
増大するIC(集積回路)のチップサイズを必要最小限
に押え、回路動作の信頼性向上、コスト増大の防止、モ
ジュール寸法増大の防止をし、使い易く、スマートな多
機能時計を実現する。
If a functional counting circuit consisting of a main counting circuit and an auxiliary counting circuit is used, the analog display mechanism consisting of a pointer can be fast-forwarded and multifunctional. If M functional counting circuits are used, 2M counting circuits are required. The present invention provides a pointer-type multifunction watch composed of M functional counting circuits that can count fewer than 2M pieces by using M main counting circuits and a dual-purpose auxiliary counting circuit that is used for multiple functions. By configuring it with circuits, the chip size of the IC (integrated circuit), which increases with each increase in functionality, can be kept to the necessary minimum, improving the reliability of circuit operation, preventing cost increases, and preventing increases in module size. , to realize an easy-to-use, smart, multi-functional watch.

次に図面に基づいて本発明の詳細な説明する。Next, the present invention will be explained in detail based on the drawings.

第1図は本発明の2モ一タアラーム機能時計のシステム
を示すブロック図で、水晶振動子、発振回路等よりなる
時間基準源1は約32KHzの時間基準信号を出力する
。分周回路2は時間基準信号をより低い周波数に分周し
、各回路への基本信号や時計信号を出力する。制御切替
回路3は時計信号、スイッチ人力信号、機能計数回路の
計数信号を伝達したり、信号に応じて各回路を制御した
りする。
FIG. 1 is a block diagram showing a system of a two-monitor alarm function timepiece according to the present invention, in which a time reference source 1 consisting of a crystal resonator, an oscillation circuit, etc. outputs a time reference signal of about 32 KHz. The frequency dividing circuit 2 divides the time reference signal to a lower frequency and outputs a basic signal and a clock signal to each circuit. The control switching circuit 3 transmits clock signals, switch manual signals, and counting signals from the functional counting circuit, and controls each circuit according to the signals.

第1主計数回路4は60を計数できるアップダウンカラ
/りで通常は分周回路2から出力される時計信号の1つ
である秒信号を計数している。第2主計数回路5は72
0を計数できるアップダウンカウンタで通常は分周回路
2から出力される時計信号の1つである分信号を計数し
ている。兼用補助計数回路6は60及び720を計数で
きるアップダウ/カウンタで通常はOvCリセットされ
ている。第1主計数回路4と兼用補助計数回路6で第1
機能計数回路を構成し、第2主計数回路5と兼用補助計
数回路6で第2機能計数回路を構成している。第1機能
計数回路はノーマル時刻の秒と示とアラーム時刻である
ことを示すアラームモード表示を行なうための回路であ
る。第2機能計数回路はノーマル時刻における時、分表
示とアラーム設定の時、分表示を行ない、さらにアラー
ム時刻に到達するとアラーム信号を出力する回路である
The first main counting circuit 4 is an up/down counter that can count 60, and normally counts a second signal, which is one of the clock signals output from the frequency dividing circuit 2. The second main counting circuit 5 is 72
The up/down counter is capable of counting 0 and normally counts the minute signal, which is one of the clock signals output from the frequency dividing circuit 2. The dual-purpose auxiliary counting circuit 6 is an up/down/counter capable of counting 60 and 720, and is normally reset by OvC. The first main counting circuit 4 and the dual-purpose auxiliary counting circuit 6
The second main counting circuit 5 and the dual-purpose auxiliary counting circuit 6 constitute a functional counting circuit. The first functional counting circuit is a circuit for displaying seconds of normal time and an alarm mode indicating that it is alarm time. The second function counting circuit is a circuit that displays the hours and minutes at normal time and the hours and minutes at alarm setting, and further outputs an alarm signal when the alarm time is reached.

第1駆動回路7、第2駆動回路8は分周囲路2の基本信
号を波形変換し、モータを駆動する駆動パルスを出力す
る回路で、第1駆動回路7は電気−機械変換器である第
1モータ9を駆動し、第2駆動回路8は同じく第2モー
タ10を駆動する。第1モータ9の回転運動は秒用輪列
で減速され、秒針に伝達され、毎秒1回秒針を駆動する
。第2モータ10の回転運動は分、時用輪列で減速さ才
1、分針、時針に伝達され、毎分1回分針、時針を駆動
する。秒針、分針、時針、文字板等でアナログ・表示機
構11が構成されている。鳴り制御回路12は警報装置
13を駆動する警報用駆動パルスを出力する回路で、ア
ラームセットオノオフメモリー回路、波形変換回路等よ
り構成されている。警報装置13は発音体で警報音を出
力する。外部操作部材はリューズ式スイッチ14とブツ
シュスイッチ15かも構成され、モード切替、ノーマル
時刻、アラーム時刻の修正、アラームセットのオフォノ
切替、警報音のストップ等に用いられる。スイッチ制御
回路16は外部操作部材の機械的スイッチ入力を電気的
スイッチ入力信号に変換し、モード切替信号、修正信号
、オールリセット信号等として出力する回路である。機
能計数回路の詳細な役割、説明については同一出願人に
よる先願もあるためここでは割愛し、簡単に説明する。
The first drive circuit 7 and the second drive circuit 8 are circuits that convert the basic signal of the dividing circuit 2 into waveforms and output drive pulses for driving the motor. The second drive circuit 8 similarly drives the second motor 10 . The rotational movement of the first motor 9 is decelerated by the seconds wheel train, transmitted to the second hand, and drives the second hand once every second. The rotational movement of the second motor 10 is decelerated by the minute and hour gear train and is transmitted to the minute and hour hands, driving the minute and hour hands once every minute. An analog/display mechanism 11 is composed of a second hand, a minute hand, an hour hand, a dial plate, etc. The ringing control circuit 12 is a circuit that outputs an alarm drive pulse to drive the alarm device 13, and is composed of an alarm set on/off memory circuit, a waveform conversion circuit, and the like. The alarm device 13 outputs an alarm sound using a sounding body. The external operating members include a crown type switch 14 and a bushing switch 15, which are used for mode switching, correcting the normal time and alarm time, switching the alarm set from phono, stopping the alarm sound, and the like. The switch control circuit 16 is a circuit that converts a mechanical switch input from an external operating member into an electrical switch input signal and outputs it as a mode switching signal, a correction signal, an all-reset signal, etc. The detailed role and explanation of the functional counting circuit is omitted here because there is an earlier application by the same applicant, and will be briefly explained.

第1機能計数回路は前述のように秒信号を計数し、0秒
位置と現在の秒時刻位置との差を計数している。リュー
ズ式スイッチ+4を押すとノーマル時刻モードよりアラ
ーム時刻モードにモード切替り、第1機能計数回路の第
1主計数回路4の計数値に応じて、第1駆動回路7から
秒針をO秒位置へ早送り駆動する駆動パルスが出力され
ろ。この時第1主計数回路4と兼用補助計数回路6へ同
数の信号7ノー加算又は減算されて、第1主計数回路4
の計数値が、兼用補助計数回路6の計数値として保存さ
れる。秒針は0秒位置で停止し、モードがノーマル時刻
よりアラーム時刻へ切替ったことを表示するっ兼用補助
計数回路6の計数値は後処理として、同数の後処理信号
が第1主計数回路4及び兼用補助計数回路6に入力し、
第1主計数回路4:て保存され、兼用補助計数回路6は
OF IJ上セツトれる。
The first functional counting circuit counts the second signal as described above, and counts the difference between the 0 second position and the current second time position. When the crown switch +4 is pressed, the mode changes from the normal time mode to the alarm time mode, and the second hand is moved from the first drive circuit 7 to the O second position according to the count value of the first main counting circuit 4 of the first functional counting circuit. A driving pulse for fast forward driving should be output. At this time, the same number of signals 7 are added or subtracted to the first main counting circuit 4 and the dual-purpose auxiliary counting circuit 6, and the first main counting circuit 4
The count value is stored as the count value of the dual-purpose auxiliary counting circuit 6. The second hand stops at the 0 second position, and the count value of the dual-purpose auxiliary counting circuit 6 is post-processed, indicating that the mode has switched from normal time to alarm time.The same number of post-processing signals are sent to the first main counting circuit 4. and input to the dual-purpose auxiliary counting circuit 6,
The first main counting circuit 4 is stored, and the dual-purpose auxiliary counting circuit 6 is set on OFIJ.

第2機能計数回路は分信号を計数し、ノーマル時刻の分
、時位置とアラーム時刻の分、時位置との差を計数、し
ている。秒情報の後処理が終了し、兼用補助計数回路6
が0にリセットサれると、分、時針の早送り切替が始ま
る。第2主計数回路5の計数値に応じて第2駆動回路8
から分針、時針をアラーム時刻位置へ早送り駆動する駆
動パルスカー出力される。この時第2主計数回路5と兼
用補助計数回路6へ同数の信号が加算又は減算されて、
The second functional counting circuit counts the minute signal and counts the difference between the minute and hour position of the normal time and the minute and hour position of the alarm time. After the second information post-processing is completed, the dual-purpose auxiliary counting circuit 6
When is reset to 0, the minute and hour hands start to change rapidly. The second drive circuit 8 according to the count value of the second main counting circuit 5
A driving pulse is output from the clock to fast-forward the minute and hour hands to the alarm time position. At this time, the same number of signals are added or subtracted to the second main counting circuit 5 and the dual-purpose auxiliary counting circuit 6,
.

第2主計数回路5の計数値が、兼用補助計数回路6の計
数値として保存さ八る。分針、時針はアラーム時刻位置
で停止し、アラーム設定時刻を表示する。同数の後処理
信号が兼用補助計数回路6、第2主計数回路5Vc入力
し、兼用補助計数回路6に保存されていた計数値が第2
主計数回路5VC移され、兼用補助計数回路6はOIC
IJ上セツトれる。
The count value of the second main counting circuit 5 is saved as the count value of the dual-purpose auxiliary counting circuit 6. The minute hand and hour hand stop at the alarm time position and display the alarm setting time. The same number of post-processing signals are input to the dual-purpose auxiliary counting circuit 6 and the second main counting circuit 5Vc, and the count value stored in the dual-purpose auxiliary counting circuit 6 is input to the second main counting circuit 5Vc.
The main counting circuit 5VC is moved, and the dual-purpose auxiliary counting circuit 6 is OIC.
It can be set on IJ.

秒針は64 Hz  で駆動されると1秒以内に0秒位
置へ早送りされるため、秒針と時、分針が同時に駆動さ
れなくても不便はない。アラームモードでリューズ式ス
イッチ14は1段引きして、回転するとアラーム時刻が
第2モータ1oの回転数Vこ応じて修正され、それに応
じて第2主計数回路5の計数値が修正される。アラーム
モードでリューズ式スイッチ14を押すとアラーム時刻
モードよりノーマル時刻モードへ切替り、前と同様c、
it主計数回路4と兼用補助計数回路6との間で計数処
理を行ない、秒針をノーマル時刻の秒位置へ早送り駆動
し、第2主計数回路5と兼用補助計数回路6との間で計
数処理を行ない、時、分針をノーマル時刻の時、分位置
へ早送り駆動する。
When the second hand is driven at 64 Hz, it is quickly advanced to the 0 second position within one second, so there is no inconvenience even if the second hand, hour, and minute hands are not driven at the same time. In the alarm mode, the crown switch 14 is pulled down one step and when rotated, the alarm time is corrected according to the rotational speed V of the second motor 1o, and the count value of the second main counting circuit 5 is corrected accordingly. Pressing the crown switch 14 in alarm mode switches from alarm time mode to normal time mode, and as before, c,
It performs counting processing between the main counting circuit 4 and the dual-purpose auxiliary counting circuit 6, fast-forwards the second hand to the second position of the normal time, and performs counting processing between the second main counting circuit 5 and the dual-purpose auxiliary counting circuit 6. and move the hour and minute hands to the normal hour and minute positions.

第2図は本発明の2モ一タアラーム機能1時、)1の制
御切替回路及び機能計数回路の主鮫部の具体的な回路図
である。妙計時回路(秒針と略す)24は60を計数で
きるアップカウンタで構成され、第1図の第1主計数回
路4に相当する。分計時回路(分針と略す)25は72
0を計数できるアップカウンタで構成され、第1図の第
2 ニーf=計数回路5に相当する。補助計数回路(補
訂と略す)26は60及び720を計数できるアップカ
ウンタで構成され、第1図の兼用補助計数回路に相当す
るっ入力端21はオールリセット信号の入力端である。
FIG. 2 is a detailed circuit diagram of the main parts of the control switching circuit and function counting circuit of the two-monitor alarm function 1 of the present invention. The fine timing circuit (abbreviated as second hand) 24 is composed of an up counter capable of counting 60, and corresponds to the first main counting circuit 4 in FIG. The minute clock circuit (abbreviated as minute hand) 25 is 72
It is composed of an up counter that can count 0, and corresponds to the second knee f=counting circuit 5 in FIG. The auxiliary counting circuit (abbreviated as correction) 26 is composed of an up counter capable of counting 60 and 720, and the input terminal 21 corresponding to the dual-purpose auxiliary counting circuit in FIG. 1 is the input terminal for the all-reset signal.

入力端2Bはモード切替スイッチ信号の入力端である。The input terminal 2B is an input terminal for a mode changeover switch signal.

入力端29は秒信号の入力端である。The input terminal 29 is an input terminal for a seconds signal.

入力端30は分信号の入力端である。入力端31は64
 Hz 信号の入力端である。入力端32は1024H
z信号の入力端である。出力端33は第1駆動回路7へ
の出力端である。出力端34は第2駆動回路8への出力
端である。制御切替回路3の主要部は図示されたように
RSフリップフロップ゛35.36.31.38とゲー
ト類か「)構成されている。次に制御切替回路3及び機
能計数回路の計数処理、制御方法、駆動パルスの出方方
法について述べる。リューズ式スイッチ14を押すとス
イッチ制御回路16よりモード切替スイッチ信号が出力
され入力端28にセット信号が入力し、RSフリップノ
ロツブ35の出力Qが“H“になり、秒針24、補訂2
6に入力端31より64Hz信号が入力し、出力′;4
33から64 Hz 信号が出力される。秒針24の記
憶されていた計数値例えば37より60VCなるまで2
3パルスの64 Hz信号が入力すると、秒針24はO
VCリセットされ、RSフリップフロップ35がリセッ
トされその出力Qが# t、 // VCなる。すると
64 Hz 信号の入力は停止される。その間に出力端
33がも64 Hzで23パルスが出力され、秒針が2
3秒正転駆動され、O秒位置で停止し、アラームモード
に切替ったことを表示する。同時にRSクリップフロッ
プ36がセットされその出力Qが“H“になり秒針24
、補計26VC入力端32より1024 Hz信号が入
力し、補訂26に記憶されていた計数値23より60に
なるまで37パルスの102 =IHz。
The input terminal 30 is an input terminal for the minute signal. Input end 31 is 64
This is the input terminal for Hz signals. Input end 32 is 1024H
This is the input terminal for the z signal. The output terminal 33 is an output terminal to the first drive circuit 7. The output terminal 34 is an output terminal to the second drive circuit 8. As shown in the figure, the main parts of the control switching circuit 3 are composed of RS flip-flops (35, 36, 31, 38) and gates.Next, the counting processing and control of the control switching circuit 3 and the functional counting circuit are performed. The method and method of outputting the drive pulse will be described below. When the crown switch 14 is pressed, the switch control circuit 16 outputs a mode changeover switch signal, a set signal is input to the input terminal 28, and the output Q of the RS flip knob 35 is "H", second hand 24, correction 2
A 64Hz signal is input from the input terminal 31 to 6, and the output ';4
A 33 to 64 Hz signal is output. 2 until the stored count value of the second hand 24 becomes 60VC from 37, for example.
When a 3-pulse 64 Hz signal is input, the second hand 24 turns O.
VC is reset, the RS flip-flop 35 is reset, and its output Q becomes #t, // VC. Then, the input of the 64 Hz signal is stopped. In the meantime, the output terminal 33 also outputs 23 pulses at 64 Hz, and the second hand moves to 2.
It is driven forward for 3 seconds, stops at the 0 seconds position, and displays that it has switched to alarm mode. At the same time, the RS clip-flop 36 is set and its output Q becomes "H", and the second hand 24
, a 1024 Hz signal is input from the supplementary 26 VC input terminal 32, and 37 pulses of 102 = IHz are applied until the count value 23 stored in the correction 26 reaches 60.

信号が後処理信号として入力する。補訂26:ま60に
到達するとリセット信号が出力され、補訂26はOにリ
セットされ、RSフリップフロップ36がリセットされ
、その出力Qが“L // yなり、1024 Hz 
の後処理信号の入力は停止される。
The signal is input as a post-processed signal. Correction 26: When reaching 60, a reset signal is output, correction 26 is reset to O, the RS flip-flop 36 is reset, and its output Q becomes "L // y," 1024 Hz.
The input of the post-processing signal is stopped.

秒針24は最初の計数値37を記憶していることになる
。RSフリップフロップ36がリセットされると同時V
C,RSフリップフロップ3γθ)セント信号が入力し
、その出力Qが“H″となり、分計25、補訂26に入
力端31より64 Hz 信号が入力し、出力端34か
ら64 Hz 信号が出力される。分計25の記憶され
ていた計数値・+lえば700より720になるまで2
0パルスの64Hz信号が入力すると分計25はOK 
II上セツトれ、RSクリップフロップ3γがリセット
されその出力Qが“L″になる。すると64 Hz 信
号の入力は停止される。その間に出力端34から64H
zで20パルスが出力され、分針、時針が20分正“転
駆動され、ノーマル時刻より20分進み、アラ−ム時刻
を表示する。と同時にRSフリップフロップ38がセッ
トされその出力Qが“H“になり分計25、補訂26に
入力端32より1024Hzの後処理信号が入力する。
The second hand 24 stores the initial count value 37. At the same time when the RS flip-flop 36 is reset, V
C, RS flip-flop 3γθ) cent signal is input, its output Q becomes “H”, 64 Hz signal is input from input terminal 31 to minute total 25 and correction 26, and 64 Hz signal is output from output terminal 34. be done. The memorized count value of minute total 25 ・+l is 2 until it becomes 720 from 700
If a 64Hz signal with 0 pulses is input, the minute total of 25 is OK.
II is set, the RS clip-flop 3γ is reset and its output Q becomes "L". Then, the input of the 64 Hz signal is stopped. During that time, output terminal 34 to 64H
z outputs 20 pulses, causing the minute and hour hands to rotate forward by 20 minutes, advancing 20 minutes from the normal time and displaying the alarm time. At the same time, the RS flip-flop 38 is set and its output Q becomes "H". A post-processed signal of 1024 Hz is input from the input terminal 32 to the minute meter 25 and correction 26.

補訂26は20を計数している力t700のパルスが入
力すると、その計数値は720に到達し、補訂26はO
にリセットされ、RSフリップフロップ38もリセット
され出力Qは“L″になり1024 Hz の後処理信
号の入力は停止される。分計25は最初の計数値700
を記憶していることになる。アラーム時刻モードよりノ
ーマル時刻モードへの早送り切替も、秒針24の計数値
、分計25の計数値を用い、お互いに補訂26との間で
計数処理を行なうことによりできる。この場合には10
24 Hz 信号を前処理信号として秒針24と補訂2
6又は分計25と補訂26に同時に同数人力することに
より各計数値を補訂26の残り計数値にしてから、その
残り計数値に相当する数のパルスを64 Hz の駆動
パルスとして出力することにより、秒針をノーマル時刻
の秒位置へ早送り駆動し、その後、分針、時針をノーマ
ル時刻の分、時位1斤へ早送りW<動することができる
。この制御系について一丁説明が複雑になるため割愛し
た。又、早送り切替申し′こおげろ時計信号の割り込み
も計数処理と駆動パルスの出力を制御すればできるが、
ここでは省略するっ2モ一タアラーム機能時計の詳細な
説明については省略する。
The correction 26 counts 20. When a pulse of force t700 is input, the count reaches 720, and the correction 26 counts 20.
, the RS flip-flop 38 is also reset, the output Q becomes "L", and the input of the 1024 Hz post-processing signal is stopped. Minute total 25 is the initial count value 700
will be remembered. Fast-forward switching from the alarm time mode to the normal time mode can also be performed by using the count value of the second hand 24 and the count value of the minute counter 25 and performing counting processing between them and the correction 26. In this case 10
Second hand 24 and correction 2 using 24 Hz signal as preprocessed signal
6 or the same number of people apply power to the minute total 25 and correction 26 at the same time to make each count value into the remaining count value of correction 26, and then output the number of pulses corresponding to the remaining count value as 64 Hz drive pulses. By doing so, the second hand can be fast-forwarded to the second position of the normal time, and then the minute and hour hands can be fast-forwarded W< to the minute and hour positions of the normal time. I have omitted the explanation of this control system because it would be complicated. In addition, interrupting the fast-forward switching request by the clock signal can be done by controlling the counting process and the output of the drive pulse.
A detailed explanation of the two-monitor alarm function clock will be omitted here.

第3図は本発明の別の実施例を示すブロック図で機能計
数回路はアラーム機能主計数回路41、別時刻(デュア
ルタイム)機能主計数回路42、クロノグラフ機能主計
数回路43.タイマー% 能事計数回路44、ゲーム機
能主計数回路45、多機能補助計数回路46から構成さ
れ、駆動回路47はモータ48を駆動し、アナログ表示
機構11を駆動する。この実施例では多機能補助計数回
路46は5つの機能のそれぞれの主計数回路との間で計
数処理を行ない、アナログ表示機構11を切替表示する
。機能は温度、湿度等の時刻系以外のものでも良い。
FIG. 3 is a block diagram showing another embodiment of the present invention, in which the functional counting circuits include an alarm function main counting circuit 41, a dual time function main counting circuit 42, a chronograph function main counting circuit 43. Timer % It is composed of an event counting circuit 44, a game function main counting circuit 45, and a multi-function auxiliary counting circuit 46, and a drive circuit 47 drives a motor 48 and drives an analog display mechanism 11. In this embodiment, the multi-function auxiliary counting circuit 46 performs counting processing with the main counting circuits of each of the five functions, and the analog display mechanism 11 switches the display. The functions may be other than time-related functions such as temperature and humidity.

実施例ではアップダウンカラ/り、アンプカラ/りを用
いたが、プリセットタイプのアップダウ/カウンタを用
いても良いことは明白であり、モータも正転、逆転可能
な正逆モータの方が切替時間も短く、便利である。1モ
ータ、2モータ以外に、3モ一タ以上のシステムでも良
い。
In the example, an up/down collar/ri and an amplifier collar/ri were used, but it is clear that a preset type up/down/counter may also be used, and a forward/reverse motor that can rotate forward and reverse will have a shorter switching time. It is also short and convenient. In addition to one motor or two motors, a system with three or more motors may also be used.

以上のように本発明により、時間基準の、分周回路、駆
動回路、電気−機械変換器、指針よりなるアナログ表示
機構、主計数回路及び補助計数回路からなる機能計数回
路、制御切替回路、外部操作部材から構成される指針式
多機能時計において、機能計数回路は複数の機能を計数
する複数の主計数回路及び複数の機能にわたり兼用して
計数される兼用補助計数回路から構成され、複数の主計
数回路は各機能の計数値を記憶し、機能切替表示する際
に、複数の主計数回路と兼用補助計数回路との間で計数
処理を行ない、機能切替表示に必要な駆動パルスを駆動
回路より出力し、電気−機械変換器を早送り駆動し、ア
ナログ表示機構を駆動することにより、指針式時計の多
機能化が実現し、ICのチップサイズも小さくなり、信
頼性向上をもたらし本発明の効果は大きい。
As described above, the present invention provides a time-based frequency dividing circuit, a drive circuit, an electro-mechanical converter, an analog display mechanism consisting of a pointer, a functional counting circuit consisting of a main counting circuit and an auxiliary counting circuit, a control switching circuit, an external In a pointer type multi-function watch composed of operating members, the function counting circuit is composed of a plurality of main counting circuits that count multiple functions and a dual-purpose auxiliary counting circuit that counts multiple functions. The counting circuit memorizes the count value of each function, and when displaying the function switching, performs counting processing between the multiple main counting circuits and the dual-purpose auxiliary counting circuit, and sends the drive pulses necessary for the function switching display from the drive circuit. By outputting the output, fast-forwarding the electro-mechanical converter, and driving the analog display mechanism, the pointer-type timepiece becomes multifunctional, the IC chip size is reduced, and reliability is improved, which is the effect of the present invention. is big.

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本発明の一実施例を示し、第1図は2モ一タアラ
ーム時計のシステムブロック図。第21(イ)は主要部
の具体的な回路図。第3図は別の実施例を示すシステム
ブロック図であるっ 4・・・第1主計数回路、5・・・第2主計数回路、6
・・・兼用補助計数回路、9・・・第1モータ、10・
・・第2モータ、11・・・アナログ表示機構。 特許出願人  シチズン時計株式会社
The drawings show one embodiment of the present invention, and FIG. 1 is a system block diagram of a two-motor alarm clock. The 21st (a) is a specific circuit diagram of the main part. FIG. 3 is a system block diagram showing another embodiment. 4...First main counting circuit, 5...Second main counting circuit, 6
... Dual-purpose auxiliary counting circuit, 9... First motor, 10.
...Second motor, 11...Analog display mechanism. Patent applicant Citizen Watch Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] (1)時間基準源、分周回路、駆動回路、電気−機械変
換器、指針よりなるアナログ表示機構、主計数回路及び
補助計数回路からなる機能計数回路、制御切替回路、外
部操作部材から構成される指針式多機能時計[8いて、
前記機能計数回路は複数の機能を計数する複数の主計数
回路及び複数の機能にわたり兼用して計数される兼用補
助計数回路から構成され、前記複数の主計数回路は各機
能の計数値を記憶し、機能切替表示する際に、前記複数
の主計数回路と前記兼用補助計数回路との間で計数処理
を行ない、機能切替表示に必要な駆動パルスを前記駆動
回路より出力し、前記電気−機械変換器を早送り駆動し
、前記アナログ表示機構を駆動することを特徴とする指
針式多機能時計。
(1) Consists of a time reference source, a frequency dividing circuit, a drive circuit, an electro-mechanical converter, an analog display mechanism consisting of a pointer, a functional counting circuit consisting of a main counting circuit and an auxiliary counting circuit, a control switching circuit, and external operating members. pointer type multi-function watch [8
The functional counting circuit includes a plurality of main counting circuits that count a plurality of functions and a dual-purpose auxiliary counting circuit that performs counting across a plurality of functions, and the plurality of main counting circuits store count values of each function. , when performing function switching display, counting processing is performed between the plurality of main counting circuits and the dual-purpose auxiliary counting circuit, driving pulses necessary for function switching display are output from the driving circuit, and the electro-mechanical conversion is performed. 1. A pointer-type multi-function watch characterized by fast-forwarding a watch and driving the analog display mechanism.
JP9914881A 1981-03-27 1981-06-26 Pointer type multifunctional clock Pending JPS58790A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP9914881A JPS58790A (en) 1981-06-26 1981-06-26 Pointer type multifunctional clock
US06/361,226 US4470706A (en) 1981-03-27 1982-03-24 Analog type of electronic timepiece
GB08208843A GB2102601B (en) 1981-03-27 1982-03-25 Analog type of electronic timepiece

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9914881A JPS58790A (en) 1981-06-26 1981-06-26 Pointer type multifunctional clock

Publications (1)

Publication Number Publication Date
JPS58790A true JPS58790A (en) 1983-01-05

Family

ID=14239601

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9914881A Pending JPS58790A (en) 1981-03-27 1981-06-26 Pointer type multifunctional clock

Country Status (1)

Country Link
JP (1) JPS58790A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5458472A (en) * 1977-09-27 1979-05-11 Berney Sa Jean Claude Electronic watch
JPS5499472A (en) * 1978-01-23 1979-08-06 Seiko Epson Corp Analog type alarm watch
JPS562582A (en) * 1979-06-22 1981-01-12 Seiko Epson Corp Analog type electronic watch

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5458472A (en) * 1977-09-27 1979-05-11 Berney Sa Jean Claude Electronic watch
JPS5499472A (en) * 1978-01-23 1979-08-06 Seiko Epson Corp Analog type alarm watch
JPS562582A (en) * 1979-06-22 1981-01-12 Seiko Epson Corp Analog type electronic watch

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