JPS586137A - Forming method for insulating film onto compound semiconductor - Google Patents
Forming method for insulating film onto compound semiconductorInfo
- Publication number
- JPS586137A JPS586137A JP56103963A JP10396381A JPS586137A JP S586137 A JPS586137 A JP S586137A JP 56103963 A JP56103963 A JP 56103963A JP 10396381 A JP10396381 A JP 10396381A JP S586137 A JPS586137 A JP S586137A
- Authority
- JP
- Japan
- Prior art keywords
- compound semiconductor
- temperature
- reaction gas
- infrared
- compound
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/48—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation
- C23C16/481—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating by irradiation, e.g. photolysis, radiolysis, particle radiation by radiant heating of the substrate
Abstract
Description
【発明の詳細な説明】
不発−は^kKて分解しやすい化合物半導体上に絶縁@
f:形成する化学的気相成長法に関すゐ・砒化ガリウム
(GaAs )を用−たシ■ットキーバリアゲート電昇
効果トランジスタ(ME8PET )は現在、マイクロ
波通信横器における中心デバイスとして使用されている
・辺部、このGaAsM18FETとG、A、ダイオー
ド等を一部子上Kf&積化しGb口信号を処理しうる集
積回路(ic)。[Detailed description of the invention] Unexploded is insulated on a compound semiconductor that is easily decomposed at
f: Chemical vapor deposition method Schottky barrier gate electrophoresis effect transistor (ME8PET) using gallium arsenide (GaAs) is currently used as a central device in microwave communication transducers. On the other hand, this GaAsM18FET and G, A, diodes, etc. are integrated on one part to form an integrated circuit (IC) that can process Gb signals.
II#に高速ロジックやメ七りの開発が活発に行なわれ
、これらのGaAm l Ct−用いて計算機のdli
1速化や通信システムの高性能化が奥現できる可能性が
でてきた・
G、A、 I Cの量産を実現するためには、 GaA
slCo榊成豐素であシ能動素子として用いられるPE
Tのスレッショールド電圧(■りを均一に再現性よく作
る。仁とが重要である。このV!の均一性を可能にする
方法としてシリコン(8i)vtl@いたICと同様に
、イオン注入法による不純物添加が試みられて−る。イ
オン容入法によシ添加された不純物を活性化させる丸め
KQ不−物を注入され九組やC1r、h畠基板は通常、
高温で7ニールされる。しかしながらGaAsは8ムと
異な)、過當Oアニール温度である700〜950℃で
は分解し結晶組成がくずれる。従りて一般KGaAsを
7ニールする場合には、 G@A@の分解を防ぐ丸め、
Ga&5AIflK二酸化シリコン(atへ)や窒化
シリコン(81,N、)を被着して行逐う、しかしなが
ら8i0sは通常のアニール温[においてはG、ム$の
構成元素であるGMに対して障Il性がな(、1910
g中にG、が拡散し、8i(J、とGaAs #FII
におけるGaAsの化学組成′に保持することができな
−・従って。In II#, high-speed logic and mechari were actively developed, and using these GaAm l Ct-
There is now the possibility of increasing the speed and improving the performance of communication systems.In order to realize mass production of G, A, and IC, GaA
PE used as an active element in slCo Sakaki
It is important to make the T threshold voltage (■) uniformly and reproducibly.As a method to make this V! uniformity possible, ion implantation is used, similar to silicon (8i) VTL@ ICs. Attempts have been made to add impurities by the ion implantation method.Nine groups, C1r, h Hatake substrates are usually implanted with rounded KQ impurities that activate the impurities added by the ion implantation method.
It is heated for 7 cycles at high temperature. However, GaAs (different from 8 μm) decomposes at an excessive O annealing temperature of 700 to 950° C. and the crystal composition is disrupted. Therefore, when general KGaAs is 7-nieled, rounding to prevent decomposition of G@A@,
Ga&5AIflK silicon dioxide (at) or silicon nitride (81,N,) is deposited. However, 8i0s is a hindrance to GM, which is a constituent element of G and Mu$, at normal annealing temperatures. Gana (, 1910
G, diffuses in g, and 8i (J, and GaAs #FII
Therefore, the chemical composition of GaAs cannot be maintained at .
低消貴慝力のQaム5lcO@all素であるノーマリ
オフfi )’ k ’i’は一般に500〜800ム
の01人S表m層を用いる九めに、GaムS表面の化学
組成の乱れは、ノーマリオア皺FE嘗の性能を劣化させ
る―またノーマリオフ鑞)’ g TのV!における均
一性。Normally off fi)'k'i', which is a Qam5lcO@all element with low energy consumption, is generally 500 to 800 μm. will degrade the performance of normally lower wrinkles FE嘗-also normally off)' g T's V! Uniformity in.
再ma4hよくなり、一方、(jaAsK被wさnる8
内mP144as常thsocxb 7ooctでの温
度にお−て化学的気相成長法により成長される@ Ga
Asを鋏・50から700℃機度の温Il!に昇sIさ
せる九めには一般にホットウォール反応管あるiはマイ
ク12波−4加熱法が用いられるが、これらO方法にお
いては親電の温度までGa人Sが昇温するまでKIOか
ら30分、iI!直の時間を畳する・G、A、は500
℃以上のat匿においては分解しはじめる丸め前記の昇
温方法では8輸攬成長前KGaAsの分解が起り、 u
aAs表面の化学組成を乱してしまう欠点がある。従り
てGaム$上に絶aIIを被着しアニールする場合には
、絶縁膜の被着時およびアニール時に可能な限りuaA
sの分解を防ぐ手段を講じることが大切である。Rema4h gets better, while (jaAsK suffers nuru 8
Ga grown by chemical vapor deposition at a temperature of 70 oct.
As with scissors, the temperature of the machine is 50 to 700℃! Generally, a hot wall reaction tube is used to raise the temperature to sI, but in these O methods, it takes 30 minutes from KIO to raise the temperature of Ga to the temperature of the parent electrode. , iI!・G, A, 500 to fold shift time
In the temperature raising method described above, decomposition of KGaAs occurs before growth, and u
It has the disadvantage of disturbing the chemical composition of the aAs surface. Therefore, when depositing and annealing a Ga film on a Ga film, it is necessary to reduce the uaA as much as possible during the deposition and annealing of the insulating film.
It is important to take measures to prevent the decomposition of s.
本発明の目的は、イオン注入され九化合物牛4体のアニ
ール時の該#p4体に対する保#Ik@、hるいはイオ
ン注入時の化合物+4体の保a−の形成に有効な化合物
半導体上に絶縁膜を形成する方法を提供するととKめる
・
本発明によれば、化合物#P4体を内蔵保持する反応管
内に反応ガスt−畳入し丸畿、該化合物牛導体’tiL
mK、およびまたは、皺化合物手4体を支持する保持台
を通して1反応管の外部よ襲反射板を有する赤外−管に
よ〕加熱して、該化合物#P1体を昇温せしめ絶縁−を
形成することを検値とする化合物半導体上に絶縁■を形
成する方法が得られる・
この成員方法により、絶縁誤成長前における化合物0体
の分解は最小にすることが可能に’&j)アニール後の
イオン注入された化合物半導体の特性を良好に保りこと
ができる。The object of the present invention is to provide a compound semiconductor material which is effective in forming a retention force for the #p4 body during annealing of four ion-implanted nine compound bodies, or a retention force for the compound +4 body during ion implantation. According to the present invention, a reaction gas is injected into a reaction tube containing compound #P4, and then the compound #P4 is heated.
mK and/or by an infrared tube having an external reflection plate of one reaction tube through a holding table supporting four wrinkled compound hands to raise the temperature of the compound #P1 and insulate it. A method for forming an insulation ■ on a compound semiconductor whose test value is the formation of the compound semiconductor can be obtained. With this member method, it is possible to minimize the decomposition of the compound 0 before the insulation is erroneously grown.'&j) After annealing The characteristics of the ion-implanted compound semiconductor can be maintained well.
次に1本発明の方法を図會用いて説明する。Next, one method of the present invention will be explained with reference to the drawings.
l[1図は本発明の化学的気相成長法の腺場を説明する
丸めの園である。第1#Aにおいてlは赤外−の反射板
、2は赤外−管、3は反応管、4は反応ガス°導入口5
を持つステンレスウィルソンシール、・は排気カス排出
ロアを持つステンレス製ウィルソンシールであL 8は
例えばカーボン製)保持台であり、保持台8上に化合物
半導体9が絶縁属を被着せしめる面を上にして乗せられ
ている自第tallの装置において、まず反応ガス導入
口5よjillえdモノシラン(8i)Ja)とアンモ
ニア(MHI)と窒素ガス(N、)とより成る反応ガス
を反応管3内に導入し1反応管内を反応ガスで満すと共
に反応ガスを導入しつづ妙る・この時化合物半纏体の温
度は200℃以下に保たれる九めに、反応ガスは反応し
て84sN4を成長させることはない、11丸化合物″
P4体も分解することは1kvh・次に、赤外−管に*
mを流し赤外−を放射せしめる。赤外−管2より放射さ
れ九赤外−の一部は反射板IKより反射され、−の赤外
−はII摘に保持台8.および化合−半導体9に歯九9
.保持台8および化合物半導体9′に繊状され、化合物
半導体9の@直は急上昇し、30秒以下で窒化@O威長
一度でるる650℃から700Cのii直に達し、同時
に化合物半導体上に−えば8i 、 N4義が成長する
・亀2−に、赤外−管を纂l−に示すように上下各4本
1合計8本期いて、2.4KVV42)111力で化合
物半導体G暑ム$を厚さ6■O力−ボン111保持台の
上で昇温せしめ走時の、化合物!P畳体の昇温カーブを
示す、嬉2TIJにおいて縦−は温度上℃で示し、横軸
は時間を秒で示す、鶴gallの昇温カーブの時、81
桟:hに:N諺−1 : 20 : 300のガス龜量
比を有する反応オスを崩いて8i−塊を4jlAg上に
成“長せし−た場合081sN、Oji長途直にlOO
ム/秒てあり九・藤2−に示すように、500℃よシフ
00℃まで昇温する時間は10秒以下に押えられる九め
に、 8!、N、成長*()GaAsの分解社無視しう
る。1九、 G、A、の昇温時にお匹ても反応管内KF
i反応ガスが流れているため成長速度は遅いながらも0
1人$表rIMK81aNsは成長してお〕、このGa
Asの昇温時に成長した5i1N、も(x51A@の分
解を押える役割を紘えす利点を本発明になる化学的気相
成長法は持っている・
lI2図に示すごとき昇温カーブは赤外線管で消費され
る電力と赤外鍼管と保持台との距離を変えることによル
任意に変態しうる。筐九纂1図に示す反射板1#i赤外
−の散逃を防ぎ、鮪2図に示す昇温カーブを急カーブに
する利点を有する。1 [Figure 1 is a rounded garden explaining the field of the chemical vapor deposition method of the present invention. In the first #A, l is an infrared reflector, 2 is an infrared tube, 3 is a reaction tube, 4 is a reaction gas inlet 5
L8 is a stainless steel Wilson seal with an exhaust gas discharge lower, L8 is a holding stand (made of carbon, for example), and a compound semiconductor 9 is placed on the holding stand 8 with the surface on which the insulating metal is applied facing upward. In the tall apparatus installed in the reactor tube 3, a reactant gas consisting of monosilane (8i), ammonia (MHI), and nitrogen gas (N) is first introduced into the reactor tube 3 through the reactant gas inlet 5. Fill the inside of the reaction tube with the reaction gas and continue to introduce the reaction gas.At this time, the temperature of the compound semi-solid body is kept below 200℃.Ninth, the reaction gas reacts and produces 84sN4. 11-round compound that will not grow”
It takes 1 kvh to decompose the P4 body.Next, to the infrared tube*
Flow m to emit infrared light. A part of the nine infrared rays emitted from the infrared tube 2 is reflected by the reflection plate IK, and the second infrared ray is reflected by the holding table 8. and compound-semiconductor 9 to teeth 9
.. The temperature of the compound semiconductor 9 rises rapidly and reaches a temperature of 650° C. to 700° C., where the nitriding temperature reaches 700° C., in less than 30 seconds. -For example, when N4 is grown, the infrared tubes are placed in the upper and lower sections, 4 each, for a total of 8 tubes, as shown in Figure 2, and the compound semiconductor G heat beam is heated at 2.4KVV42)111 force. Compound during running when $ is heated to a thickness of 6 ■ O force - Bon 111 on a holding table! In 2TIJ, which shows the temperature rise curve of the P tatami body, the vertical axis shows the temperature in °C, and the horizontal axis shows the time in seconds.
Cross: h: N Proverb - If a reaction male with a gas volume ratio of 1:20:300 is broken and an 8i-clump is grown on 4jlAg, 081sN, Oji will be 1OO in a long time.
As shown in 9. Fuji 2-, the time required to raise the temperature from 500℃ to 00℃ can be kept to less than 10 seconds. 8! , N, growth*() The decomposition of GaAs is negligible. 19. KF in the reaction tube when increasing the temperature of G and A.
i Although the growth rate is slow because the reaction gas is flowing, it is 0.
1 person $ table rIMK81aNs has grown], this Ga
The chemical vapor deposition method of the present invention has the advantage of suppressing the decomposition of 5i1N grown when As is heated (x51A@). By changing the power consumed and the distance between the infrared acupuncture tube and the holding stand, the needle can be transformed arbitrarily. This has the advantage of making the temperature rise curve shown in the figure a sharp curve.
本発明の原理は8i、N、やf!$i(J、のみでなく
、他の絶縁皺の成長にも利用しうるし、またG、ム8以
外t) I n Pμha)?等のjli&温において
分解しやすい化合物半導体に一利用てきることは言うま
でもない1The principle of the present invention is 8i, N, and f! It can be used not only for the growth of other insulating wrinkles, but also for the growth of other insulating wrinkles other than G and Mu8) I n Pμha)? Needless to say, it can be used for compound semiconductors that easily decompose at high temperatures such as 1
lI1図は本発明の原理をm1lIするためのm、菖2
図は1111図において化合物半導体を昇温せしめたと
きの昇温カーブを示す。
、図において、lは赤外−の反射板、2は赤外−管、3
は反応管、4.6はウィルソンシール、5は反応ガス導
入口、7は排気ガス排出0.8は保持台、9は化合物半
導体である・
第1図
3F、2 図
一→峙M(砂)Figure 1 shows the principle of the present invention.
The figure shows a temperature rise curve when the temperature of the compound semiconductor is raised in figure 1111. In the figure, l is an infrared reflector, 2 is an infrared tube, and 3 is an infrared reflector.
is the reaction tube, 4.6 is the Wilson seal, 5 is the reaction gas inlet, 7 is the exhaust gas discharge 0.8 is the holding table, and 9 is the compound semiconductor. )
Claims (1)
導入した後該化合物#P4体を直接に、およびまたは該
化合物半導体を支持する保持台を通して1反応管の外部
より反射板を有する赤外−管によ)加熱して、該化合物
半導体を昇温せしめ絶縁II&を形成することを特徴と
する化合物半導体上に絶縁lIKを形成する方法。 2)反応管内の気圧が1気圧未満である特許請求のmf
sm1項記載の化合物半導体上に絶縁Il[′に形成す
る方法。[Claims] l) After introducing a reaction gas into a reaction tube that implodes and holds a compound semiconductor, the compound #P4 body is introduced directly and/or from the outside of one reaction tube through a holding table that supports the compound semiconductor. A method for forming an insulation IIK on a compound semiconductor, characterized in that the compound semiconductor is heated (by an infrared tube having a reflector) to raise the temperature of the compound semiconductor to form an insulation II&. 2) The claimed mf in which the pressure inside the reaction tube is less than 1 atm.
A method for forming an insulating layer Il[' on the compound semiconductor described in sm1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56103963A JPS586137A (en) | 1981-07-03 | 1981-07-03 | Forming method for insulating film onto compound semiconductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56103963A JPS586137A (en) | 1981-07-03 | 1981-07-03 | Forming method for insulating film onto compound semiconductor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS586137A true JPS586137A (en) | 1983-01-13 |
Family
ID=14368023
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56103963A Pending JPS586137A (en) | 1981-07-03 | 1981-07-03 | Forming method for insulating film onto compound semiconductor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS586137A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0162111A1 (en) * | 1983-11-23 | 1985-11-27 | Gemini Research, Inc. | Method and apparatus for chemical vapor deposition |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5710240A (en) * | 1980-06-20 | 1982-01-19 | Sony Corp | Forming method of insulating film |
-
1981
- 1981-07-03 JP JP56103963A patent/JPS586137A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5710240A (en) * | 1980-06-20 | 1982-01-19 | Sony Corp | Forming method of insulating film |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0162111A1 (en) * | 1983-11-23 | 1985-11-27 | Gemini Research, Inc. | Method and apparatus for chemical vapor deposition |
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