JPS5856449A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5856449A
JPS5856449A JP56155688A JP15568881A JPS5856449A JP S5856449 A JPS5856449 A JP S5856449A JP 56155688 A JP56155688 A JP 56155688A JP 15568881 A JP15568881 A JP 15568881A JP S5856449 A JPS5856449 A JP S5856449A
Authority
JP
Japan
Prior art keywords
lead frame
resin
semiconductor element
epoxy resin
sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56155688A
Other languages
Japanese (ja)
Inventor
Muramasu Oomori
大森 村益
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56155688A priority Critical patent/JPS5856449A/en
Publication of JPS5856449A publication Critical patent/JPS5856449A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582Metallic layers on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To improve the adherence of a semiconductor element to a lead frame made of conductive resin and moisture resistance of the element by mounting the element on the frame, sealing and assembling it with resin. CONSTITUTION:A lead frame is formed by thermally molding epoxy resin mixed with ultrafine metal powder, a silver paste and epoxy resin. Then, metal plating of nickel, silver, or gold is performed on an external terminal soldered part 5 to be soldered to a printed board after assembling, or a thin metal plate is coated. A semiconductor element 6 is mounted on the semiconductor element mount, connecting wirings are bonded between the electrodes of the element 6 and the wiring bonding part 2 of the lead frame, the end side of the lead frame including the element 6 and connecting wirings 7 is sealed with sealing resin 8, and the lead frame is isolated into respective semiconductor devices (transistors).

Description

【発明の詳細な説明】 本発明は、装置組立にリードフレームを用い、樹脂封止
した半導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a resin-sealed semiconductor device using a lead frame for device assembly.

樹脂封止型半導体装置に使用されるリードフレームは、
鉄又は銅系の金属を素材とし、金又は銀等のメッキを施
したものを使用している。しかしながら、樹脂封止によ
る半導体装置は、金属リードフレームと封止樹脂の密着
性が劣る事に加え、熱膨張係数の差が大きく、界面よシ
容易に外気中の水分が浸入し半導体装置の特性劣化を生
じる。
Lead frames used in resin-sealed semiconductor devices are
It is made of iron or copper-based metal and is plated with gold or silver. However, in resin-sealed semiconductor devices, in addition to poor adhesion between the metal lead frame and the encapsulating resin, there is a large difference in coefficient of thermal expansion, and moisture from the outside air easily penetrates through the interface, resulting in the characteristics of the semiconductor device. Causes deterioration.

本発明の目的は、上記のような金属リードフレームを用
いた耐湿性の欠点を取シ除いた、信頼性の高い半導体装
置を提供する事である。
An object of the present invention is to provide a highly reliable semiconductor device that eliminates the moisture resistance disadvantages of using a metal lead frame as described above.

本発明の半導体装置は、導電性樹脂からなるリードフレ
ームに半導体素子を取付け、樹脂封止して組立てられた
構成を有する。
The semiconductor device of the present invention has a structure in which a semiconductor element is attached to a lead frame made of a conductive resin, and is assembled by resin-sealing.

一般に、樹脂封止にはエポキシ樹脂が使用されている。Generally, epoxy resin is used for resin sealing.

したがって、エポキシ樹脂と熱膨張係数が近く、密着性
が良い材料としては、エポキシ樹脂自体が最も良いとい
う事になるが、エポキシ樹脂は絶縁物であるからリード
フレーム材としては使用できない。そこで、銀、銅、ニ
ッケル等の微粉末を混合した導電性エポキシ樹脂を使用
することにより、密着性がよくなシ、それと共に密着界
面から水分が浸入するのも防止され耐湿性が向上される
Therefore, epoxy resin itself is the best material with a thermal expansion coefficient close to that of epoxy resin and good adhesion, but since epoxy resin is an insulator, it cannot be used as a lead frame material. Therefore, by using a conductive epoxy resin mixed with fine powders of silver, copper, nickel, etc., it is possible to achieve good adhesion and also prevent moisture from entering through the adhesion interface, improving moisture resistance. .

つぎに本発明を実施例により説明する。Next, the present invention will be explained by examples.

第1図は本発明の半導体装置組立のために用いられる導
電性樹脂製のリードフレームの平面図である。図におい
て、lは半導体素子マウント部、2はワイヤボンディン
グ部、3はリードフレーム補強のためのタイバー、4は
組立時の位置決めおよび自動送シを行うためのガイド穴
、5は外部端子半田付部である。
FIG. 1 is a plan view of a lead frame made of conductive resin used for assembling a semiconductor device of the present invention. In the figure, l is a semiconductor element mounting part, 2 is a wire bonding part, 3 is a tie bar for reinforcing the lead frame, 4 is a guide hole for positioning and automatic feeding during assembly, and 5 is an external terminal soldering part It is.

このようなリードフレームは、例えばつぎのようにして
作られる。すなわち、金属微粉末を加えたエポキシ樹脂
、例えば銀ペーストエボキツ樹脂を加熱成形する。それ
からワイヤボンディング部2、および、組立後プリント
板への半田付を行う外部端子半田付部5に、ニッケル、
銀、金などの金属メッキを施すか、または、金属薄板を
張シ付ける。これらの金属膜被着部は極力狭くすること
により一層の耐湿性が望める。
Such a lead frame is made, for example, as follows. That is, an epoxy resin to which fine metal powder is added, for example, a silver paste epoxy resin, is heated and molded. Then, nickel,
Plating with metal such as silver or gold, or attaching a thin metal plate. Further moisture resistance can be expected by making these metal film-attached parts as narrow as possible.

第2図は本発明の一実施例の上面図である。第2図にお
いて半導体素子マウント部1に半導体素子6がマウント
され、半導体素子6の電極とリードフレームのワイヤボ
ンディング部2との間に接続ワイヤ7がボンディングさ
れ、これら半導体素子6および接続ワイヤ7を含んでリ
ードフレームの先端側が封止樹脂8により封止された後
、リードフレームは個々に分断され個々の半導体装置、
本例ではトランジスタに分離されている。
FIG. 2 is a top view of one embodiment of the present invention. In FIG. 2, a semiconductor element 6 is mounted on a semiconductor element mounting part 1, and connection wires 7 are bonded between the electrodes of the semiconductor element 6 and the wire bonding part 2 of the lead frame, and these semiconductor elements 6 and connection wires 7 are bonded. After the leading end side of the lead frame is sealed with sealing resin 8, the lead frame is separated into individual semiconductor devices,
In this example, it is separated into transistors.

本発明は、導電性および放熱性に関しそれほど必要とし
ないMO8型半導体装置または小信号トランジスタなど
に適用された場合、金属製に比べ幾分導電性の劣る導電
性樹脂の弱点を露呈することなく、その勝社九密着性効
果のみが充分に発揮されるので、この種の半導体装置へ
適用することにより特に顕著な効果が得られる。
When the present invention is applied to MO8 type semiconductor devices or small signal transistors that do not require much in terms of conductivity and heat dissipation, the present invention can be applied to MO8 type semiconductor devices or small signal transistors, etc., without exposing the weaknesses of conductive resin, which is somewhat inferior in conductivity compared to metal. Since only the Katsusha nine adhesion effect is sufficiently exhibited, particularly remarkable effects can be obtained by applying it to this type of semiconductor device.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係るリードフレームの平面図、第2図
は本発明の一実施例の平面図である。 1・・・・・・半導体素子マウント部、2・・・・・・
ワイヤボンディング部、3・・・・・・タイバー、4・
・・・・・ガイド穴、5・・・・・・外部端子半田付部
、6・・・・・・半導体素子、7・・・・・・接続ワイ
ヤ、8・・・・・・封止樹脂。
FIG. 1 is a plan view of a lead frame according to the present invention, and FIG. 2 is a plan view of an embodiment of the present invention. 1... Semiconductor element mount section, 2...
Wire bonding part, 3... Tie bar, 4.
... Guide hole, 5 ... External terminal soldering part, 6 ... Semiconductor element, 7 ... Connection wire, 8 ... Sealing resin.

Claims (1)

【特許請求の範囲】[Claims] 導電性樹脂からなるリードフレームに半導体素子を取り
付は樹脂封止して組立てたことを特徴とする半導体装置
A semiconductor device characterized in that a semiconductor element is attached to a lead frame made of conductive resin and assembled by resin sealing.
JP56155688A 1981-09-30 1981-09-30 Semiconductor device Pending JPS5856449A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56155688A JPS5856449A (en) 1981-09-30 1981-09-30 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56155688A JPS5856449A (en) 1981-09-30 1981-09-30 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5856449A true JPS5856449A (en) 1983-04-04

Family

ID=15611374

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56155688A Pending JPS5856449A (en) 1981-09-30 1981-09-30 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5856449A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62217700A (en) * 1986-03-19 1987-09-25 東芝ケミカル株式会社 Electronic circuit device
JPH0515278U (en) * 1991-08-02 1993-02-26 内橋エステツク株式会社 Electronic parts
WO1995024732A1 (en) * 1994-03-09 1995-09-14 National Semiconductor Corporation A molded lead frame and method of making same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62217700A (en) * 1986-03-19 1987-09-25 東芝ケミカル株式会社 Electronic circuit device
JPH0515278U (en) * 1991-08-02 1993-02-26 内橋エステツク株式会社 Electronic parts
WO1995024732A1 (en) * 1994-03-09 1995-09-14 National Semiconductor Corporation A molded lead frame and method of making same
US5518684A (en) * 1994-03-09 1996-05-21 National Semiconductor Corporation Method of making a molded lead frame

Similar Documents

Publication Publication Date Title
US6002165A (en) Multilayered lead frame for semiconductor packages
US6215175B1 (en) Semiconductor package having metal foil die mounting plate
US5198964A (en) Packaged semiconductor device and electronic device module including same
US5616957A (en) Plastic package type semiconductor device
US5841183A (en) Chip resistor having insulating body with a continuous resistance layer and semiconductor device
US20020114133A1 (en) Cavity-down tape ball grid array package assembly with grounded heat sink and method of fabricating the same
US6396129B1 (en) Leadframe with dot array of silver-plated regions on die pad for use in exposed-pad semiconductor package
JP4614584B2 (en) Hybrid integrated circuit device and manufacturing method thereof
JPH041501B2 (en)
WO2003030259A1 (en) Semiconductor device and method of manufacturing the device
JPS5856449A (en) Semiconductor device
JPH04114455A (en) Semiconductor device and mounting structure thereof
JP2622862B2 (en) Substrate for mounting electronic components with leads
JPH0567697A (en) Resin sealed-type semiconductor device
JPH04137756A (en) Hybrid integrated circuit
JP4614585B2 (en) Method for manufacturing hybrid integrated circuit device
JP3156630B2 (en) Power circuit mounting unit
KR100331070B1 (en) Structure of chip size semiconductor package and fabricating method thereof
JP2612468B2 (en) Substrate for mounting electronic components
JP2000031194A (en) Bonding wire and semiconductor device
JPH07226454A (en) Semiconductor device
JPH0927583A (en) Semiconductor integrated circuit device and its manufacture
JP4614579B2 (en) Method for manufacturing hybrid integrated circuit device
JP2002093855A (en) Semiconductor device
JPH0433357A (en) Structure of multichip package