JPS5856159B2 - display circuit - Google Patents
display circuitInfo
- Publication number
- JPS5856159B2 JPS5856159B2 JP15813476A JP15813476A JPS5856159B2 JP S5856159 B2 JPS5856159 B2 JP S5856159B2 JP 15813476 A JP15813476 A JP 15813476A JP 15813476 A JP15813476 A JP 15813476A JP S5856159 B2 JPS5856159 B2 JP S5856159B2
- Authority
- JP
- Japan
- Prior art keywords
- output
- comparator
- vref
- flip
- flop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Irons (AREA)
- Audible And Visible Signals (AREA)
- Emergency Alarm Devices (AREA)
- Alarm Systems (AREA)
Description
【発明の詳細な説明】
この発明は、警報器等に用いる電子回路に係るものであ
り、特に検出すべき入力に対する出力を1つの出力で多
様の信号が得られるようにした表示回路に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic circuit used in an alarm device, etc., and in particular to a display circuit that allows a single output to provide various signals in response to an input to be detected. be.
第1図はこの発明の一実施例を示すブロック図であり、
1および2は第1および第2の比較器で、その出力はR
−Sフリップフロップ3をリセットおよびセットする。FIG. 1 is a block diagram showing one embodiment of the present invention,
1 and 2 are first and second comparators, whose outputs are R
- Reset and set the S flip-flop 3.
R−8フリツプフロツプ3によって出力表示回路である
発光ダイオード4および放電回路であるトランジスタ5
が駆動される。A light emitting diode 4 which is an output display circuit and a transistor 5 which is a discharge circuit are connected by an R-8 flip-flop 3.
is driven.
第2図はこの発明の動作の一例を示すもので、出力の表
示は発光ダイオード等のランプLであり、入力電圧をV
I N N基準電圧を■ref1動作波形をWで示す
。FIG. 2 shows an example of the operation of the present invention. The output is displayed by a lamp L such as a light emitting diode, and the input voltage is set to V.
I N N reference voltage is indicated by ① ref1 operating waveform is indicated by W.
VINがvrefより低い時は出力はなく、従ってラン
プLは点灯しない。When VIN is lower than vref, there is no output and therefore lamp L does not light up.
VINが■、。fに等しくなった瞬間にランプLが連続
的に点灯する。VIN is ■. The lamp L lights up continuously at the moment when the value becomes equal to f.
VINがvref より大きくなるに従って点滅をくり
返し、点滅の周期はvIN−Vrefに比例して長くな
るものであり、これによって1つの出力表示でありなが
ら、VINとvrefの大小の比較、さらにvIN−V
refの量も表示させることができるものである。As VIN becomes larger than vref, it repeats blinking, and the blinking period becomes longer in proportion to vIN-Vref. This allows for comparison of the magnitude of VIN and vref, and furthermore, even though it is a single output display,
The amount of ref can also be displayed.
以下にその動作についてさらに詳細に説明する。The operation will be explained in more detail below.
まず、入力電圧VINと基準電圧vrefが、vlN<
vrefの時、
抵抗器R1を通じてコンデンサCに充電が行われるが、
第1の比較器1が第2の比較器2より優先して動作し、
R−Sフリップフロップ3をリセットし、出力Qは高レ
ベルになり、出力の発光ダイオード4は点灯しない。First, if the input voltage VIN and the reference voltage vref are vlN<
When vref, capacitor C is charged through resistor R1,
The first comparator 1 operates with priority over the second comparator 2,
The R-S flip-flop 3 is reset, the output Q becomes high level, and the output light emitting diode 4 does not light up.
コンデンサCの電圧がvrefを超えた瞬間に第1の比
較器1が動作し、R−8フリツプフロツプ3を反転させ
てトランジスタ5がオンし、抵抗器R2を通してコンデ
ンサCの電荷の放電が行われ、同時に出力が反転し、抵
抗器R3を通して発光ダイオード4が点灯する。At the moment when the voltage of the capacitor C exceeds vref, the first comparator 1 operates, inverts the R-8 flip-flop 3, turns on the transistor 5, and discharges the charge of the capacitor C through the resistor R2. At the same time, the output is inverted and the light emitting diode 4 lights up through the resistor R3.
コンデンサCの電圧が再びvrefに達すると、第2の
比較器2が動作し、R−8フリツプフロツプ3を反転さ
せる。When the voltage on capacitor C reaches vref again, second comparator 2 operates and inverts R-8 flip-flop 3.
この場合コンデンサCの電圧を検出し充放電を判定する
レベルは同じvrefであるので、放電すなわち出力の
発光ダイオード4を点灯させている期間は極めて短かく
視覚的には消灯している。In this case, since the level at which the voltage of the capacitor C is detected and charging/discharging is determined is the same vref, the period during which the discharge, that is, the output light emitting diode 4 is turned on, is extremely short and is visually turned off.
vIN=■refの時)
R−Sフリップフロップ3をセット、リセットするレベ
ルは等しいため、コンデンサCの充放電時定数は非常に
短かく、出力は短かい周期で点滅しているが視覚的には
点灯して見える。When vIN=■ref) Since the level at which R-S flip-flop 3 is set and reset is the same, the charging/discharging time constant of capacitor C is very short, and the output blinks at short intervals, but visually appears to be lit.
VIN > vrefO時、
コンデンサCの充電電圧がVIN に達した時放電を
開始し、vrefまで下降した時再び充電を開始し、出
力の発光ダイオードは点滅を行う。When VIN > vrefO, when the charging voltage of capacitor C reaches VIN, it starts discharging, and when it drops to vref, it starts charging again, and the output light emitting diode blinks.
その周期はVINがvrefに近い程短かく、VIN−
vrefに応じて長くなる。The cycle is shorter as VIN is closer to vref;
It becomes longer depending on vref.
R1)R2の条件のもとに、点滅の周期Tは電源電圧を
V。R1) Under the condition of R2, the blinking period T is the power supply voltage V.
0とすると、次式で与えられる。以上説明したようにこ
の発明は、点滅の周期が入力電圧に応じて変化するので
、出力の表示は1つであっても、多くの情報量を表示す
ることができる。When it is set to 0, it is given by the following formula. As explained above, in the present invention, since the blinking period changes depending on the input voltage, a large amount of information can be displayed even if only one output is displayed.
また点滅周期を目に見える位遅くした場合は点滅時間の
長さとして測ることができ、周期を短かく選んだ時は明
るさの変化として感知することができる等の利点がある
。Furthermore, if the blinking cycle is slowed down enough to be visible, it can be measured as the length of the blinking time, and if the cycle is shortened, it can be perceived as a change in brightness.
第1図はこの発明の一実施例を示すブロック回路図、第
2図はこの発明の動作説明図である。
図中、1は第1の比較器、2は第2の比較器、3はR−
Sフリップフロップ、4は発光ダイオード、5はトラン
ジスタ、VINは入力電圧、vrefは基準電圧である
。FIG. 1 is a block circuit diagram showing an embodiment of the present invention, and FIG. 2 is an explanatory diagram of the operation of the present invention. In the figure, 1 is the first comparator, 2 is the second comparator, and 3 is R-
4 is a light emitting diode, 5 is a transistor, VIN is an input voltage, and vref is a reference voltage.
Claims (1)
および第2の2つの比較器を有し、前記第1の比較器の
1つの入力端に入力電圧を加え他の入力端と前記第2の
比較器の1つの入力端とにCR充電回路を接続し、前記
第2の比較器の他の入力端には基準電圧を加え、前記フ
リップフロップの出力により出力表示回路および放電回
路を1駆動し、前記放電回路を前記CR充電回路に接続
して前記入力電圧と基準電圧の差に応じて前記フリップ
フロップの出力回路のオンオフ周期が変化するようにし
たことを特徴とする表示回路。1. The first to reset and set the flip-flop.
and a second comparator, an input voltage is applied to one input terminal of the first comparator, and a CR charging circuit is connected to the other input terminal and one input terminal of the second comparator. A reference voltage is applied to the other input terminal of the second comparator, an output display circuit and a discharge circuit are driven by 1 by the output of the flip-flop, and the discharge circuit is connected to the CR charging circuit. A display circuit characterized in that the on/off period of the output circuit of the flip-flop changes depending on the difference between the input voltage and the reference voltage.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15813476A JPS5856159B2 (en) | 1976-12-29 | 1976-12-29 | display circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15813476A JPS5856159B2 (en) | 1976-12-29 | 1976-12-29 | display circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5383599A JPS5383599A (en) | 1978-07-24 |
JPS5856159B2 true JPS5856159B2 (en) | 1983-12-13 |
Family
ID=15665010
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15813476A Expired JPS5856159B2 (en) | 1976-12-29 | 1976-12-29 | display circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5856159B2 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59177750U (en) * | 1983-05-16 | 1984-11-28 | ヤンマーディーゼル株式会社 | Adjuster device for lever for controlling fuel injection amount in multi-cylinder internal combustion engine |
JPS603434A (en) * | 1983-06-20 | 1985-01-09 | Yanmar Diesel Engine Co Ltd | Control rod device of multicylinder internal-combustion engine |
JPS60170039U (en) * | 1984-04-20 | 1985-11-11 | ヤンマーディーゼル株式会社 | mechanical governor |
JPH0465211B2 (en) * | 1984-11-27 | 1992-10-19 | Steyr Daimler Puch Ag |
-
1976
- 1976-12-29 JP JP15813476A patent/JPS5856159B2/en not_active Expired
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59177750U (en) * | 1983-05-16 | 1984-11-28 | ヤンマーディーゼル株式会社 | Adjuster device for lever for controlling fuel injection amount in multi-cylinder internal combustion engine |
JPS603434A (en) * | 1983-06-20 | 1985-01-09 | Yanmar Diesel Engine Co Ltd | Control rod device of multicylinder internal-combustion engine |
JPS60170039U (en) * | 1984-04-20 | 1985-11-11 | ヤンマーディーゼル株式会社 | mechanical governor |
JPH0465211B2 (en) * | 1984-11-27 | 1992-10-19 | Steyr Daimler Puch Ag |
Also Published As
Publication number | Publication date |
---|---|
JPS5383599A (en) | 1978-07-24 |
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