JPS5853342B2 - Electrochromism Hiyoji Souchino Kudo Cairo - Google Patents
Electrochromism Hiyoji Souchino Kudo CairoInfo
- Publication number
- JPS5853342B2 JPS5853342B2 JP9881375A JP9881375A JPS5853342B2 JP S5853342 B2 JPS5853342 B2 JP S5853342B2 JP 9881375 A JP9881375 A JP 9881375A JP 9881375 A JP9881375 A JP 9881375A JP S5853342 B2 JPS5853342 B2 JP S5853342B2
- Authority
- JP
- Japan
- Prior art keywords
- state
- segment
- display
- electrode
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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Classifications
-
- G—PHYSICS
- G04—HOROLOGY
- G04G—ELECTRONIC TIME-PIECES
- G04G9/00—Visual time or date indication means
- G04G9/0023—Visual time or date indication means by light valves in general
- G04G9/0029—Details
- G04G9/0047—Details electrical, e.g. selection or application of the operating voltage
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/15—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on an electrochromic effect
- G02F1/163—Operation of electrochromic cells, e.g. electrodeposition cells; Circuit arrangements therefor
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Electric Clocks (AREA)
- Electrochromic Elements, Electrophoresis, Or Variable Reflection Or Absorption Elements (AREA)
Description
【発明の詳細な説明】
本発明は単一電源で駆動する、エレクトロクロミズム（
以下ＥＣと略記する）表示装置の駆動回路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention uses electrochromism (
The present invention relates to a drive circuit for a display device (hereinafter abbreviated as EC).
従来ＥＣ表示装置の駆動回路としては、第１図に示すよ
うに２電源で駆動するタイプのものが提案されていた。Conventionally, as a drive circuit for an EC display device, a type driven by two power sources as shown in FIG. 1 has been proposed.
第１図において、ＥＣ表示装置１の共通電源２は接地さ
れ、セグメント電極３，４は正電源＋■に接続される状
態、負電源−■に接続される状態、０ＰＥＮ状態の３状
態をとれるように構成されており、セグメント電極３に
対応する表示要素（以下セグメント３と略記する）を消
色状態から発色状態に変化させるときは、セグメント電
極３を一■に接続し、発色状態から消色状態に変化させ
るときはセグメント電極３を＋Ｖに接続する如くしてい
た。In FIG. 1, the common power supply 2 of the EC display device 1 is grounded, and the segment electrodes 3 and 4 can take three states: a state connected to the positive power supply +■, a state connected to the negative power supply -■, and a 0PEN state. When changing the display element corresponding to the segment electrode 3 (hereinafter abbreviated as segment 3) from the decoloring state to the coloring state, connect the segment electrode 3 to 1 and changing the display element from the coloring state to the decoloring state. When changing the color state, the segment electrode 3 was connected to +V.
なお簡単のためセグメントは以下の説明においても、２
個のみ示している。For simplicity, the segments are also referred to as 2 in the following explanation.
Only one item is shown.
このような従来の駆動法では、＋Ｖ、−Ｖという２電源
が必要であり、電子時計のように大きさが制限されてい
るものに用いるのは適していなかった。Such a conventional driving method requires two power supplies, +V and -V, and is not suitable for use in a device whose size is limited, such as an electronic watch.
そこで単一の電源で駆動する方法が望まれている。Therefore, a method of driving with a single power source is desired.
第２図は単一の電源でＥＣ表示装置を駆動するため考え
られた方式を説明する図で、第１図のタイプと異なるの
は、共通電極２、セグメント電極３，４がすべて、電源
の高電位側Ｈと接続される状態、電源の低電位側りと接
続される状態、０ＰＥＮ状態の三状態をとり得る構成と
なっていることである。Fig. 2 is a diagram explaining a method devised for driving an EC display device with a single power supply.The difference from the type shown in Fig. 1 is that the common electrode 2 and segment electrodes 3 and 4 are all connected to the power supply. The configuration is such that it can take three states: a state where it is connected to the high potential side H, a state where it is connected to the low potential side of the power supply, and a 0PEN state.
第３図は電極を電源に接続する手段を示した図である。FIG. 3 shows the means for connecting the electrodes to a power source.
Ｐ−チャネルＭＯ８ＦＢＴ５゜６．１は電極をＨに接続
する手段で、ゲート電位がＬとなるとＯＮになり、それ
ぞれの電極をＨに接続する。The P-channel MO8FBT5°6.1 is a means for connecting the electrodes to H. When the gate potential becomes L, it turns ON and connects each electrode to H.
Ｎ−チャネルＭＯ８ＦＥＴ ８ 、９ 、１０は電極を
Ｌに接続する手段で、ゲート電位がＨとなるとＯＮにな
り、それぞれの電極をＬに接続する。N-channel MO8FETs 8, 9, and 10 are means for connecting electrodes to L, and are turned on when the gate potential becomes H, connecting their respective electrodes to L.
Ｐ−チャネルＭＯ８ＦＥＴ、Ｎ−チャネルＭＯ８ＦＥＴ
が共にＯＦＦとなった時電極は０ＰＥＮ状態となる。P-channel MO8FET, N-channel MO8FET
When both are turned off, the electrode becomes 0PEN state.
なお、Ｐ−チャネルＭＯ８ＦＥＴ５とＮ−チャネルＭＯ
８ＦＥＴ８のゲート電極が接続されている場合、共通電
極２はインバータの出力と接続されたのと同じことにな
る。In addition, P-channel MO8FET5 and N-channel MO
When the gate electrode of the 8FET 8 is connected, it is the same as the common electrode 2 being connected to the output of the inverter.
第４図は第３図のような構成を用いて単一電源でＥＣ表
示装置を駆動する場合の駆動例を説明するタイミングチ
ャートである。FIG. 4 is a timing chart illustrating an example of driving an EC display device using a single power source using the configuration shown in FIG.
第４図の信号は電極の状態を示すもので、Ｈは電極がＨ
に接続された状態、Ｌは電極がＬに接続された状態、点
線は電極から０ＰＥＮ状態であることを示す。The signals in Figure 4 indicate the state of the electrodes.
L indicates a state in which the electrode is connected to L, and a dotted line indicates a state in which the electrode is connected to L.
信号１１は共通電極２の状態、信号１２はセグメント電
極３の状態、信号１３はセグメント電極４の状態をそれ
ぞれ表わし、信号１４．１５は他の駆動例におけるセグ
メント電極３，４の状態をそれぞれ表わす。Signal 11 represents the state of common electrode 2, signal 12 represents the state of segment electrode 3, signal 13 represents the state of segment electrode 4, and signals 14 and 15 represent the states of segment electrodes 3 and 4 in other driving examples, respectively. .
ｔｌにおいては共通電極２セグメント電極３，４はすべ
て０ＰＥＮ状態となっているので、セグメント３，４は
前の表示状態を記憶している。At tl, the common electrode 2 segment electrodes 3 and 4 are all in the 0PEN state, so the segments 3 and 4 remember the previous display state.
ｔ２においては共通セグメント２はＨ１セグメント電極
４はＬに接続されるためセグメント４は発色方向に通電
され発色状態となる。At t2, since the H1 segment electrode 4 of the common segment 2 is connected to L, the segment 4 is energized in the direction of color development and enters the color development state.
ｔ３においては共通電極２はＬ１セグメント電極３はＨ
に接続されるためセグメント３は消色方向に通電され消
色状態となる。At t3, the common electrode 2 is L1 and the segment electrode 3 is H.
Since the segment 3 is connected to the segment 3, the segment 3 is energized in the color erasing direction and enters the color erasing state.
ｔ４においてはｔｌのときと同じく全電極が０ＰＥＮ状
態となっているので、セグメント３は消色状態、セグメ
ント４は発色状態を保つ。At t4, all the electrodes are in the 0PEN state as at tl, so segment 3 maintains the decolored state and segment 4 maintains the colored state.
同様にしてｔ５においてセグメント３は消色状態から発
色状態に変化し、ｔ６においてセグメント４は発色状態
から消色状態に変化し、ｔ７において、セグメント３は
発色状態、セグメント４は消色状態を保つ。Similarly, at t5, segment 3 changes from a colorless state to a coloring state, at t6, segment 4 changes from a coloring state to a colorless state, and at t7, segment 3 maintains a coloring state and segment 4 maintains a colorless state. .
信号１４゜１５による駆動法は、信号１２．１３による
駆動法を改良したもので、その異なる点は、ｔ２におい
てセグメント電極３を、ｔ５においてセグメント電極４
をＨに接続することである。The driving method using signals 14 and 15 is an improvement on the driving method using signals 12 and 13, and the difference is that the segment electrode 3 is moved at t2 and the segment electrode 4 is moved at t5.
is connected to H.
１２，１．において共通電極２はＨに接続されているの
で、ｔ２におけるセグメント電極３．ｔ、におけるセグ
メント電極４は回路的に共通電極と短絡されたことにな
る。12,1. Since common electrode 2 is connected to H at t2, segment electrode 3 at t2 is connected to H. The segment electrode 4 at t is short-circuited to the common electrode.
この短絡時間は、発色状態にあったセグメントを消色状
態に変化させるための通電時間の直前に設けられており
、発色状態にあったセグメントが保持している電荷を放
電させる働きをする。This short-circuit time is provided immediately before the energization time for changing the colored segment to the decolored state, and serves to discharge the charges held by the colored segment.
このような短絡時間を設けることにより、消色方向の通
電に要するエネルギーを減少させることが可能であり、
又消色方向の通電時間を短もすることもできる。By providing such a short circuit time, it is possible to reduce the energy required for energization in the decoloring direction,
Furthermore, the energization time in the decoloring direction can also be shortened.
以上説明してきた第４図の方式による駆動法では消色方
向の通電を行った後に着色方向への通電を行っている。In the driving method according to the method shown in FIG. 4 described above, electricity is applied in the coloring direction after electricity is applied in the decoloring direction.
そのため、応答速度の遅いＥＣ表示装置にこの駆動法を
用いた場合は、過渡的に誤った表示をする心配がある。Therefore, if this driving method is used in an EC display device with a slow response speed, there is a risk of transient erroneous display.
例えば７セグメント表示体で２という表示からヨという
表示に切り換える時、過渡的に己という表示が観測され
る恐れがある。For example, when switching from the display of 2 to the display of YO on a 7-segment display, there is a possibility that the display of self may be observed transiently.
本発明の目的は、応答速度の遅いＥＣ表示装置にも適用
できる。The object of the present invention can also be applied to an EC display device with a slow response speed.
単一電源による駆動回路を提供することである。The object of the present invention is to provide a driving circuit using a single power source.
第５図は本発明による駆動法を説明するタイミングチャ
ートである。FIG. 5 is a timing chart illustrating the driving method according to the present invention.
第５図において信号１６は共通電極２の状態、信号１７
はセグメント電極３の状態、信号１８はセグメント電極
４の状態、表わし、第５図は第４図のｊ２ｙｊ３に相当
する部分を拡大して示したものである。In FIG. 5, the signal 16 indicates the state of the common electrode 2, and the signal 17
represents the state of the segment electrode 3, and signal 18 represents the state of the segment electrode 4. FIG. 5 is an enlarged view of a portion corresponding to j2yj3 in FIG.
第５図の駆動法において、共通電極２はＨ，Ｌに交互に
接続され、発色状態から消色状態に変化すべきセグメン
ト３は共通電極がＬに接続されている時Ｈに接続されて
消色方向に通電され、消色状態から発色状態に変化すべ
きセグメント４は共通電極がＨに接続されている時りに
接続されて発色方向に通電される。In the driving method shown in FIG. 5, the common electrode 2 is connected to H and L alternately, and the segment 3 to be changed from the colored state to the decolored state is connected to H when the common electrode is connected to L, and the segment 3 is turned off. When the common electrode is connected to H, the segment 4 which is energized in the color direction and is to be changed from the decoloring state to the coloring state is connected and energized in the coloring direction.
１回の通電時間を表示状態を変化させるのに必要な時間
よりも短く設定しておけば、セグメント３とセグメント
４は交互に繰返し通電される間に、除々に表示状態を変
化させ、はぼ同時に表示状態の変化を終了する。If the time for one energization is set shorter than the time required to change the display state, segments 3 and 4 will gradually change the display state while being alternately and repeatedly energized. At the same time, the display state change ends.
従って本発明の駆動法によれば、表示状態の切り換え時
に誤った表示を行うことはない。Therefore, according to the driving method of the present invention, erroneous display will not be performed when switching the display state.
なお１１．１．において共通電極が、ｔ２゜ｔ３の時と
同じように、Ｈ，Ｌに交互に接続されても表示に影響は
ない。Note 11.1. Even if the common electrode is alternately connected to H and L in the same way as at t2 and t3, there is no effect on the display.
第６図は本茜、明による駆動法を実現する一実施例回路
である。FIG. 6 shows an example circuit for realizing the driving method proposed by Akane and Akira Moto.
第６図においては、計時回路、演算回路等の出力信号が
デコーダ２０に送られ、デコーダ２０で表示情報信号に
変換されて駆動回路２１へ出力される。In FIG. 6, output signals from a clock circuit, an arithmetic circuit, etc. are sent to a decoder 20, which converts them into display information signals and outputs them to a drive circuit 21.
ラッチ回路２２のデ゛−タ入力端子にはデコーダ２０の
出力信号である表示情報信号が印加され、クロック入力
端子には線２３を介して第１のクロック信号が印加され
、３人力ＮＡＮ Ｄゲート２４の第１の入力にはインバ
ータ２５を介して表示情報信号が印加され、第２の入力
には、線２４を介して入力される第２のクロック信号が
インバータ２６を介して印加され、第３の入力にはラッ
チ回路２２の出力信号が印加され、３人力ＡＮＤゲート
２７の第１の入力にはラッチ回路２２の反転出力信号が
印加され、第２の入力には線２４を介して第２のクロッ
ク信号が印加され、第３の入力には表示情報信号が印加
され、Ｐ−チャネルＭＯ８ＦＥＴ２Ｂのゲート電極には
３人力ＮＡＮＤゲ°−ト２４の出力信号が印加され、Ｎ
−チャネルＭＯ８ＦＥＴ２９のゲート電極には３人力Ａ
ＮＤゲート２７の出力信号が印加され、Ｐ−チャネルＭ
Ｏ８ＦＥＴ２Ｂのソース電極はＨに接続され、Ｎ−チャ
ネルＭＯ８ＦＥＴ２９のソース電極はＬに接続され、Ｐ
−チャネルＭＯ８ＦＥＴ ２８のドレイン電極とＮ−チ
ャネルＭＯ８ＦＥＴ２９のドレイン電極とは互いに接続
されて駆動回路２１の１つの出力となりセグメント電極
３に接続される。A display information signal, which is an output signal of the decoder 20, is applied to the data input terminal of the latch circuit 22, and a first clock signal is applied to the clock input terminal via the line 23. A display information signal is applied via an inverter 25 to a first input of 24, and a second clock signal input via line 24 is applied to a second input via an inverter 26. The output signal of the latch circuit 22 is applied to the input of 3, the inverted output signal of the latch circuit 22 is applied to the first input of the 3-power AND gate 27, and the inverted output signal of the latch circuit 22 is applied to the second input of the 3-power AND gate 27 via the line 24. A clock signal of 2 is applied to the third input, a display information signal is applied to the third input, an output signal of the 3-power NAND gate 24 is applied to the gate electrode of the P-channel MO8FET 2B,
-The gate electrode of channel MO8FET29 has 3 manual A
The output signal of the ND gate 27 is applied, and the P-channel M
The source electrode of O8FET2B is connected to H, the source electrode of N-channel MO8FET29 is connected to L, and P
The drain electrode of the -channel MO8FET 28 and the drain electrode of the N-channel MO8FET 29 are connected to each other to become one output of the drive circuit 21 and connected to the segment electrode 3.
セグメント電極４を駆動する駆動回路もセグメント電極
３を駆動する駆動回路と同様の構成となっている。The drive circuit that drives the segment electrodes 4 also has the same configuration as the drive circuit that drives the segment electrodes 3.
駆動用インバータ３０にはインバータ３１を介して第２
のクロック信号が印加され、駆動用インバータ３０の出
力は共通電極２に接続される。The drive inverter 30 has a second
A clock signal is applied thereto, and the output of the driving inverter 30 is connected to the common electrode 2.
ラッチ回路２２．３２の動作を真理値表に示す。The operation of latch circuits 22 and 32 is shown in a truth table.
第６図の回路において、ラッチ回路２２のデータ入力端
子に第１図４０に示す表示情報信号、クロック入力端子
に第７図４１に示す第１のクロック信号が印加されると
、出力信号は第７図４２に示す信号となる。In the circuit shown in FIG. 6, when the display information signal shown in FIG. 1 40 is applied to the data input terminal of the latch circuit 22 and the first clock signal shown in FIG. 7 41 is applied to the clock input terminal, the output signal is 7 The signal shown in FIG. 42 is obtained.
線２４を介して人力される第２のクロック信号が第７図
４３に示す信号であると、３人力ＮＡＮＤゲ゛−ト２４
の出力信号は第１図４４に、１３人力ＡＮＤゲート２７
の出力信号は第７図４５にそれぞれ示す信号となる。If the second clock signal inputted via the line 24 is the signal shown in FIG.
The output signal of 13 human-powered AND gate 27 is shown in FIG.
The output signals of are shown in FIG. 745, respectively.
同様にしてラッチ回路３２のデータ入力端子に第１図４
６に示す表示情報信号が印加されると、ラッチ回路３２
の出力信号は第７図４７に、３人力ＮＡＮＤゲート３３
の出力信号は第７図４８に、３人力ＡＮＤゲート３４の
出力信号は第７図４９にそれぞれ示す信号となる。Similarly, the data input terminal of the latch circuit 32 is connected to the data input terminal shown in FIG.
When the display information signal shown in 6 is applied, the latch circuit 32
The output signal of the three-man NAND gate 33 is shown in FIG.
The output signal of the three-man power AND gate 34 is shown in FIG. 748, and the output signal of the three-man power AND gate 34 is shown in FIG. 749.
なお表示情報信号の状態変化は第１のクロック信号の立
下りに同期し、かつやや時間的に遅れている。Note that the state change of the display information signal is synchronized with the falling edge of the first clock signal and is slightly delayed in time.
又表示情報信号はＨでセグメントが発色状態になるべき
情報を示し、Ｌで消色状態になるべき情報を示す。Further, the display information signal indicates information at which the segment should be in a coloring state at H, and information at which the segment should be at a colorless state at L.
Ｐ−チャネルＭＯ８ＦＥＴ２８．３５はゲート電位がＬ
のときＯＮ。P-channel MO8FET28.35 has a gate potential of L
ON when
Ｎ−チャネルＭＯ８ＦＥＴ ２９．３６はゲート電位が
ＨのときＯＮとなるから、セグメント電極３は第７図５
０に、セグメント電極４は第７図５１にそれぞれ示す状
態となる。Since the N-channel MO8FET 29.36 is turned on when the gate potential is H, the segment electrode 3 is
0, the segment electrodes 4 are in the state shown in FIG. 751.
又共通電極２は第７図５２に示す状態をとる。Further, the common electrode 2 assumes the state shown in FIG. 752.
第７図ｔｌＯにおいて各電極がとる状態は、第５図ｔ２
．ｔ３の状態に等しい。The state that each electrode assumes in Fig. 7 tlO is Fig. 5 t2
．． Equivalent to the state at t3.
第１図のタイミングチャートから明らかなように、第７
図４０に示すセグメント３の表示情報信号がＨとなり、
４６に示すセグメント４の表示情報信号がＬとなると、
ｔｌｏの期間、セグメント３には発色方向に、セグメン
ト４には消色方向に、交互に繰返し通電され、セグメン
ト３，４は徐々に表示状態を変化させ、はぼ同時に変化
を完了してセグメント３は発色状態に、セグメント４は
消色状態になる。As is clear from the timing chart in Figure 1, the seventh
The display information signal of segment 3 shown in FIG. 40 becomes H,
When the display information signal of segment 4 shown in 46 becomes L,
During the tlo period, electricity is alternately and repeatedly applied to segment 3 in the coloring direction and segment 4 in the decoloring direction, and segments 3 and 4 gradually change their display states, completing the changes almost simultaneously and displaying segment 3. is in a colored state, and segment 4 is in a decolored state.
４０に示すセグメント３の表示情報信号がＬに、４６に
示すセグメント４の表示情報信号がＨに変ると、ｔｌｌ
の期間、セグメント３には消色方向に、セグメント４は
発色方向に、交互に繰返し通電され、セグメント３，４
は徐々に表示状態を変化させ、はぼ同時に変化を完了さ
せてセグメント３は消色状態に、セグメント４は発色状
態になる。When the display information signal of segment 3 shown at 40 changes to L and the display information signal of segment 4 shown at 46 changes to H, tll
During this period, segment 3 is energized repeatedly in the decoloring direction and segment 4 is energized in the coloring direction.
gradually changes the display state, and the changes are completed almost simultaneously, so that segment 3 becomes a colorless state and segment 4 becomes a colored state.
このように本発明の駆動回路を用いれば、応答速度の遅
いＥＣ表示装置を単一電源で駆動することができ、電子
時計のような大きさに制限のあるものに用いると特に効
果がある。As described above, by using the drive circuit of the present invention, it is possible to drive an EC display device with a slow response speed with a single power supply, which is particularly effective when used in a device with a size limit such as an electronic watch.
第１図はエレクトロクロミズム表示装置の従来の駆動法
を説明する図、第２図は単一電源で駆動する方式を説明
する図、第３図は第２図の電極を電源に接続する手段を
示す図、第４図は単一電源で駆動する駆動法を説明する
タイミングチャート、第５図は本発明による駆動法を説
明するタイミングチャート、第６図は本発明による駆動
回路の一実施例、第７図は第６図の動作を説明するタイ
ミングチャートである。
１・・・・・・エレクトロクロミズム表示装置、２・・
・・・・共通電極、３，４・・・・・・セグメント電極
。Fig. 1 is a diagram explaining a conventional driving method for an electrochromic display device, Fig. 2 is a diagram explaining a method of driving with a single power supply, and Fig. 3 is a diagram explaining a means for connecting the electrodes in Fig. 2 to a power supply. 4 is a timing chart explaining the driving method using a single power supply, FIG. 5 is a timing chart explaining the driving method according to the present invention, and FIG. 6 is an embodiment of the driving circuit according to the present invention. FIG. 7 is a timing chart explaining the operation of FIG. 6. 1... Electrochromism display device, 2...
...Common electrode, 3,4...Segment electrode.
Claims (1)
に表示状態を変化させるべき表示要素と、消色状態から
発色状態に表示状態を変化させるべき表示要素とに、１
回の通電時間を表示状態を変化させるのに必要な時間よ
りも短く設定しておいて、交互に繰返し通電することに
より、表示状態の変化を行わせることを特徴としたエレ
クトロクロミズム表示装置の駆動回路。1. A display element whose display state should be changed from a coloring state to a colorless state of an electromism display device, and a display element whose display state should be changed from a colorless state to a coloring state, 1.
Driving an electrochromic display device characterized in that the display state is changed by alternately and repeatedly energizing the energizing time set shorter than the time required to change the display state. circuit.
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9881375A JPS5853342B2 (en) | 1975-08-14 | 1975-08-14 | Electrochromism Hiyoji Souchino Kudo Cairo |
| US05/702,000 US4150365A (en) | 1975-07-02 | 1976-07-01 | Driver circuit for electrochromic display device |
| CH844276A CH614595B (en) | 1975-07-02 | 1976-07-01 | PROCEDURE AND CIRCUIT FOR EXCITING AN ELECTROCHROMATIC DISPLAY. |
| GB286479A GB1560104A (en) | 1975-08-14 | 1976-07-02 | Driver circuit in combination with an electrochromic display device |
| DE2629874A DE2629874C2 (en) | 1975-07-02 | 1976-07-02 | Driver circuit for an electrochromatic display device |
| GB27717/76A GB1560102A (en) | 1975-07-02 | 1976-07-02 | Driver circuit in combination with an electrochromic display device |
| HK344/82A HK34482A (en) | 1975-07-02 | 1982-07-29 | Driver circuit in combination with an electrochromic display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9881375A JPS5853342B2 (en) | 1975-08-14 | 1975-08-14 | Electrochromism Hiyoji Souchino Kudo Cairo |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5222894A JPS5222894A (en) | 1977-02-21 |
| JPS5853342B2 true JPS5853342B2 (en) | 1983-11-29 |
Family
ID=14229756
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9881375A Expired JPS5853342B2 (en) | 1975-07-02 | 1975-08-14 | Electrochromism Hiyoji Souchino Kudo Cairo |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPS5853342B2 (en) |
| GB (1) | GB1560104A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3987433A (en) * | 1975-09-02 | 1976-10-19 | Timex Corporation | Electrochromic display driver having interleaved write and erase operations |
| JPS57185483A (en) * | 1981-05-11 | 1982-11-15 | Nippon Denso Co | High voltage withstand type output circuit |
-
1975
- 1975-08-14 JP JP9881375A patent/JPS5853342B2/en not_active Expired
-
1976
- 1976-07-02 GB GB286479A patent/GB1560104A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5222894A (en) | 1977-02-21 |
| GB1560104A (en) | 1980-01-30 |
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