JPS5829899B2 - oscillator - Google Patents
oscillatorInfo
- Publication number
- JPS5829899B2 JPS5829899B2 JP52128917A JP12891777A JPS5829899B2 JP S5829899 B2 JPS5829899 B2 JP S5829899B2 JP 52128917 A JP52128917 A JP 52128917A JP 12891777 A JP12891777 A JP 12891777A JP S5829899 B2 JPS5829899 B2 JP S5829899B2
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- signal
- vco
- oscillation
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000010355 oscillation Effects 0.000 claims description 46
- 239000000284 extract Substances 0.000 claims 1
- 239000003990 capacitor Substances 0.000 description 12
- 229910017741 MH2O Inorganic materials 0.000 description 5
- 239000013078 crystal Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
- H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Superheterodyne Receivers (AREA)
Description
【発明の詳細な説明】
例えばスーパー受信機において、その局部発振信号をＰ
ＬＬＫより形成する方法があるが、その場合、ＰＬＬに
はヘテロダイア方式と、プリミックス方式とがある。Detailed Description of the Invention For example, in a super receiver, the local oscillation signal is
There is a method of forming the PLL using LLK, but in that case, there are two types of PLL: a heterodia type and a premix type.
しかし、ヘテロダイア方式は、Ｃ／Ｎ（発振信号の周波
数スペクトルの尖鋭度に相当するもの）が良いが、水晶
発振子を受信バンドのバンド数だけ必要としてしまい、
コストアンプを招いてしまう。However, although the heterodia system has a good C/N (corresponding to the sharpness of the frequency spectrum of the oscillation signal), it requires as many crystal oscillators as there are reception bands.
This will lead to a cost increase.
一方、プＩＪ ミックス方式は水晶発振子が１個でよい
が、分周のためＣ／Ｎが悪く、また、プリスケーラ−や
プログラマブルデバイダを必要とし、やはりコストアン
プを招いてしまう。On the other hand, the pre-IJ mix method requires only one crystal oscillator, but has a poor C/N ratio due to frequency division, and requires a prescaler and programmable divider, which also results in a cost amplifier.
この発明は、このような点にかんがみ、発振信号のＣ／
Ｎが良く、しかも、コストダウンができる発振器を提供
しようとするものである。In view of these points, the present invention provides C/C of the oscillation signal.
The present invention aims to provide an oscillator that has a good N value and can reduce costs.
以下その一例について説明しよう。Let's explain one example below.
なお、この例においては、短波受信機に適用した場合で
あり、受信バンドは１０〜２０ＭＨ２，で、これが１Ｍ
Ｈ２づつ１０バンドに分割され、粗同調によりバンド切
り換えが行われ、微同調により目的とする周波数が選択
されるものである。In this example, it is applied to a short wave receiver, and the reception band is 10 to 20 MH2, which is 1M
The frequency is divided into 10 bands by H2, band switching is performed by coarse tuning, and a target frequency is selected by fine tuning.
第１図Ｋｉ−いて、アンテナ１からの受信信号が、アン
テナ同調回路（ブリセレクタ）２に供給されて受信バン
ド１０〜２０ＭＨ２の受信信号が取り出され・この信号
が高周波アンプ３を通じて第１ミキサ回路４に供給され
ると共に、後述する第１局部発振回路２０のＶＣＯ（電
圧制御型可変周波数発振回路２１から粗同調及び微同調
につれて例えば周波数２９．０５５〜３９．０５５ＭＨ
２Ｏ間を変化する発振信号Ｓ１が取り出され、この信号
Ｓ１が第２局部発振信号としてミキサ回路４に供給され
る。In FIG. 1, the received signal from the antenna 1 is supplied to the antenna tuning circuit (briselector) 2, and the received signal in the reception band 10 to 20 MH2 is extracted.This signal is passed through the high frequency amplifier 3 to the first mixer circuit. 4, and the VCO (voltage controlled variable frequency oscillation circuit 21) of the first local oscillation circuit 20 (to be described later) generates a frequency of, for example, 29.055 to 39.055 MH during coarse tuning and fine tuning.
An oscillation signal S1 varying between 2O is taken out, and this signal S1 is supplied to the mixer circuit 4 as a second local oscillation signal.
従って、ミキサ回路４ Ｋ 釦いて、受信信号のうち目
的とする信号だけが、例えば周波数１９．０５５ＭＨ２
の第１中間周波信号に周波数変換される。Therefore, when the mixer circuit 4K button is pressed, only the desired signal among the received signals is transmitted at a frequency of, for example, 19.055MH2.
The frequency is converted into a first intermediate frequency signal.
そして、この第１中間周波信号φ瓢第１中間周波７７プ
５を通じて第２ミキサ回路６に供給されると共に、第２
局部発振回路７から例えば周波数１８．６ＭＨ２の第１
局部発振信号がミキサ回路６に供給されて第１中間周波
信号は例えば周波数４５５に塊 の第２中間周波信号に
周波数変換される。Then, this first intermediate frequency signal φ is supplied to the second mixer circuit 6 through the first intermediate frequency signal 77p5, and the second
For example, the first signal from the local oscillation circuit 7 has a frequency of 18.6 MH2.
The local oscillation signal is supplied to the mixer circuit 6, and the first intermediate frequency signal is converted into a second intermediate frequency signal having a frequency of 455, for example.
そして、この第２中間周波信号が、第２中間周波アンプ
８を通じて検波回路９に供給されて音声信号が取り出さ
れ、この信号が低周波アンプ１１を通じてスピーカ１２
に供給される。This second intermediate frequency signal is then supplied to a detection circuit 9 through a second intermediate frequency amplifier 8 to extract an audio signal, and this signal is transmitted through a low frequency amplifier 11 to a speaker 12.
supplied to
そして、第４局部発振回路２０が、ＰＬＬ２０Ａ２０８
によって次のように構成される。Then, the fourth local oscillation circuit 20 is a PLL20A208
It is constructed as follows.
すなわち、ＰＬＬ２０ＢＶｃｚ−いて、２６はｖＣＯを
示し、これの共振回路３６は、例えば可変容量ダイオー
ド３６Ｄと、バリコン（可変コンデンサ）３６Ｃと、コ
イル３６Ｌとによって構成され、ＶＣ０２６からは、バ
リコン３６Ｃの操作につれて自走周波数が例えば２８〜
３７ＭＨ２の間を変化する発振信号Ｓ６が取り出される
。That is, in the PLL 20BVcz-, 26 indicates vCO, and its resonant circuit 36 is composed of, for example, a variable capacitance diode 36D, a variable capacitor (variable capacitor) 36C, and a coil 36L. For example, the free running frequency is 28~
An oscillation signal S6 varying between 37MH2 is taken out.
そして、この信号Ｓ６が位相比較回路２７に供給される
。This signal S6 is then supplied to the phase comparator circuit 27.
また、水晶発振子を有する固定発振回路２８から例えば
周波数ＩＭＨ２の発振信号が取り出され、この信号が、
ハーモニンクジエネレータ２９に供給されて周波数４０
ＭＨ２程度まで１ＭＨ２の整数倍の周波数ごとに信号成
分を持つ高周波信号Ｓ。Further, an oscillation signal having a frequency IMH2, for example, is taken out from a fixed oscillation circuit 28 having a crystal oscillator, and this signal is
The frequency 40 is supplied to the harmonic generator 29.
A high frequency signal S having signal components at frequencies that are integral multiples of 1MH2 up to about MH2.
とされ、この信号Ｓ９が比較回路２７に供給される。This signal S9 is supplied to the comparison circuit 27.
そして、この比較回路２７の出力が、ダイオード３６Ｄ
にその制御電圧として供給される。Then, the output of this comparison circuit 27 is connected to the diode 36D.
is supplied as its control voltage.
従って、信号Ｓ６ の周波数ｆ６は、発振回路２８の発
振周波数を基準としてサンプリングロックされ、周波数
ｆ６は、バリコン３６Ｃの容量に対して第２図に示すよ
うに変化する。Therefore, the frequency f6 of the signal S6 is sampling-locked with the oscillation frequency of the oscillation circuit 28 as a reference, and the frequency f6 changes as shown in FIG. 2 with respect to the capacitance of the variable capacitor 36C.
すなわち、比較回路２７においては、信号Ｓ６ と信
号Ｓ９のうちで信号Ｓ６の周波数ｆ６ に最も近い周波
数で、かつ、１ＭＨ２の整数倍の周波数ｆｎの信号成分
とが位相比較され、その比較出力によってダイオード３
６Ｄの容量が変更される。That is, in the comparator circuit 27, the phase of the signal S6 and the signal component of the signal S9 which has a frequency closest to the frequency f6 of the signal S6 and a frequency fn which is an integral multiple of 1MH2 is compared, and the comparison output is used to compare the phases of the signal component. 3
The capacity of 6D is changed.
従って、バリコン３６Ｃの容量を変化させると、これに
つれて信号Ｓ６の周波数ｆ６が変化するはずであるが、
周波数ｆ６が変化すると、比較回路２７の比較出力が変
化してダイオード３６Ｄの容量が逆に変化し、この容量
変化によりバリコン３６Ｃの容量変化が相殺される。Therefore, if the capacitance of the variable capacitor 36C is changed, the frequency f6 of the signal S6 should change accordingly.
When the frequency f6 changes, the comparison output of the comparison circuit 27 changes, and the capacitance of the diode 36D changes inversely, and this capacitance change cancels out the capacitance change of the variable capacitor 36C.
従って、バリコツ３６Ｃの容量を多少変化させても信号
Ｓ６の周波数ｆ６は一定で周波数ｆｎＫロックされる。Therefore, even if the capacitance of the Varicot 36C is changed somewhat, the frequency f6 of the signal S6 remains constant and the frequency fnK is locked.
しかし、バリコン３６Ｃの容量を大きく変化させると、
ダイオード３６Ｄの容量変化では相殺できなくなり、ま
た、信号Ｓ９は、１ＭＨ２おきに信号成分をもっている
ので、信号Ｓ６は、信号Ｓ。However, if the capacity of the variable capacitor 36C is greatly changed,
The change in capacitance of the diode 36D can no longer be canceled out, and the signal S9 has signal components every 1 MH2, so the signal S6 is the signal S.
の１ＭＨ２離れた隣りの信号成分と位相比較されること
になる。The phase will be compared with the adjacent signal component which is 1MH2 away.
従って、信号Ｓ６は、周波数（ｆ ｎ＋ＩＭＨｚ ）
または（ｆ ｎ １ＭＨ２）Ｋロックされる。Therefore, the signal S6 has a frequency (f n +IMHz)
or (f n 1MH2)K locked.
従って、第２図に示すように、バリコア３６Ｃの容量の
変化に対して、信号Ｓ６の周波数ｆ６は周波数２８〜３
７ＭＨ２の間を、信号Ｓ９ の周波数を基準としてＩＭ
Ｈ２ステップで階段状に変化する。Therefore, as shown in FIG. 2, the frequency f6 of the signal S6 changes from 28 to 3
IM between 7MH2 and the frequency of signal S9 as a reference.
It changes stepwise in H2 step.
そして、この信号Ｓ６を使用してＰＬＬ２０ＡＶＣ釦い
て局部発振信号Ｓ１が形成される。Then, using this signal S6, the PLL 20AVC button is pressed to generate the local oscillation signal S1.
すなわち、ＶＣＯ２１の共振回路３１は、例えば可変容
量ダイオード３１Ｄと、バリコン３６ ＣＶＣ連動する
バリコン３１Ｃと、コイル３１とによって構成され、バ
リコン３１Ｃの操作につれて自走周波数が２９．０５５
〜３９．０５５ＭＨ２Ｏ間を変化する発振信号Ｓ１が取
り出される。That is, the resonant circuit 31 of the VCO 21 is configured by, for example, a variable capacitance diode 31D, a variable capacitor 31C that is linked to the variable capacitor 36 CVC, and a coil 31, and as the variable capacitor 31C is operated, the free-running frequency increases to 29.055.
An oscillation signal S1 varying between 39.055 MH2O and 39.055 MH2O is taken out.
そして、この信号Ｓ１がミキサ回路（周波数コンバータ
）２２に供給されると共に、ＶＣＯ２６から信号Ｓ６が
ミキサ回路２２に供給され、そのミキサ出力がローパス
フィルタ２３（カントオフ周波数は例えば −４ＭＨ２
）に供給されて信号Ｓ１．Ｓ６ の差の周波数の信号
Ｓ３が取り出される。Then, this signal S1 is supplied to a mixer circuit (frequency converter) 22, and a signal S6 is supplied from the VCO 26 to the mixer circuit 22, and the mixer output is sent to a low-pass filter 23 (cant-off frequency is, for example, -4MH2
) is supplied to the signal S1. A signal S3 with a frequency difference of S6 is extracted.
そして、この信号Ｓ３が位相比較回路２４Ｖｃ供給され
ると共に、ＶＦＯ（可変周波数発振回路）２５からその
共振回路３５の操作につれて例えば周波数１．０５５〜
２．０５５ＭＨ２の間を変化する発振信号Ｓ５が取り出
され、この信号Ｓ５が比較回路２４に供給され、その比
較出力がダイオード３１ＤＫその制御電圧として供給さ
れる。Then, this signal S3 is supplied to the phase comparator circuit 24Vc, and as the resonance circuit 35 is operated from the VFO (variable frequency oscillator) 25, the frequency ranges from 1.055 to
An oscillation signal S5 varying between 2.055 MH2 is taken out, this signal S5 is supplied to the comparison circuit 24, and the comparison output is supplied as the control voltage of the diode 31DK.
従って、定常状態では、信号Ｓ３の周波数は、信号Ｓ５
の周波数に等しく、共振回路３５の操作につれて周波数
１．０５５〜２．０５５ＭＨ２Ｏ間を変化すると共に、
信号Ｓ１ の周波数は、信号Ｓ３＋８６ の和の周波数
であるから、信号Ｓ１の周波数は、信号Ｓ６ の周波数
ｆ６が例えば２８ＭＨ７の場合には、共振回路３５の操
作につれて周波数２９．０５５〜３０．０５５ＭＨ２の
間を変化し、信号Ｓ６ の周波数ｆ６が例えば３７ＭＨ
７の場合には、共振回路３５の操作につれて周波数３８
．０５５〜３９．０５５ＭＨ２の間を変化する。Therefore, in steady state, the frequency of signal S3 is equal to the frequency of signal S5
is equal to the frequency of , and varies between 1.055 and 2.055 MH2O as the resonance circuit 35 is operated, and
Since the frequency of the signal S1 is the frequency of the sum of the signals S3+86, if the frequency f6 of the signal S6 is, for example, 28MH7, the frequency of the signal S1 will change from 29.055 to 30.055MH2 as the resonance circuit 35 is operated. For example, the frequency f6 of the signal S6 is 37MH
7, the frequency 38 increases as the resonant circuit 35 operates.
．． It varies between 055 and 39.055 MH2.
従って、バリコン３１Ｃ，３６Ｃの操作により局部発振
信号Ｓ１の周波数は、１ＭＨ２ステップで変化し、共振
回路３５の操作によりその１ＭＨ２のステップ内を連続
的に変化する。Therefore, the frequency of the local oscillation signal S1 changes in 1 MH2 steps by operating the variable capacitors 31C and 36C, and changes continuously within the 1 MH2 steps by operating the resonance circuit 35.
従って、バリコン３１Ｃ，３６Ｃの操作により受信周波
を１ＭＨ２ステップでバンド切り換え（粗同調）ができ
、共振回路３５の操作により微同調ができる。Therefore, by operating the variable capacitors 31C and 36C, the band switching (coarse tuning) of the reception frequency can be performed in 1 MH2 steps, and by operating the resonance circuit 35, fine tuning can be performed.
こうして、この発明によれば、信号Ｓ６は、発振回路２
８の発振信号を基準とし、これにロックされるが、この
場合、特に、バリコン３１Ｃ２３６ＣＫよって信号Ｓ１
． Ｓ６ の自走周波数を変化させているので、信号Ｓ
１．Ｓ６の周波数が高くなっても、その差の周波数（信
号Ｓ３の周波駒は、１．０５５〜２．０５５ＭＨ２でほ
ぼ一定であると共に低くなり、従って、プリミックス方
式に釦げるプリスケーラ−やプログラマブルデバイダな
どを必要としないので、コストダウンができる。Thus, according to the invention, the signal S6 is transmitted to the oscillator circuit 2.
The oscillation signal of S8 is used as a reference and is locked to this, but in this case, in particular, the signal S1 is
．． Since the free running frequency of S6 is changed, the signal S
1. Even if the frequency of S6 becomes higher, the frequency of the difference (the frequency frame of signal S3 is almost constant at 1.055 to 2.055 MH2 and becomes lower. Therefore, the prescaler and programmable Since no divider is required, costs can be reduced.
また、分周を行わないので、信号Ｓ１ のＣ／Ｎが良好
になる。Furthermore, since no frequency division is performed, the C/N ratio of the signal S1 is improved.
さらに、ヘテロダイン方式ではあるが、受信バンドのバ
ンド数たけ水晶発振子を必要とすることもなく、この点
からもコストダウンができる。Furthermore, although it is a heterodyne system, it does not require as many crystal oscillators as there are reception bands, and from this point of view as well, costs can be reduced.
また、バンド切り換え（粗同調）に対応する周波数の切
り換えが、バリコン３１Ｃ，３６Ｃで行うことができる
ので、多接点スイッチを使用する場合に比べ、信頼度が
向上する。Further, since frequency switching corresponding to band switching (coarse tuning) can be performed using the variable capacitors 31C and 36C, reliability is improved compared to the case where a multi-contact switch is used.
第３図の例に釦いては、この発明を、受信ハンドがＯ〜
３０ＭＨ２の受信機に適用した場合である。In the example of FIG.
This is a case where it is applied to a 30MH2 receiver.
この場合、この受信バンドは、３つのバンド０〜１０．
１０〜２０．２０〜３０ＭＨ２Ｋ分割され、第１のバン
ド切り換えにより、この３つのバンドのうちの１つが選
択され、この選択されたバンドに対してＩＭＨ２単位の
第２のバンド切り換え（粗同調）が行われ、さらに微同
調により目的とする周波数が選択される。In this case, this reception band consists of three bands 0-10.
10~20.20~30MH2K is divided, one of these three bands is selected by the first band switching, and the second band switching (coarse tuning) in IMH2 units is performed for this selected band. The target frequency is then selected by fine tuning.
すなわち、ブリセレクタ２は、第１のバンド切り換えに
対応して通常帯域が、Ｏ〜１０．１０〜２０．２０〜３
０ＭＨ２に切り換えられるようにされ、また、これに連
動したスイッチ４１ＶＣよって共振回路３１が切り換え
られ、ＶＣＯ２１の発振信号Ｓ１ の自走周波数は、
例えば１９．０５５〜２９．０５５，２９．０５５〜３
９．０５５． ３９．０５５〜４９．０５５ＭＨ２に切
り換えられる。That is, the preselector 2 has a normal band of O~10.10~20.20~3 in response to the first band switching.
0MH2, and the resonant circuit 31 is switched by the switch 41VC interlocked with this, and the free running frequency of the oscillation signal S1 of the VCO 21 is
For example 19.055~29.055, 29.055~3
9.055. It can be switched from 39.055 to 49.055MH2.
さらに、発振回路２８の発振周波数は、例えば１０ＭＨ
２とされ、この発振信号が分周回路４８に供給されて周
波数ＩＭＨ２の分周信号にされ、この信号がハーモニッ
クジェネレータ２９に供給される。Furthermore, the oscillation frequency of the oscillation circuit 28 is, for example, 10MH.
2, this oscillation signal is supplied to the frequency dividing circuit 48 to be a frequency-divided signal of frequency IMH2, and this signal is supplied to the harmonic generator 29.
従って、この場合にも、第１図の受信機と同様、ＶＣ０
２６の発振信号Ｓ６の周波数ｆ６は、共振回路３６の操
作（粗同調）につれて周波数２８〜３７ＭＨ２の間を１
ＭＨ２ステップで変化する。Therefore, in this case as well, VC0
As the resonance circuit 36 is operated (roughly tuned), the frequency f6 of the oscillation signal S6 of 26 changes between frequencies 28 and 37 MH2.
Changes in MH2 steps.
そして、ミキサ回路２２の出力が、ローパスフィルタ４
２（カットオフ周波数は例えば１４ＭＨ２に供給され、
このフィルタ出力がミキサ回路４３に供給されると共に
、発振回路２８の発振信号が、アンプ４６を通じてミキ
サ回路４３に供給され、ミキサ回路４３の出力がローパ
スフィルタ２３を通じて比較°回路２４に供給される。Then, the output of the mixer circuit 22 is transmitted to the low-pass filter 4.
2 (the cut-off frequency is supplied to e.g. 14MH2,
This filter output is supplied to the mixer circuit 43, the oscillation signal of the oscillation circuit 28 is supplied to the mixer circuit 43 through the amplifier 46, and the output of the mixer circuit 43 is supplied to the comparison circuit 24 through the low-pass filter 23.
従って、ダイアル操作により信号Ｓ１の周波数が１９．
０５５〜２９．０５５ＭＨ２０間を変化する場合には、
信号Ｓ６ の周波数ｆ６ が２８〜３７ＭＨ２の間を変
化するので、フィルタ４２からは周波数が８．９４５〜
７．９４５ＭＨ７の間を変化するビート信号が取り出さ
れ、この信号がミキサ回路４３ＫＬ−いて、アンプ４６
からの周波数１０Ｍ馬の信号によって、周波数１．０５
５〜２．０５５ＭＨ２の間を変化する信号Ｓ３にビート
ダウンされる。Therefore, by operating the dial, the frequency of the signal S1 becomes 19.
When changing between 055 and 29.055MH20,
Since the frequency f6 of the signal S6 changes between 28 and 37 MH2, the frequency from the filter 42 varies between 8.945 and 37 MH2.
A beat signal varying between 7.945MH7 is taken out, and this signal is sent to a mixer circuit 43KL- and an amplifier 46.
By the frequency 10M horse signal from the frequency 1.05
It is beat down to signal S3 which varies between 5 and 2.055 MH2.
そして、信号Ｓ１ の周波数よりも第１中間周波数１９
．０５５ＭＨ２だげ低い周波数が、受信周波数であるか
ら、この場合には、周波数Ｏ〜１０ＭＨ２が受信バンド
となる。Then, the first intermediate frequency 19 is higher than the frequency of the signal S1.
．． Since the frequency as low as 055 MH2 is the reception frequency, in this case, the reception band ranges from frequencies O to 10 MH2.
また、信号Ｓ１ の周波数が２９．０５５〜３９．０５
５ＭＨ２Ｏ間を変化する場合には（第１図の例と同じ）
、フィルタ４２からのビート信号の周波数は、１．０５
５〜２．０５５ＭＨ２Ｏ間を変化するので、この信号が
、ミキサ回路４３及びフィルタ２３を通じて比較回路２
４に信号Ｓ３として供給される。Also, the frequency of signal S1 is 29.055 to 39.05
When changing between 5MH2O (same as the example in Figure 1)
, the frequency of the beat signal from the filter 42 is 1.05
Since the signal changes between 5 and 2.055 MH2O, this signal passes through the mixer circuit 43 and filter 23 to the comparison circuit 2.
4 as signal S3.
そして、この場合には、ミキサ回路４３において、アン
プ４６からの信号とのビート信号が形成されても、これ
はフィルタ２３の帯域外なので、比較回路２４には供給
されない。In this case, even if a beat signal is formed with the signal from the amplifier 46 in the mixer circuit 43, it is outside the band of the filter 23 and is therefore not supplied to the comparison circuit 24.
従って、この場合には、周波数１０〜２０ＭＨ２が受信
バンドとなる。Therefore, in this case, frequencies 10 to 20 MH2 become the receiving band.
さらに、信号Ｓ１ の周波数が３９．０５５〜４９．０
５５ＭＨ２０間を変化する場合には、フィルタ４２から
のビート信号は、１１．０５５〜１２．０５５ＭＨ２Ｏ
間を変化し、この信号がミキサ回路４３に釦いて周波数
１．０５５〜２．０５５ＭＨ２Ｏ間を変化する信号８３
にビートダウンされる。Furthermore, the frequency of signal S1 is 39.055 to 49.0
When changing between 55MH20, the beat signal from the filter 42 is 11.055~12.055MH2O
This signal switches the mixer circuit 43 to generate a signal 83 whose frequency changes between 1.055 and 2.055 MH2O.
will be beat down.
従って、この場合には、周波数２０〜３０ＭＨ２が受信
バンドとなる。Therefore, in this case, the frequency 20 to 30 MH2 becomes the receiving band.
従って、この受信機では、Ｏ〜３０ＭＨ２が受信バンド
となる。Therefore, in this receiver, the reception band is 0 to 30MH2.
第１図及び第３図はこの発明の一例の系統図、第２図は
その説明のための図である。
２１ 、２６ハＶＣ０，２２＋！ミキ？回路、２４゜２
６は位相比較回路、２５はＶＦｏ、２８は発振回路であ
る。1 and 3 are system diagrams of an example of the present invention, and FIG. 2 is a diagram for explaining the same. 21,26ha VC0,22+! Miki? Circuit, 24°2
6 is a phase comparator circuit, 25 is a VFo, and 28 is an oscillation circuit.
Claims (1)
調波成分を有する信号Ｓ９とを第１の位相比較回路２７
ＶＣｉ−いて位相比較し、この位相比較出力を上記第１
のＶＣ０２６にその制御電圧として供給し、上記第１の
ＶＣＯ２６の発振出力Ｓ６ と、第２のＶＣＯ２１の
発振出力Ｓ１ とをミキサ回路２２に供給してビート信
号Ｓ３を得、このビート信号Ｓ３ と、ＶＦＯ２５の発
振出力Ｓ５ とを第２の位相比較回路２４において位
相比較し、この位相比較出力を上記第２のＶＣ０２１に
その制御電圧として供給すると共に、上記第１のＶＣＯ
２６及び上記第２のＶＣＯ２１の自走周波数を決定する
可変リアクタンス素子３６Ｃ及び３１Ｃを互いに連動さ
せ、この可変リアクタンス素子３６Ｃ２３１Ｃのリアク
タンス変化に基づいて上記第２のＶＣＯ２１の発振周波
数をステップ的に変化させ、かつ、上記ＶＦＯ２５の発
振周波数の変化に基づいて上記第２のＶＣＯ２１の発振
周波数を、上記ステップ的に変化する各ステップ内に釦
いて連続的に変化させ、この第２のＶＣＯ２１の発振出
力Ｓ０を外部出力として取り出すようにした発振器。 ２ 第１のＶＣＯ２６の発振出力Ｓ６ と、複数の高周
波成分を有する信号Ｓ９ とを第１の位相比較回路２７
Ｖｃｈいて位相比較し、この位相比較出力を上記第１の
ＶＣＯ２ｔｌその制御電圧として供給し、上記第１のＶ
ＣＯ２６の発振出力Ｓ６ と、第２のＶＣＯ２１の発振
出力Ｓ１ とをミキサ回路２２に供給してビート信号
Ｓ３を得、このビート信号Ｓ３と、ＶＦＯ２５の発振出
力Ｓ５ とを第２の位相比較回路２４において位相比較
し、この位相比較出力を上記第２のＶＣＯ２１にその制
御電圧として供給し、上記第１のＶＣＯ２６及び上記第
２のＶＣＯ２１の自走周波数を決定する可変リアクタン
ス素子３６Ｃ及び３１Ｃを互いに連動させ、この可変リ
アクタンス素子３６Ｃ，３１Ｃのリアクタンス変化に基
づいて上記第２のＶＣＯ２１の発振周波数をステップ的
に変化させ、かつ、上記ＶＦＯ２５の発振周波数の変化
に基づいて上記第２のＶＣＯ２１の発振周皮数を、上記
ステップ的に変化する各ステップ内において連続的に変
化させ、この第２のＶＣＯ２１の発振出力Ｓ１ を外部
出力として取り出すと共に、上記ビート信号Ｓ３を上記
第２の位相比較回路２４に供給するとき、別のミキサ回
路４３にお・いてビートダ！７／してから上記第２の位
相比較回路２４に供給することにより、上記第２のＶＣ
Ｏ２１の発振周波数をさらに変更するようにした発振器
。[Claims] 1. The oscillation output S6 of the first VCO 26 and the signal S9 having a plurality of harmonic components are connected to the first phase comparison circuit 27.
The phase of the VCi is compared, and this phase comparison output is used as the first
The oscillation output S6 of the first VCO 26 and the oscillation output S1 of the second VCO 21 are supplied to the mixer circuit 22 to obtain a beat signal S3, and this beat signal S3 and The phase comparison circuit 24 compares the phase of the oscillation output S5 of the VFO 25 with the oscillation output S5 of the VFO 25, and supplies this phase comparison output to the second VC021 as its control voltage.
26 and the variable reactance elements 36C and 31C that determine the free running frequency of the second VCO 21 are interlocked with each other, and the oscillation frequency of the second VCO 21 is changed in steps based on the reactance change of the variable reactance element 36C 231C. , and based on the change in the oscillation frequency of the VFO 25, the oscillation frequency of the second VCO 21 is changed continuously by pressing a button within each of the stepwise changing steps, and the oscillation output S0 of the second VCO 21 is changed. An oscillator that extracts as an external output. 2 The oscillation output S6 of the first VCO 26 and the signal S9 having a plurality of high frequency components are connected to the first phase comparison circuit 27.
Vch, the phase is compared, and this phase comparison output is supplied as the control voltage of the first VCO2tl.
The oscillation output S6 of the CO 26 and the oscillation output S1 of the second VCO 21 are supplied to the mixer circuit 22 to obtain a beat signal S3, and this beat signal S3 and the oscillation output S5 of the VFO 25 are sent to the second phase comparison circuit 24. The phase comparison output is supplied to the second VCO 21 as its control voltage, and the variable reactance elements 36C and 31C, which determine the free running frequencies of the first VCO 26 and the second VCO 21, are interlocked with each other. The oscillation frequency of the second VCO 21 is changed stepwise based on the reactance changes of the variable reactance elements 36C and 31C, and the oscillation frequency of the second VCO 21 is changed based on the change in the oscillation frequency of the VFO 25. The oscillation output S1 of the second VCO 21 is taken out as an external output, and the beat signal S3 is sent to the second phase comparator circuit 24 by continuously changing the number of pulses in each of the stepwise changing steps. When supplying beat da! in another mixer circuit 43. 7/ and then supplying it to the second phase comparator circuit 24, the second VC
An oscillator that further changes the oscillation frequency of O21.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52128917A JPS5829899B2 (en) | 1977-10-27 | 1977-10-27 | oscillator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52128917A JPS5829899B2 (en) | 1977-10-27 | 1977-10-27 | oscillator |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6373681A Division JPS56165424A (en) | 1981-04-27 | 1981-04-27 | Oscillator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5461861A JPS5461861A (en) | 1979-05-18 |
| JPS5829899B2 true JPS5829899B2 (en) | 1983-06-25 |
Family
ID=14996558
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP52128917A Expired JPS5829899B2 (en) | 1977-10-27 | 1977-10-27 | oscillator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5829899B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61156675U (en) * | 1985-03-19 | 1986-09-29 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5023266A (en) * | 1973-06-28 | 1975-03-12 | ||
| JPS5143614A (en) * | 1974-10-14 | 1976-04-14 | Oki Electric Ind Co Ltd | SHUHASUSHINSESAIZA HOSHIKI |
| JPS5161758A (en) * | 1974-11-27 | 1976-05-28 | Oki Electric Ind Co Ltd |
-
1977
- 1977-10-27 JP JP52128917A patent/JPS5829899B2/en not_active Expired
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5023266A (en) * | 1973-06-28 | 1975-03-12 | ||
| JPS5143614A (en) * | 1974-10-14 | 1976-04-14 | Oki Electric Ind Co Ltd | SHUHASUSHINSESAIZA HOSHIKI |
| JPS5161758A (en) * | 1974-11-27 | 1976-05-28 | Oki Electric Ind Co Ltd |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61156675U (en) * | 1985-03-19 | 1986-09-29 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5461861A (en) | 1979-05-18 |
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