JPS5828759B2 - multilayer printed board - Google Patents

multilayer printed board

Info

Publication number
JPS5828759B2
JPS5828759B2 JP54105952A JP10595279A JPS5828759B2 JP S5828759 B2 JPS5828759 B2 JP S5828759B2 JP 54105952 A JP54105952 A JP 54105952A JP 10595279 A JP10595279 A JP 10595279A JP S5828759 B2 JPS5828759 B2 JP S5828759B2
Authority
JP
Japan
Prior art keywords
multilayer printed
printed board
base material
conductor
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54105952A
Other languages
Japanese (ja)
Other versions
JPS5630791A (en
Inventor
清隆 宮川
清 高木
啓治 黒沢
勇吉 竹田
勝比古 白井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54105952A priority Critical patent/JPS5828759B2/en
Publication of JPS5630791A publication Critical patent/JPS5630791A/en
Publication of JPS5828759B2 publication Critical patent/JPS5828759B2/en
Expired legal-status Critical Current

Links

Description

【発明の詳細な説明】 本発明は多層プリント板に関し、特に各層の導体保持基
材(以下、単に「基材」とも略記)に金属板を用いた中
空多層プリント板に係るものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a multilayer printed board, and more particularly to a hollow multilayer printed board using a metal plate as a conductor holding base material (hereinafter simply referred to as "base material") of each layer.

従来の多層プリント板においては、各層の導体保持基材
としてガラス布積層板やセラミックが使用されている。
In conventional multilayer printed boards, glass cloth laminates or ceramics are used as conductor-holding base materials for each layer.

しかし、これら従来の基材には高精度高密度の多層プリ
ント板を実現する上で次のような問題点がある。
However, these conventional base materials have the following problems in realizing a high-precision, high-density multilayer printed board.

すなわち、高精度高密度の多層プリント板を実現するに
は、寸法変化(吸脱湿に伴なう変化、エツチング時の変
化、機械加工時の変化、レジスト硬化収縮に伴なう変化
などを含む)の小さい高寸法安定性、高い熱伝導性、完
全な絶縁性、層間クロストークの減少、更には搭載部品
の直接ボンディングのための高耐熱性などが重要な条件
である。
In other words, in order to realize a high-precision, high-density multilayer printed board, dimensional changes (including changes due to moisture absorption and desorption, changes during etching, changes during machining, changes due to resist curing shrinkage, etc.) Important conditions include high dimensional stability, high thermal conductivity, perfect insulation, reduced interlayer crosstalk, and high heat resistance for direct bonding of mounted components.

しかし、従来のガラス布積層板等ではこれらの条件を満
足することは不可能に近い。
However, it is nearly impossible to satisfy these conditions with conventional glass cloth laminates and the like.

またセラミックでは大型プリント板の製作が困難であり
、機械的な曲げに対して非常に弱いという欠点がある。
Furthermore, it is difficult to manufacture large-sized printed boards using ceramics, and they have the drawback of being extremely susceptible to mechanical bending.

従って本発明は基本的には高精度高密度の多層プリント
板の実現を意図し、具体的にはそのための前記のような
条件の達成を可能とする導体保持基材を提供することが
目的である。
Therefore, the present invention basically intends to realize a high-precision, high-density multilayer printed board, and specifically aims to provide a conductor-holding base material that makes it possible to achieve the above-mentioned conditions. be.

本発明は、かかる目的を達成するために、多層プリント
板における導体保持基材として、孔あけ後の金属板に絶
縁処理を施こしたものを用いることを要旨とするもので
ある。
In order to achieve this object, the gist of the present invention is to use, as a conductor-holding base material in a multilayer printed board, a metal plate that has been subjected to insulation treatment after drilling holes.

本発明のかかる構成によれば、次のような多くの利点が
得られる。
According to this configuration of the present invention, many advantages can be obtained as follows.

(イ)高い寸法安定性の実現。(a) Achieving high dimensional stability.

すなわち、基材が金属であるため従来使用の基材に比べ
て弾性係数が増大し、吸脱湿に伴なう寸法変化、エツチ
ング時の寸法変化、機械加工時の寸法変化、またはレジ
ストないしプリプレグの硬化収縮に伴なう寸法変化が極
めて少なく、高精度の製作が可能である。
In other words, since the base material is metal, the elastic modulus is increased compared to conventionally used base materials, resulting in dimensional changes due to moisture absorption and desorption, dimensional changes during etching, dimensional changes during machining, or resist or prepreg. Dimensional changes due to curing shrinkage are extremely small, allowing for highly accurate manufacturing.

(ロ)高い熱伝導性の実現。(b) Achieving high thermal conductivity.

すなわち、金属基材は従来使用の基材に比べて熱伝導率
が大きく、従つてすぐれた放熱性ないし冷却性が得られ
、また熱応力による局部歪などの不具合の発生もない。
That is, the metal base material has a higher thermal conductivity than conventionally used base materials, and therefore provides excellent heat dissipation or cooling performance, and also does not cause problems such as local distortion due to thermal stress.

←→ 層間クロストークの減少。←→ Reduction of interlayer crosstalk.

に)高耐熱性の実現。) Realization of high heat resistance.

すなわち、金属基材の使用はプリント板の耐熱温度を高
め、従って表面層への部品実装に際し直接ボンディング
するなど高温での処理が可能である。
That is, the use of a metal base material increases the heat resistance temperature of the printed board, and therefore, it is possible to perform high-temperature processing such as direct bonding when mounting components on the surface layer.

(力 構造の簡略化。(Simplification of force structure.

すなわち、金属基材はこれを電源層およびアース層とし
て利用することができ、従ってこれらの層の別途設ける
必要がなく、構造を簡単にできる。
That is, the metal base material can be used as a power supply layer and a ground layer, so there is no need to separately provide these layers, and the structure can be simplified.

さて、ここで多層プリント板の積層構造について注目す
ると、次のような2種類の構造がある。
Now, if we pay attention to the laminated structure of multilayer printed boards, there are two types of structures as follows.

その第1は、表面層または中間層をなすプリント基板を
接着用基材(プリプレグ)を介し積層一体化するもので
ある。
The first method is to laminate and integrate printed circuit boards forming a surface layer or an intermediate layer via an adhesive base material (prepreg).

そして第2は、樹脂接着剤を用いず、プリント基板に形
成された導体を兼ねる支柱を直接接続させて一体化積層
するものである。
The second method is to directly connect struts formed on a printed circuit board that also serve as conductors, without using a resin adhesive, and to integrate and laminate them.

第2構造の多層プリント板は層間が中空で、ここに空気
などの気体や不活性な液体を満たして絶縁材として使用
するものであり、前者の構造と比較して多くのすぐれた
利点を有する。
The second structure of multilayer printed boards has hollow spaces between the layers, which are filled with air or other gas or inert liquid to be used as an insulating material, and have many advantages over the former structure. .

かかる中空多層プリント板に上記のような金属基材を用
いた場合、前述の(イ)〜(ホ)の効果が特に著しく、
しかも次のような付加的効果が得られる。
When the above-mentioned metal base material is used in such a hollow multilayer printed board, the effects (a) to (e) described above are particularly remarkable.
Moreover, the following additional effects can be obtained.

(ハ)すなわち、耐熱が著しく向上するため、搭載部品
の直接ボンディングは勿論のこと、プリント基板の一体
化積層をレーザーまたは高温炉を用いて行なうことが可
能であり、層間接続の信頼性を著しく向上させることが
できる。
(c) In other words, because the heat resistance is significantly improved, it is possible not only to directly bond mounted components but also to perform integrated lamination of printed circuit boards using a laser or high-temperature furnace, which significantly improves the reliability of interlayer connections. can be improved.

以下、本発明について実施例にもとづき添付図面を参照
して説明する。
Hereinafter, the present invention will be explained based on embodiments with reference to the accompanying drawings.

添付図面は、本発明を適用した中空多層プリント板の構
造工程における各状態を示している。
The accompanying drawings show various states in the construction process of a hollow multilayer printed board to which the present invention is applied.

(1)まず、基材の素材として、例えばアルミニウム(
At)、マグネシウム(Mg)、チタン(Ti)、タリ
ウム(TI)等の陽極酸化され易い金属の板10を用意
する。
(1) First, as a material for the base material, for example, aluminum (
A plate 10 of a metal that is easily anodized, such as At), magnesium (Mg), titanium (Ti), or thallium (TI), is prepared.

(2)金属板10にドリル加工、レーザー加工、または
化学的方法(エツチング)によって必要な部分にのみ孔
11をあげる。
(2) Holes 11 are formed in the metal plate 10 only in necessary areas by drilling, laser processing, or chemical methods (etching).

(3)次に、孔あけした金属板10の全表面および全孔
壁を陽極酸化し、絶縁被膜12を形成する。
(3) Next, the entire surface of the perforated metal plate 10 and the walls of all the holes are anodized to form the insulating coating 12.

これで導体保持基材ができ上る。This completes the conductor holding base material.

なお、基材の絶縁被膜の形成方法としてE陽極酸化に限
らず、絶縁材料を付着させて形成させる方法、例えば樹
脂または無機材のコーティングあるいは非導体のスパッ
タリングによっても可能である。
Note that the method for forming the insulating film on the base material is not limited to E-anodization, but may also be formed by attaching an insulating material, such as coating with a resin or inorganic material, or sputtering with a non-conductor.

そして最も有利な構造は、陽極酸化による第1の絶縁被
膜12の上に更に絶縁材料の付着による第2の絶縁被膜
13を積層形成する構造である。
The most advantageous structure is a structure in which a second insulating film 13 formed by adhering an insulating material is further laminated on the first insulating film 12 formed by anodic oxidation.

つまり、陽極酸化絶縁被膜は均質な被膜が得られるが、
膜厚を厚くするとピンホールり発生確率が増大する短所
がある。
In other words, the anodized insulation film provides a homogeneous film, but
Increasing the film thickness has the disadvantage of increasing the probability of pinhole formation.

しかし絶縁被膜が薄いとそれだけ強度が小さくなり、積
層時の圧力によってひび割れなどが生じるなど絶縁信頼
性の低下につながる。
However, the thinner the insulation coating is, the lower its strength will be, leading to a decrease in insulation reliability, such as cracking caused by the pressure during lamination.

一方、絶縁材料付着被膜は膜厚の確保には問題ないが、
陽極酸化膜に比べて均質性が劣る短所がある。
On the other hand, there is no problem in securing the film thickness with the insulating material adhesion film, but
The disadvantage is that it is less homogeneous than an anodic oxide film.

従って、まず比較的薄いピンホールのない均質な陽極酸
化膜12を形成し、その上から絶縁材料付着被膜13を
所要膜厚となるまで形成すれば、両者の長所が活かされ
たすぐれた絶縁被膜が形成される。
Therefore, by first forming a relatively thin homogeneous anodic oxide film 12 without pinholes, and then forming the insulating material adhesion film 13 on top of it until the required thickness is reached, an excellent insulating film that takes advantage of the advantages of both can be obtained. is formed.

(4)次に第(3)工程で製作した基材に導体層を形成
するが、それにはまず全表面および全孔壁面に無電解メ
ッキ、印刷、イオンブレーティング、または蒸着などの
方法を単独ないし併用して導体膜14を形成する。
(4) Next, a conductor layer is formed on the base material produced in step (3), but first, a method such as electroless plating, printing, ion blating, or vapor deposition is applied to the entire surface and wall surfaces of all holes. The conductive film 14 is formed by using the above-described methods or in combination.

必要ならば更に電解メッキで膜厚の積上げを行なう。If necessary, the film thickness is further increased by electrolytic plating.

(5)そして感光性の樹脂または無機材をラミネートし
、パターン露光および現像により、不要導体部にメツキ
レシスト15を形成する(必要導体部が露出)。
(5) Then, a photosensitive resin or an inorganic material is laminated, and by pattern exposure and development, a plating resist 15 is formed on the unnecessary conductor part (the necessary conductor part is exposed).

(6)電解メッキまたは印刷によってパターンおよび孔
に導体層16を形成する。
(6) Form a conductive layer 16 in the pattern and holes by electrolytic plating or printing.

必要ならばその表面を平滑にする。Smooth the surface if necessary.

場合によっては更に、導体層に導体層金属に比べて低融
点の合金または金属(金、スズなど)をメッキ、印刷ま
たは蒸着などによって付着させる。
In some cases, an alloy or metal (gold, tin, etc.) having a lower melting point than the conductor layer metal is further attached to the conductor layer by plating, printing, vapor deposition, or the like.

これは後述するようにプリント基板を熱圧着によって一
体積層化するのに用いられる。
This is used to stack printed circuit boards together by thermocompression bonding, as will be described later.

(7)次にレジスト15を除去し、フラッシュエツチン
グにより第(4)工程で形成した不要導体を除去する。
(7) Next, the resist 15 is removed, and the unnecessary conductor formed in step (4) is removed by flash etching.

これによりプリント基板ができ上る。なお、導体パター
ン16を印刷で形成した場合は、これを半固化させた後
にレジスト除去およびエツチングを行ない、最終的に高
温加熱して金属化する。
This completes the printed circuit board. Note that when the conductor pattern 16 is formed by printing, the resist is removed and etched after semi-solidifying the conductor pattern 16, and finally it is heated to a high temperature and metallized.

(8)第(7)工程で製作されたプリント基板(表面層
および中間層)20を他のプリント基板(接着層)21
と積み重ね、加熱および加圧、またはレーザーにより接
続部を溶融し、一体化積層する。
(8) The printed circuit board (surface layer and intermediate layer) 20 produced in step (7) is attached to another printed circuit board (adhesive layer) 21
The connected parts are melted using heat and pressure, or laser, and then integrated and laminated.

整形後、必要ならば外周に無機材または樹脂のシール2
3を施こす。
After shaping, if necessary, apply an inorganic or resin seal 2 to the outer periphery.
Perform step 3.

このシールに穴あけして層間中空部22に絶縁用の気体
または液体を封入する。
A hole is made in this seal and an insulating gas or liquid is sealed in the interlayer hollow part 22.

以上のように、本発明によれば、導体保持基材の改良に
よって非常にすぐれた多層プリント板の実現が可能とな
り、その技術的波及効果は増大である。
As described above, according to the present invention, an extremely superior multilayer printed board can be realized by improving the conductor holding base material, and its technological ripple effects are increasing.

【図面の簡単な説明】[Brief explanation of drawings]

本図は本発明の一実施である中空多層プリント板の製造
工程における各状態を示す図である。 図において、10は金属板、11は孔、12゜13は絶
縁被膜、14は導体膜、15はレジスト、16は導体層
、20,21はプリン)・基板、22は層間中空部を示
す。
This figure is a diagram showing various states in the manufacturing process of a hollow multilayer printed board, which is an embodiment of the present invention. In the figure, 10 is a metal plate, 11 is a hole, 12 and 13 are insulating coatings, 14 is a conductor film, 15 is a resist, 16 is a conductor layer, 20 and 21 are a printed circuit board, and 22 is an interlayer hollow part.

Claims (1)

【特許請求の範囲】[Claims] 1 金属基材にスルーホールを穿設し、絶縁処理を施し
、導体層を形成して成るプリント基板を複数枚重ね合わ
せ、該プリント基板の導体兼用の接続部を溶融接続して
一体化積層したことを特徴とする中空多層プリント板。
1 A plurality of printed circuit boards made by drilling through holes in a metal base material, applying insulation treatment, and forming a conductor layer are stacked together, and the connecting portions of the printed circuit boards that also serve as conductors are melted and laminated. A hollow multilayer printed board characterized by:
JP54105952A 1979-08-22 1979-08-22 multilayer printed board Expired JPS5828759B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54105952A JPS5828759B2 (en) 1979-08-22 1979-08-22 multilayer printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54105952A JPS5828759B2 (en) 1979-08-22 1979-08-22 multilayer printed board

Publications (2)

Publication Number Publication Date
JPS5630791A JPS5630791A (en) 1981-03-27
JPS5828759B2 true JPS5828759B2 (en) 1983-06-17

Family

ID=14421158

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54105952A Expired JPS5828759B2 (en) 1979-08-22 1979-08-22 multilayer printed board

Country Status (1)

Country Link
JP (1) JPS5828759B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69015878T2 (en) * 1989-04-17 1995-07-13 Ibm Multi-layer circuit board structure.
JP4689313B2 (en) * 2005-03-24 2011-05-25 キヤノン株式会社 Wiring sheet manufacturing method
KR20100125805A (en) * 2009-05-21 2010-12-01 삼성전기주식회사 Heat-dissipating substrate and fabricating method of the same
KR20120072801A (en) * 2010-12-24 2012-07-04 삼성전기주식회사 Board for radiating heat using electro-deposition coating and method for manufacturing the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51106052A (en) * 1975-02-04 1976-09-20 Takatsugu Komatsu INSATSUHAISENKIBANNOSEIZOHOHO
JPS5427358B2 (en) * 1974-06-07 1979-09-10

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5427358U (en) * 1977-07-28 1979-02-22

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5427358B2 (en) * 1974-06-07 1979-09-10
JPS51106052A (en) * 1975-02-04 1976-09-20 Takatsugu Komatsu INSATSUHAISENKIBANNOSEIZOHOHO

Also Published As

Publication number Publication date
JPS5630791A (en) 1981-03-27

Similar Documents

Publication Publication Date Title
US6159586A (en) Multilayer wiring substrate and method for producing the same
US6459047B1 (en) Laminate circuit structure and method of fabricating
US20090229862A1 (en) Multilayer printed wiring board and method of manufacturing the same
WO1980002633A1 (en) Hollow multilayer printed wiring board,and method of fabricating same
JP2007103939A (en) Printed circuit board incorporating electronic element and manufacturing method of the same
JP2001007468A (en) Wiring board, multilayered wiring board, and their manufacture
US20120321814A1 (en) Method of forming hole for interlayer connection conductor, method of producing resin substrate and component-incorporated substrate, and resin substrate and component-incorporated substrate
JP2002083893A (en) Semiconductor package substrate, semiconductor device and their manufacturing methods
JP2881270B2 (en) Method for manufacturing multilayer wiring board
JPS59198790A (en) Printed circuit board
JPS5828759B2 (en) multilayer printed board
JPH04162589A (en) Manufacture of polyimide multilayer interconnection board
JP4434163B2 (en) Semiconductor package substrate manufacturing method and semiconductor device manufacturing method
JP4124497B2 (en) Metal-ceramic composite substrate and manufacturing method thereof
JP3071764B2 (en) Film with metal foil and method of manufacturing wiring board using the same
JP2005302924A (en) Wiring board and its manufacturing method
JPH05144973A (en) Polyimide multilayer circuit board and manufacture thereof
JPS61121489A (en) Cu wiring sheet for manufacture of substrate
JPH0263141A (en) Manufacture of substrate for electronic component loading use
JPH081987B2 (en) Manufacturing method of wiring board
JPH0446479B2 (en)
JPS63274197A (en) Metal core printed circuit board
JPH081988B2 (en) Manufacturing method of wiring board
JPS5824958B2 (en) Method for manufacturing multilayer printed wiring board with multiple through holes
JPH08279684A (en) Metal base multilayered circuit board