JPS58181326A - Switch circuit - Google Patents

Switch circuit

Info

Publication number
JPS58181326A
JPS58181326A JP6423082A JP6423082A JPS58181326A JP S58181326 A JPS58181326 A JP S58181326A JP 6423082 A JP6423082 A JP 6423082A JP 6423082 A JP6423082 A JP 6423082A JP S58181326 A JPS58181326 A JP S58181326A
Authority
JP
Japan
Prior art keywords
signal
circuit
phase
signals
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6423082A
Other languages
Japanese (ja)
Other versions
JPH0328852B2 (en
Inventor
Junichi Hikita
純一 疋田
Takuzo Kamimura
上村 卓三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP6423082A priority Critical patent/JPS58181326A/en
Publication of JPS58181326A publication Critical patent/JPS58181326A/en
Publication of JPH0328852B2 publication Critical patent/JPH0328852B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H03K17/62Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors

Landscapes

  • Electronic Switches (AREA)

Abstract

PURPOSE:To prevent noise, by constituting a switch electronically which selects signals to be subjected to phase inversion and signals not requiring phase inversion. CONSTITUTION:A signal not changing the phase is given to input terminals 21-2n and a signal to change the phase is given to input terminals 31-3n. A control signal generator 46 generates control signals S1, S2 in response to external switches 481-48n. The two kinds of signals supplied from the terminals 21-2n, 31-3n are selected at a signal selecting circuit 44 and supplied to an inverting amplifier 50 and amplifiers 52, 54. A signal switching circuit 56 selects any one output of the amplifiers 52, 54 and supplies it to an output terminal 60.

Description

【発明の詳細な説明】 この発明はスイッチ回路に係り、特に位相反転等の位相
を変更すべき信号を含む複数の信号群から所望の信号を
選択し且つ位相変更すべき信号はその処理をして取り出
すことができる位相変更機(1) 能を持つスイッチ回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a switch circuit that selects a desired signal from a plurality of signal groups including signals whose phase should be changed, such as phase inversion, and processes the signal whose phase should be changed. The present invention relates to a switch circuit having a phase changer (1) function that can be taken out as a phase changer.

第1図は従来のこの種のスイ・ノチ回路を示している。FIG. 1 shows a conventional sui-nochi circuit of this type.

このスイッチ回路において、入力端子2には位相変更を
必要としない信号が与えられ、一方入力端子4には位相
変更すべき信号が与えられる。
In this switch circuit, input terminal 2 is supplied with a signal that does not require a phase change, while input terminal 4 is supplied with a signal whose phase should be changed.

このスイッチ回路にはこの2mの入力信号を選択するた
めのスイッチ6と、このスイッチ6で選択された信号を
位相変更機能を持つ増幅器Bの位相非反転端子(+)、
位相反転端子(−)の何れかの端子を選択して入力する
スイッチ10と、前記増幅器8に対するバイアス回路1
2からのバイアス入力を切り換えるスイッチ14を含ん
で構成されており、これらのスイッチ6.10及び14
は機械的なスイッチから成っている。即ち、これらのス
イッチ6ないし14を入力信号に応じて外部操作で切り
換えて所望の信号を選択し且つ位相変更を増幅器8で処
理した後、出力端子16から取り出すものである。
This switch circuit includes a switch 6 for selecting this 2m input signal, and a phase non-inverting terminal (+) of an amplifier B which has a phase change function for the signal selected by this switch 6.
a switch 10 for selecting and inputting one of the phase inversion terminals (-); and a bias circuit 1 for the amplifier 8;
The switch 14 switches the bias input from 6.10 and 14.
consists of a mechanical switch. That is, a desired signal is selected by externally switching the switches 6 to 14 according to the input signal, and the phase change is processed by the amplifier 8, after which the signal is taken out from the output terminal 16.

この場合、2つの信号入力を例に取っているが、選択す
べき信号入力が増加するに従って構成が複(2) 雑化するとともに、スイッチに機械的スイッチを使用し
た場合には切り換えについての信頼性が低く、高価で、
実装上のスペースが大となり、切り換え時にノイズを多
く発生する等の欠点を有するものである。
In this case, two signal inputs are taken as an example, but as the number of signal inputs to be selected increases, the configuration becomes more complex (2), and if a mechanical switch is used, the reliability of switching becomes less reliable. low quality, expensive,
This method has drawbacks such as requiring a large amount of mounting space and generating a lot of noise during switching.

この発明の目的は、従来回路の欠点を除き、位相反転等
の位相を変更すべき信号を含む複数の信号群から所望の
信号を選択し且つ位相変更すべき信号はその処理をして
取り出すことができるスイッチ回路の提供にある。
An object of the present invention is to eliminate the drawbacks of conventional circuits, select a desired signal from a plurality of signal groups including signals whose phase should be changed such as phase inversion, and process and extract the signal whose phase should be changed. The goal is to provide a switch circuit that can.

この発明は、位相を変更すべき1又は2以上の信号とそ
の変更を必要としない1又は2以上の信号が入力されこ
れら信号の内の1つを制御信号に基づき選択する信号選
択回路と、この信号選択回路の出力信号の位相を変更さ
せる位相変更回路と、この位相変更回路及び前記信号選
択回路の出力が与えられるとともに前記制御信号に基づ
き出力を切り換える信号切換回路と、この信号切換回路
及び前記信号選択回路に与えられる前記制御信号を発生
する制御信号発生回路とから構成したことを(3) 特徴とする。
The present invention provides a signal selection circuit which receives one or more signals whose phase should be changed and one or more signals whose phase does not need to be changed, and which selects one of these signals based on a control signal; a phase change circuit that changes the phase of the output signal of the signal selection circuit; a signal switching circuit that is supplied with the outputs of the phase change circuit and the signal selection circuit and that switches the output based on the control signal; (3) A control signal generation circuit that generates the control signal to be applied to the signal selection circuit.

この発明の実施例を図面を参照して詳細に説明する。第
2図及び第3図はこの発明の実施例を示し、第2図はス
イッチ回路、第3図はその動作波形である。図において
、入力端子21.22ないし2nには位相を変更しない
複数の信号が個別に与えられ、一方、入力端子31.3
2ないし3nには位相反転等、位相変更すべき複数の信
号が個別に与えられる。これら2種の信号群はそれぞれ
前置増幅器40.42で増幅された後、信号選択回路4
4に入力され、所望の信号が選択される。
Embodiments of the invention will be described in detail with reference to the drawings. 2 and 3 show an embodiment of the invention, FIG. 2 shows a switch circuit, and FIG. 3 shows its operating waveform. In the figure, input terminals 21.22 to 2n are individually supplied with a plurality of signals whose phases do not change, while input terminals 31.3
A plurality of signals whose phases should be changed, such as phase inversion, are individually applied to signals 2 to 3n. These two types of signal groups are amplified by preamplifiers 40 and 42, respectively, and then the signal selection circuit 4
4 and the desired signal is selected.

信号選択回路44は制御信号発生回路46が発生する制
御信号に基づき、前記信号の内の1つの信号を選択して
出力する電子スイッチで構成されている。
The signal selection circuit 44 is comprised of an electronic switch that selects and outputs one of the signals based on the control signal generated by the control signal generation circuit 46.

制御信号発生回路46は1又は2以上の外部スイッチ4
8□、482ないし48nのON、OFFの外部操作に
応動して前記制御信号S1と、この信号S1に対応して
位相処理された又は処理されていない信号の出力を切り
換えるための制御信(4) 号S2とを同時に発生するものである。外部スイッチ4
8.ないし48nは例えばキーボードスイッチで構成し
、そのキースイッチは前記選択すべき信号数に対応して
設定されるとともに、このキースイッチを兼用して選択
信号の処理モードの選択を同時に行えるようにするもの
とする。
The control signal generation circuit 46 includes one or more external switches 4
8 □, a control signal (4 ) No. S2 is generated at the same time. External switch 4
8. 48n are composed of keyboard switches, for example, and the key switches are set in accordance with the number of signals to be selected, and the key switches are also used to simultaneously select the processing mode of the selected signals. shall be.

前記前置増幅器40及び前記信号選択回路44を経て取
り出された信号は、位相変更回路としての反転増幅器5
0の反転端子(−)に入力され、反転処理が施される。
The signal taken out through the preamplifier 40 and the signal selection circuit 44 is sent to an inverting amplifier 5 as a phase changing circuit.
It is input to the 0 inversion terminal (-) and subjected to inversion processing.

なお、反転増幅器5oの非反転端子(+)にはバイアス
回路51より一定のバイアス入力が与えられている。
Note that a constant bias input is applied from a bias circuit 51 to the non-inverting terminal (+) of the inverting amplifier 5o.

この反転増幅器50及び前記信号選択回路44の各出力
信号は、中段増幅器52.54に個別に与えられて増幅
された後、信号切換回路56に入力され、何れか一方の
信号が選択されて出力される。この場合の信号選択の条
件は、位相変更しない信号又は位相変更すべき信号の選
択に対応して中段増幅器52.54の出力を取り出すも
のとする。こうして信号切換回路56で選択された信号
(5) は出力増幅器58で増幅された後、出力端子60より取
り出されるものである。
The output signals of the inverting amplifier 50 and the signal selection circuit 44 are individually applied to middle-stage amplifiers 52 and 54 for amplification, and then input to the signal switching circuit 56, where one of the signals is selected and output. be done. The condition for signal selection in this case is that the outputs of the middle stage amplifiers 52 and 54 are extracted in accordance with the selection of a signal whose phase is not changed or a signal whose phase is to be changed. The signal (5) thus selected by the signal switching circuit 56 is amplified by the output amplifier 58 and then taken out from the output terminal 60.

以上の構成において、その動作を第3図の動作波形を参
照して詳細に説明する。第3図において、Aは入力端子
21に与えられる信号、Bは入力端子3.に与えられる
位相反転すべき信号を示している。C,Dは前置増幅器
40.42を経て得られる信号波形を示し、Fは外部ス
イッチ481ないし48nの内の1つ481のON、O
FF操作を示している。即ち、このスイッチ48.がO
N状態にあるとき、制御信号発生回路46の制御信号S
1に基づいて、信号選択回路44は入力端子21例の信
号Aを、また、スイッチ48□がOFF状態にあるとき
、信号選択回路44は入力31例の信号Bを選択する。
The operation of the above configuration will be explained in detail with reference to the operation waveforms shown in FIG. In FIG. 3, A is a signal applied to input terminal 21, B is a signal applied to input terminal 3. The signal to be phase-inverted is shown. C and D indicate signal waveforms obtained through the preamplifiers 40 and 42, and F indicates ON and O of one of the external switches 481 to 48n.
FF operation is shown. That is, this switch 48. is O
When in the N state, the control signal S of the control signal generation circuit 46
1, the signal selection circuit 44 selects the signal A of the 21 input terminals, and when the switch 48□ is in the OFF state, the signal selection circuit 44 selects the signal B of the 31 input terminals.

この場合、信号選択回路44の出力波形はスイッチ48
.の操作に応動してFのような波形となり、Gはこの場
合の反転増幅器50の反転出力波形を示している。
In this case, the output waveform of the signal selection circuit 44 is
.. In response to the operation, a waveform like F is obtained, and G shows the inverted output waveform of the inverting amplifier 50 in this case.

また、スイッチ481の操作によって位相変更モード出
力としての制御信号S2が制御信号発生(6) 回路46より信号切換回路56に与えられ、位相処理が
施された信号が出力端子60より取り出される。Hはこ
の出力波形を示している。この出力波形から明らかなよ
うに、信号選択に対応してその信号に位相変更処理が施
されている。
Further, by operating the switch 481, the control signal S2 as a phase change mode output is applied from the control signal generation (6) circuit 46 to the signal switching circuit 56, and the phase-processed signal is taken out from the output terminal 60. H indicates this output waveform. As is clear from this output waveform, the signal is subjected to phase change processing in response to the signal selection.

このような信号選択及び位相変更処理において、信号選
択回路44及び信号切換回路56は電子スイッチで構成
するため、従来の機械的スイッチで構成した場合に比較
して信号選択並びに信号切換えの信頼性が向上し、且つ
その構成が簡略化して安価に成るとともに、実装スペー
スが少なくて済み、更に切り換え時のノイズ発生が少な
い等の利点が有る。従って、このスイッチ回路は1又は
2以上の信号を選択して処理する計測用回路、多重テレ
ビジョン放送信号の選択回路等、各種の信号処理に使用
することができる。
In such signal selection and phase change processing, since the signal selection circuit 44 and the signal switching circuit 56 are configured with electronic switches, the reliability of signal selection and signal switching is improved compared to the case where they are configured with conventional mechanical switches. It has advantages such as improved performance, simplified configuration, lower cost, less mounting space, and less noise generation during switching. Therefore, this switch circuit can be used for various signal processing such as a measurement circuit that selects and processes one or more signals, a selection circuit for multiplex television broadcast signals, and the like.

次にこの発明のスイッチ回路の具体的実施例を第4図を
参照して説明する。第4図に示すスイッチ回路は、前記
実施例のスイッチ回路をICで構成したものであり、前
記実施例と同一部分には同(7) 一符号を付しである。この実施例のスイッチ回路は2人
力信号の内の1つを選択し、且つ、一方の信号を位相反
転するように構成されている。
Next, a specific embodiment of the switch circuit of the present invention will be described with reference to FIG. The switch circuit shown in FIG. 4 is constructed by using an IC as the switch circuit of the previous embodiment, and the same parts as those of the above embodiment are designated by the same reference numerals (7) and 1. The switch circuit of this embodiment is configured to select one of the two human input signals and to invert the phase of one of the signals.

図において、前記前置増幅器40.42はトランジスタ
62.64.66.68.70.72.74.76.7
8.80及び抵抗82.84.86.87で共通に構成
され、トランジスタ62.64が入力端子2.の入力信
号を、また、トランジスタ66.68が入力端子31の
入力信号を個別に増幅する信号系を形成している。また
、前記信号選択回路44はトランジスタ88.90で構
成され、前置増幅器40.42に関連した形で形成され
ている。即ち、入力信号の選択は、トランジスタ88.
90のスイッチング動作によりトランジスタ62.64
又は66.68の作動を切り換えて所望の信号を選択し
つつ増幅処理を可能にしている。
In the figure, the preamplifier 40.42 is a transistor 62.64.66.68.70.72.74.76.7
8.80 and resistors 82.84.86.87, and the transistor 62.64 is connected to the input terminal 2.80. The transistors 66 and 68 form a signal system in which the input signal of the input terminal 31 is individually amplified. The signal selection circuit 44 is also constituted by transistors 88, 90 and is formed in conjunction with a preamplifier 40, 42. That is, the selection of input signals is performed by transistors 88 .
Due to the switching operation of 90 transistors 62.64
Alternatively, the operation of 66 and 68 is switched to enable amplification processing while selecting a desired signal.

反転増幅器50はトランジスタ92.94.96.98
.100.102.104.106.108及び抵抗1
10.112で構成される。
Inverting amplifier 50 is transistor 92.94.96.98
.. 100.102.104.106.108 and resistance 1
10.112.

(8) 中段増幅器52.54及び出力増幅器58は、トランジ
スタ114.116.118.120.122.124
.126.128.130,132及び抵抗134.1
36で構成され、トランジスタ114.116が位相反
転出力を増幅する中段増幅器52、トランジスタ11B
、120が信号選択回路44の出力を直接増幅する中段
増幅器54として機能するとともに、トランジスタ12
2.124.132は出力増幅器58、即ち出カバソフ
ァとして機能する。
(8) The middle stage amplifier 52.54 and the output amplifier 58 are transistors 114.116.118.120.122.124.
.. 126.128.130, 132 and resistor 134.1
36, transistors 114 and 116 amplify the phase inverted output, a middle stage amplifier 52, and a transistor 11B.
, 120 function as a middle stage amplifier 54 that directly amplifies the output of the signal selection circuit 44, and the transistor 12
2.124.132 functions as an output amplifier 58, ie, an output sofa.

信号切換回路56はトランジスタ138.140.14
2.144で構成され、前記中段増幅器52.54に関
連して形成されている。即ち、トランジスタ138.1
42のスイッチング動作により、トランジスタ114.
116又は118.120の作動を切り換えて所望の信
号を選択することを可能にしている。
The signal switching circuit 56 is a transistor 138.140.14
2.144, and is formed in association with the middle stage amplifier 52.54. That is, transistor 138.1
The switching action of transistor 114 .
It is possible to select a desired signal by switching the operation of 116 or 118 or 120.

そして、制御信号発生回路46はトランジスタ146.
148.150.152.154.156.158.1
60.162.164、ダイオ−(9) ド166.168.170.172.174.176.
17B及び抵抗182.184で構成されている。制御
入力端子186と基準電位点(GND)との間には外部
スイッチ48が挿入され、このスイッチ48のON、O
FF切り換えに応動して制御信号は、トランジスタ14
6.148よりトランジスタ138.142及び88.
90のヘースに与えられるように成っている。なお、ノ
\イアス端子188には図示しないバイアス回路より所
定のバイアスが与えられている。
The control signal generation circuit 46 includes transistors 146 .
148.150.152.154.156.158.1
60.162.164, diode (9) 166.168.170.172.174.176.
17B and resistors 182 and 184. An external switch 48 is inserted between the control input terminal 186 and the reference potential point (GND).
In response to the FF switching, the control signal is transmitted to the transistor 14.
6.148, transistors 138.142 and 88.
It is designed to be given to 90 Heaths. Note that a predetermined bias is applied to the noise terminal 188 from a bias circuit (not shown).

このように構成すれば、入力端子21又は31に与えら
れる信号Sa、SbO内の一つを、1スイツチ48のO
N、0FFi!1作で選択して増幅するとともに、信号
sbが選択されたときには位相反転操作を施して出力端
子60より取り出すことができる。
With this configuration, one of the signals Sa and SbO applied to the input terminal 21 or 31 is sent to the O of one switch 48.
N,0FFi! In addition to selecting and amplifying the signal sb in one operation, when the signal sb is selected, it can be extracted from the output terminal 60 after performing a phase inversion operation.

なお、実施例では入力信号の位相反転を例に取って説明
したが、この発明のスイッチ回路における位相変更回路
は位相反転に限定されるものではない。
Although the embodiments have been described using phase inversion of an input signal as an example, the phase change circuit in the switch circuit of the present invention is not limited to phase inversion.

(10) 以上説明したようにこの発明によれば、位相反転を施す
べき1又は2以上の信号と、位相反転を必要としない1
又は2以上の信号の内の1つの信号を選択するとともに
、その選択に応動して位相反転を施して取り出すことが
できる。しかも、この発明によれば、機械的スイッチで
信号切り換えをしないため、回路構成の簡略化を図るこ
とができ、安価に成るとともに、信号切り換え時のノイ
ズ発生を抑制することができる等の優れた効果を奏する
(10) As explained above, according to the present invention, one or more signals to be subjected to phase inversion and one signal that does not require phase inversion.
Alternatively, it is possible to select one signal from two or more signals, perform phase inversion in response to the selection, and extract the signal. Moreover, according to the present invention, since the signal is not switched using a mechanical switch, the circuit configuration can be simplified and the cost can be reduced, and noise generation can be suppressed when switching the signal. be effective.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のスイッチ回路を示す回路図、第2図はこ
の発明のスイッチ回路の実施例を示すブロック図、第3
図はその動作波形を示す説明図、第4図はこの発明のス
イッチ回路の具体的な実施例を示す回路図である。 44・・・信号選択回路、50・・・位相変更回路とし
ての反転増幅器、56・・・信号切換回路。 (11)
FIG. 1 is a circuit diagram showing a conventional switch circuit, FIG. 2 is a block diagram showing an embodiment of the switch circuit of the present invention, and FIG.
FIG. 4 is an explanatory diagram showing its operating waveforms, and FIG. 4 is a circuit diagram showing a specific embodiment of the switch circuit of the present invention. 44... Signal selection circuit, 50... Inverting amplifier as a phase change circuit, 56... Signal switching circuit. (11)

Claims (1)

【特許請求の範囲】[Claims] 位相を変更すべき1又は2以上の信号とその変更を必要
としないl又は2以上の信号が入力されこれら信号の内
の1つを制御信号に基づき選択する信号選択回路と、こ
の信号選択回路の出力信号の位相を変更させる位相変更
回路と、この位相変更回路及び前記信号選択回路の出力
が与えられるとともに前記制御信号に基づき出力を切り
換える信号切換回路と、この信号切換回路及び前記信号
選択回路に与えられる前記制御信号を発生する制御信号
発生回路とから構成したことを特徴とするスイッチ回路
A signal selection circuit which receives one or more signals whose phase should be changed and one or more signals whose phase does not need to be changed and selects one of these signals based on a control signal; and this signal selection circuit. a phase changing circuit for changing the phase of an output signal of the signal switching circuit; a signal switching circuit to which the outputs of the phase changing circuit and the signal selection circuit are applied and switching the output based on the control signal; and the signal switching circuit and the signal selection circuit. and a control signal generation circuit that generates the control signal applied to the switch circuit.
JP6423082A 1982-04-17 1982-04-17 Switch circuit Granted JPS58181326A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6423082A JPS58181326A (en) 1982-04-17 1982-04-17 Switch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6423082A JPS58181326A (en) 1982-04-17 1982-04-17 Switch circuit

Publications (2)

Publication Number Publication Date
JPS58181326A true JPS58181326A (en) 1983-10-24
JPH0328852B2 JPH0328852B2 (en) 1991-04-22

Family

ID=13252100

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6423082A Granted JPS58181326A (en) 1982-04-17 1982-04-17 Switch circuit

Country Status (1)

Country Link
JP (1) JPS58181326A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51110444U (en) * 1975-03-04 1976-09-07
JPS532582U (en) * 1976-06-25 1978-01-11
JPS5721128A (en) * 1980-07-14 1982-02-03 Nec Corp Switching circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51110444U (en) * 1975-03-04 1976-09-07
JPS532582U (en) * 1976-06-25 1978-01-11
JPS5721128A (en) * 1980-07-14 1982-02-03 Nec Corp Switching circuit

Also Published As

Publication number Publication date
JPH0328852B2 (en) 1991-04-22

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