JPS5812106A - Magnetic recorder and reproducer - Google Patents
Magnetic recorder and reproducerInfo
- Publication number
- JPS5812106A JPS5812106A JP10931581A JP10931581A JPS5812106A JP S5812106 A JPS5812106 A JP S5812106A JP 10931581 A JP10931581 A JP 10931581A JP 10931581 A JP10931581 A JP 10931581A JP S5812106 A JPS5812106 A JP S5812106A
- Authority
- JP
- Japan
- Prior art keywords
- recording
- switch
- double
- audio
- relay
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B15/00—Driving, starting or stopping record carriers of filamentary or web form; Driving both such record carriers and heads; Guiding such record carriers or containers therefor; Control thereof; Control of operating function
- G11B15/02—Control of operating function, e.g. switching from recording to reproducing
- G11B15/04—Preventing, inhibiting, or warning against accidental erasing or double recording
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
- G11B5/02—Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
- G11B5/024—Erasing
Landscapes
- Management Or Editing Of Information On Record Carriers (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は音声二重記録のコントロールに関する亀のであ
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the control of audio duplex recording.
従来この穏の音声二重記録装置は第１ｆＩ！Ｊの如く全
１１Ｊ回路出力の−ｊｌｌａにリレー１を介し接続され
た全一消去ヘッド２と該ヘッドのダ建−コイル３゜該発
振回路出力の別の−ｓｂにスイッチ４を介し接続され大
音声消去ヘッド５．該スイッチ４の他端に接続されたバ
イアス電流を減少せしむダ建二負１ｅ６とによ多構成さ
れ、通常記嚢時はリレースイッチ１は全幅消去ヘッド側
に、スイッチ４は音声消去側に接続され、映像、音声コ
ントロールトラックのすべてが消去される。音声の後退
記録時は、リレー１がダ建−；イルＳ備に接続されて全
幅消去ヘッド２は作動せず、音声消去へラド５のみ作動
するので音声トラックのみ消去される。ｔた音声の二重
記録時はスイッチ４も鉄負荷６側になり音声消去ヘッド
５も作動しなｉので、すべてのトラックは消去されない
。ところでスイッチ４を該負荷側にしたｔま通常記録す
ると、音声消去ヘッド５は動作しないため記録の馴初に
おいて、音声記録ヘッド７と全幅消去ヘッド２０間のテ
−プは二重記録されることになる。Conventionally, this moderate audio duplex recording device is the 1st fI! As shown in J, all 11 erase head 2 is connected to -jlla of all 11J circuit outputs via relay 1, and the double erase head 2 of this head is connected to another -sb of the oscillation circuit output via switch 4. Audio erasure head 5. The relay switch 1 is connected to the other end of the switch 4 to reduce the bias current, and the relay switch 1 is set to the full-width erasing head side and the switch 4 is set to the audio erasing side during normal recording. will be connected, and all video and audio control tracks will be erased. During backward recording of audio, the relay 1 is connected to the D/I signal and the full-width erasing head 2 is not activated, and only the audio erasing head 5 is activated, so that only the audio track is erased. During double recording of the recorded audio, the switch 4 is also set to the iron load 6 side and the audio erasing head 5 is not operated, so that all tracks are not erased. By the way, when normal recording is performed with the switch 4 set to the load side, the audio erasing head 5 does not operate, so that at the beginning of recording, double recording is performed on the tape between the audio recording head 7 and the full width erasing head 20. become.
第２図にこれらのヘッドの空間的配置を示す。FIG. 2 shows the spatial arrangement of these heads.
１１＃′ｉ回転ヘッドを備えたシリンダであ夛、全幅消
去ヘッド２はシリンダ１１をはさんで音声配録ヘクト７
の反対側に配電されている。特に長時間記録の場合、こ
の区間は非常に長い時間になり問題である。つｔ夛スイ
ッチを切忘れたまま通常配録した場合、記録の頭の部分
が前に記録された音がそのまま残るという欠点があシ、
大きな問題であった。11#'i A cylinder equipped with a rotary head, the full width erasing head 2 is placed across the cylinder 11 to record the audio recording hect 7.
Power is distributed on the opposite side of the Particularly in the case of long-term recording, this section becomes a very long time, which is a problem. If you forget to turn off the switch and record normally, the disadvantage is that the beginning of the recording will remain the same as the previously recorded sound.
It was a big problem.
本発明の目的は、音声の二重記録装置において、上記の
欠λをなくし、通常記録をする場合は、二重記録スイッ
チのオン、オフに関係なく、正常な記録ができる装置を
提供することにある。An object of the present invention is to provide an audio dual recording device that eliminates the above-mentioned deficiency and allows normal recording regardless of whether the dual recording switch is on or off when performing normal recording. It is in.
上記の目的を達成するために本発明は、二重記録をオン
オフさせるスイッチによって制御されるリレーを、通常
の記録を行なわせる操作によっても制御するように構成
し、通常の配録を行なうときは、二重記録をオンオフさ
せるスイッチの状態に関係なく音声消去ヘッドが動作す
るようにした本発明の一実ｍ例を第５図に示す。この音
声二重配碌装雪は発振回路１０出力の一端ａにリレー１
を介し接続された全幅消去ヘッド２と該ヘッドのダイ−
コイル５、該発振回路出力の別の−＃Ｉｌｂにリレー８
を介し接続された音声消去ヘッド５と該リレー８の他端
に接続されたバイアス電Ｒを減少せしむダ々７負荷６、
及び該リレー８のリレーコントレール回路９とによ〕構
成される。In order to achieve the above object, the present invention is configured such that a relay controlled by a switch that turns on and off double recording is also controlled by an operation that causes normal recording, and when performing normal recording, FIG. 5 shows an example of the present invention in which the sound erasing head operates regardless of the state of the switch for turning on and off the double recording. This audio dual arrangement is implemented by relay 1 at one end a of the oscillation circuit 10 output.
The full-width erase head 2 and the die of the head are connected through
Coil 5, relay 8 to another -#Ilb of the oscillation circuit output
a load 6 for reducing the bias voltage R connected to the audio erasing head 5 and the other end of the relay 8;
and a relay control circuit 9 of the relay 8.
リレーコントロール回路９の一具体例を第４図に示し、
その構成と動作を説明する。該回路は二重記録オン、オ
フスイッチ４′とトランジスタＱｔｓＱＣ１及び抵抗”
ｌ＋Ｊによ〕構成され、記録時高電圧となる信号Ａによ
）通常記録時はトランジスタＱ、はオンし、リレー駆動
用トランジスタＱ２のベースには電圧が印加されないた
め二重記録オンオフスイッチ４′に関係なくリレースイ
ッチ８は常にオフしている０次に音声の螢追記録時は、
装置全体の動作は再生動作の操作になるため、該信号Ａ
は零電圧にな）トランジスタＱ、はオフする。A specific example of the relay control circuit 9 is shown in FIG.
Its configuration and operation will be explained. The circuit consists of a double recording on, off switch 4' and a transistor QtsQC1 and a resistor.
During normal recording, the transistor Q is turned on and no voltage is applied to the base of the relay driving transistor Q2, so the dual recording on/off switch 4' is turned on. When recording the 0th order audio, the relay switch 8 is always off regardless of the
Since the operation of the entire device is the playback operation, the signal A
(becomes zero voltage) Transistor Q turns off.
よって二重記録スイッチ４′がオンした時だけリレー駆
動トランジスタＱｓがオンする。Therefore, the relay drive transistor Qs is turned on only when the dual recording switch 4' is turned on.
さて全体の動作は次のようになる。ｔず通常記録時はス
イッチ１は全幅消去ヘッド２に接続され、リレースイッ
チ８はリレーコントロール回路９によシ自動的に音声消
去ヘッド５に接続されるため正常な記録状態になる。つ
ぎに通常記録以外では、リレースイッチトがダミーコイ
ルＳ儒に接続され、二重記録オン、オフスイッチ４′を
オフした時は、音声消去ヘッドＳのみが動作して音声の
後追記録状態にな〕、二重記録オン、オフスイッチ４′
をオンした時は消去ヘッドはすべて動作せず音声の二重
記録状態となる。Now, the overall operation is as follows. During normal recording, the switch 1 is connected to the full-width erasing head 2, and the relay switch 8 is automatically connected to the audio erasing head 5 by the relay control circuit 9, so that a normal recording state is achieved. Next, in cases other than normal recording, the relay switch is connected to the dummy coil S, and when the dual recording on/off switch 4' is turned off, only the audio erasing head S operates to enter the audio recording state. ], double recording on/off switch 4'
When turned on, all erasing heads do not operate and the sound is double recorded.
本発明によ〕原審が誤って二重記録スイッチをオンした
ｔオ記録操作しても通常の記録動作では二重記録機能が
働かないので、不本意な二重記録をすることをなくすこ
とができる。According to the present invention, even if the trial judge mistakenly turns on the double recording switch and performs a recording operation, the double recording function will not work during normal recording operations, so it is possible to eliminate unnecessary double recording. can.
第１図は従来の二重配録回路の例を示す要部ブロック図
、第２図は各ヘッドの配置の一例を示す概略平＊Ｓａ、
第ｓＷＪは本発明の二重記俺回路の一実施例を示す要部
ブーツク図、第４図は、リレーＦＪ４プコントロール回
路の一例を示す回路図である。
１．８＝リレー、 ２：全幅消去ヘッド、５：ダイ−
コイル、
４．４’：二重記録オンオフスイッチ、５：音声消去ヘ
ッド、 ７：音声記録ヘッド、９：コントロール回路
、 １０：発振回路。
代理人弁理士 薄 １）利 １，１ミ〉才 ／ｒ１４
−Ｔ２ 図
〃
茅 ３１！１
ケ ４［！１Fig. 1 is a block diagram of the main part showing an example of a conventional double allocation circuit, and Fig. 2 is a schematic diagram showing an example of the arrangement of each head.
sWJ is a boot diagram of a main part showing an embodiment of the dual memory circuit of the present invention, and FIG. 4 is a circuit diagram showing an example of a relay FJ4 control circuit. 1.8 = relay, 2: full width erase head, 5: die
Coil, 4.4': Dual recording on/off switch, 5: Audio erasing head, 7: Audio recording head, 9: Control circuit, 10: Oscillation circuit. Representative Patent Attorney Susuki 1) Li 1,1mi〉sai /r14 -T2 Figure Kaya 31!1 ke 4[! 1
Claims (1)
録と元の音声を消さずに新しｈ音声を重ねて二重記録す
る仁とが可能な磁気記録再生装置において、音声消去電
流を音声消去ヘッドに流すか、または二重記雌時にダン
−負荷に流すか、を切換える第、１のスイッチと、二重
記録を大切する＠２のスイッチを含んで該第１スイツチ
を制御する回路とを有し、通常記録時は該第２ス′イツ
チの入切に関係なく音声消去電流を音声消去ヘッドに流
すように該第１スイツチを切換え、該＃Ｉ２スイッチが
切である後追込記録時には音声消去電流を流すように、
ま次該＠２のスイッチが入である二重記録時には音声消
去電流をダオー負荷に流すように該第１スイツチを制御
することを４１１１とする磁気記録再生装置。In a magnetic recording and reproducing device that is capable of post-recording, which re-records only the audio on the recorded recording medium, and double-recording, which overlaps new audio without erasing the original audio, the audio erasing current is used. A circuit that controls the first switch, including a first switch that switches the flow to the audio erasing head or to the dumb load during double recording, and a second switch that takes care of double recording. During normal recording, the first switch is switched so that the audio erasing current flows to the audio erasing head regardless of whether the second switch is on or off, and after the #I2 switch is off, the When recording, a sound erasing current is applied.
4111. A magnetic recording and reproducing apparatus, wherein the first switch is controlled so that an audio erasing current flows through the diode load during double recording when the first switch @2 is turned on.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10931581A JPS5812106A (en) | 1981-07-15 | 1981-07-15 | Magnetic recorder and reproducer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10931581A JPS5812106A (en) | 1981-07-15 | 1981-07-15 | Magnetic recorder and reproducer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5812106A true JPS5812106A (en) | 1983-01-24 |
Family
ID=14507090
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10931581A Pending JPS5812106A (en) | 1981-07-15 | 1981-07-15 | Magnetic recorder and reproducer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5812106A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61140368A (en) * | 1984-12-14 | 1986-06-27 | Japan Ranpu Kk | Non-contact type soldering device |
| JPS62144875A (en) * | 1985-11-11 | 1987-06-29 | シーメンズ ニックスドルフ インフォメーションズ システム アクチェンゲゼルシャフト | Device for soldering electronic constituent to circuit substrate |
-
1981
- 1981-07-15 JP JP10931581A patent/JPS5812106A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61140368A (en) * | 1984-12-14 | 1986-06-27 | Japan Ranpu Kk | Non-contact type soldering device |
| JPH0541351B2 (en) * | 1984-12-14 | 1993-06-23 | Japan Ranpu Kk | |
| JPS62144875A (en) * | 1985-11-11 | 1987-06-29 | シーメンズ ニックスドルフ インフォメーションズ システム アクチェンゲゼルシャフト | Device for soldering electronic constituent to circuit substrate |
| JPH038869B2 (en) * | 1985-11-11 | 1991-02-07 | Nixdorf Computer Ag |
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