JPS5789169A - Multiprocessor controlling system - Google Patents

Multiprocessor controlling system

Info

Publication number
JPS5789169A
JPS5789169A JP55164213A JP16421380A JPS5789169A JP S5789169 A JPS5789169 A JP S5789169A JP 55164213 A JP55164213 A JP 55164213A JP 16421380 A JP16421380 A JP 16421380A JP S5789169 A JPS5789169 A JP S5789169A
Authority
JP
Japan
Prior art keywords
processor
fault
become
master
master processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55164213A
Other languages
Japanese (ja)
Other versions
JPS5836379B2 (en
Inventor
Takeshi Futagawa
Chiaki Hishinuma
Shizuo Ito
Yoshiharu Iwamoto
Kazuyuki Taga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP55164213A priority Critical patent/JPS5836379B2/en
Publication of JPS5789169A publication Critical patent/JPS5789169A/en
Publication of JPS5836379B2 publication Critical patent/JPS5836379B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

PURPOSE:To continue and maintain the processing even if a fault occurs in a master processor, and to shift it to a normal system configuration, by constituting so that a privileged instruction is generated in a slave processor when the maser processor has become faulty. CONSTITUTION:When a master processor has become faulty, an individual urgency controlling part (individual EMA) 14a detects a fault and starts initializing. An initializing circuit (not shown in the figure) executes reset of a status displaying flip-flop provided in system configuration controlling parts 11a-11n, stop of the processor, reset of isolation, etc., and as a result, the master processor becomes a slave processor, and all the control parts become passive. Also, the fault is displayed on other slave processor through signal lines 101a-101n. The slave processor which has been informed that the master processor has become faulty leads in information of a fault display, etc. of other processor, and becomes a master processor by logic which basically decides a processor to become a master processor subsequently.
JP55164213A 1980-11-21 1980-11-21 Multiprocessor control method Expired JPS5836379B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55164213A JPS5836379B2 (en) 1980-11-21 1980-11-21 Multiprocessor control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55164213A JPS5836379B2 (en) 1980-11-21 1980-11-21 Multiprocessor control method

Publications (2)

Publication Number Publication Date
JPS5789169A true JPS5789169A (en) 1982-06-03
JPS5836379B2 JPS5836379B2 (en) 1983-08-09

Family

ID=15788810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55164213A Expired JPS5836379B2 (en) 1980-11-21 1980-11-21 Multiprocessor control method

Country Status (1)

Country Link
JP (1) JPS5836379B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6804790B2 (en) * 2000-10-31 2004-10-12 Millennial Net Coordinating protocol for a multi-processor system
US7313399B2 (en) 2003-06-05 2007-12-25 Millennial Net, Inc. Protocol for configuring a wireless network
US7522563B2 (en) 2001-11-28 2009-04-21 Millennial Net, Inc. Network protocol
US7844308B2 (en) 2005-06-01 2010-11-30 Millennial Net, Inc. Communicating over a wireless network

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63298086A (en) * 1987-05-29 1988-12-05 Nec Corp Obstacle detection sensor

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52101947A (en) * 1976-02-21 1977-08-26 Hitachi Ltd Backup system of control computer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52101947A (en) * 1976-02-21 1977-08-26 Hitachi Ltd Backup system of control computer

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6804790B2 (en) * 2000-10-31 2004-10-12 Millennial Net Coordinating protocol for a multi-processor system
US7522563B2 (en) 2001-11-28 2009-04-21 Millennial Net, Inc. Network protocol
US7948930B2 (en) 2001-11-28 2011-05-24 Millennial Net, Inc. Network protocol
US8098615B2 (en) 2001-11-28 2012-01-17 Millennial Net, Inc. Network protocol
US7313399B2 (en) 2003-06-05 2007-12-25 Millennial Net, Inc. Protocol for configuring a wireless network
US7606572B2 (en) 2003-06-05 2009-10-20 Millennial Net, Inc. Protocol for configuring a wireless network
US7844308B2 (en) 2005-06-01 2010-11-30 Millennial Net, Inc. Communicating over a wireless network
US8271058B2 (en) 2005-06-01 2012-09-18 Millennial Net, Inc. Communicating over a wireless network

Also Published As

Publication number Publication date
JPS5836379B2 (en) 1983-08-09

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