JPS5784369A - Abnormality detecting system for circuit device - Google Patents
Abnormality detecting system for circuit deviceInfo
- Publication number
- JPS5784369A JPS5784369A JP55159627A JP15962780A JPS5784369A JP S5784369 A JPS5784369 A JP S5784369A JP 55159627 A JP55159627 A JP 55159627A JP 15962780 A JP15962780 A JP 15962780A JP S5784369 A JPS5784369 A JP S5784369A
- Authority
- JP
- Japan
- Prior art keywords
- counter
- put out
- circuit
- counting
- abnormality
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
- G01R31/2834—Automated test systems [ATE]; using microprocessors or computers
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Tests Of Electronic Circuits (AREA)
- Debugging And Monitoring (AREA)
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE:To make it possible to detect the abnormality of a device, by making such an arrangement that rectangular wave signals are put out at a constant cycle when the device is operating normally, and, when the signals are at the levels of 0 and 1, counting and resetting are performed by respectively different counters. CONSTITUTION:When a circuit device 21 is in a normal condition, 2-position control signals are issued from CPU, etc., that is, rectangular wave signals b1 of a constant cycle 2T2 are continuously put out at equal intervals in conditions of 0 and 1. In first counter circuit 22a, counting is conducted when the output b1 of the device 21 is 1, the counter is reset when the output is 0, and pulses of a built-in constant-cycle pulse oscillator are counted when the counter is in operation. On the other hand, second counter circuit 22b operates conversely to the counter 22a. It is possible, by doing so, to allow counting of either counter to reach above a given value, b2 or b3 of an abnormal signal to be put out to outside and an abnormal signal b4 to be put out through an OR circuit 23, even at the time of occurrence of such an abnormality that a signal b1 keeps holding 0 or 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55159627A JPS5784369A (en) | 1980-11-14 | 1980-11-14 | Abnormality detecting system for circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55159627A JPS5784369A (en) | 1980-11-14 | 1980-11-14 | Abnormality detecting system for circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5784369A true JPS5784369A (en) | 1982-05-26 |
Family
ID=15697845
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55159627A Pending JPS5784369A (en) | 1980-11-14 | 1980-11-14 | Abnormality detecting system for circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5784369A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0196044U (en) * | 1987-12-15 | 1989-06-26 | ||
JPH04132745U (en) * | 1991-05-31 | 1992-12-09 | 安藤電気株式会社 | Pulse generator pulse duration abnormality detection circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5179543A (en) * | 1974-03-29 | 1976-07-10 | Siemens Ag |
-
1980
- 1980-11-14 JP JP55159627A patent/JPS5784369A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5179543A (en) * | 1974-03-29 | 1976-07-10 | Siemens Ag |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0196044U (en) * | 1987-12-15 | 1989-06-26 | ||
JPH04132745U (en) * | 1991-05-31 | 1992-12-09 | 安藤電気株式会社 | Pulse generator pulse duration abnormality detection circuit |
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