JPS5776878A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS5776878A
JPS5776878A JP15317780A JP15317780A JPS5776878A JP S5776878 A JPS5776878 A JP S5776878A JP 15317780 A JP15317780 A JP 15317780A JP 15317780 A JP15317780 A JP 15317780A JP S5776878 A JPS5776878 A JP S5776878A
Authority
JP
Japan
Prior art keywords
gate electrode
insulating film
floating gate
overlaps
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15317780A
Other languages
Japanese (ja)
Inventor
Takashi Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15317780A priority Critical patent/JPS5776878A/en
Publication of JPS5776878A publication Critical patent/JPS5776878A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To write and eliminate electrically easily by a method wherein a control gate electrode faces a semiconductor substrate with a gate insulating film in between. CONSTITUTION:A field insulation film 22 is formed on a p type silicon substrate 21 and a memory element is composed of a gate insulating film 23, a control gate electrode 24 of polycrystalline silicon, an insulating film 25, a floating gate electrode 26 of polycrystalline silicon, an n<+> type source region 27 and an n<+> type drain region 28. Then a phosphorus silicic acid glass film 29 and aluminum electrodes 30, 31 are formed. Above formation is made in such a manner that a part of the floating gate electrode 26 overlaps the control electrode and the rest part of the floating gate electrode 26 overlaps the substrate with an insulating film in between. With above method injection of an electric charge into the floating gate electrode becomes easy, so that electrical writing and eliminating becomes very easy.
JP15317780A 1980-10-31 1980-10-31 Semiconductor memory device Pending JPS5776878A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15317780A JPS5776878A (en) 1980-10-31 1980-10-31 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15317780A JPS5776878A (en) 1980-10-31 1980-10-31 Semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS5776878A true JPS5776878A (en) 1982-05-14

Family

ID=15556728

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15317780A Pending JPS5776878A (en) 1980-10-31 1980-10-31 Semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS5776878A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60263470A (en) * 1984-06-12 1985-12-26 Seiko Instr & Electronics Ltd Manufacture of semiconductor nonvolatile memory
FR2572211A1 (en) * 1984-10-23 1986-04-25 Sgs Microelettronica Spa PERMANENT MEMORY CELL OF THE "MERGED" TYPE (FUSIONED) WITH A FLOATING GRID SUPERMITTED TO THE CONTROL AND SELECTION GRID
US4754320A (en) * 1985-02-25 1988-06-28 Kabushiki Kaisha Toshiba EEPROM with sidewall control gate
US4795719A (en) * 1984-05-15 1989-01-03 Waferscale Integration, Inc. Self-aligned split gate eprom process
US4868629A (en) * 1984-05-15 1989-09-19 Waferscale Integration, Inc. Self-aligned split gate EPROM
US5021847A (en) * 1984-05-15 1991-06-04 Waferscale Integration, Inc. Split gate memory array having staggered floating gate rows and method for making same
US5101250A (en) * 1988-06-28 1992-03-31 Mitsubishi Denki Kabushiki Kaisha Electrically programmable non-volatile memory device and manufacturing method thereof
US5939749A (en) * 1996-03-29 1999-08-17 Sanyo Electric Company, Ltd. Split gate transistor array

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4795719A (en) * 1984-05-15 1989-01-03 Waferscale Integration, Inc. Self-aligned split gate eprom process
US4868629A (en) * 1984-05-15 1989-09-19 Waferscale Integration, Inc. Self-aligned split gate EPROM
US5021847A (en) * 1984-05-15 1991-06-04 Waferscale Integration, Inc. Split gate memory array having staggered floating gate rows and method for making same
JPS60263470A (en) * 1984-06-12 1985-12-26 Seiko Instr & Electronics Ltd Manufacture of semiconductor nonvolatile memory
FR2572211A1 (en) * 1984-10-23 1986-04-25 Sgs Microelettronica Spa PERMANENT MEMORY CELL OF THE "MERGED" TYPE (FUSIONED) WITH A FLOATING GRID SUPERMITTED TO THE CONTROL AND SELECTION GRID
US4754320A (en) * 1985-02-25 1988-06-28 Kabushiki Kaisha Toshiba EEPROM with sidewall control gate
US5101250A (en) * 1988-06-28 1992-03-31 Mitsubishi Denki Kabushiki Kaisha Electrically programmable non-volatile memory device and manufacturing method thereof
US5939749A (en) * 1996-03-29 1999-08-17 Sanyo Electric Company, Ltd. Split gate transistor array

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