JPS5759234A - Input and output bus device - Google Patents
Input and output bus deviceInfo
- Publication number
- JPS5759234A JPS5759234A JP55134326A JP13432680A JPS5759234A JP S5759234 A JPS5759234 A JP S5759234A JP 55134326 A JP55134326 A JP 55134326A JP 13432680 A JP13432680 A JP 13432680A JP S5759234 A JPS5759234 A JP S5759234A
- Authority
- JP
- Japan
- Prior art keywords
- input
- processor
- bus
- transfer
- bus device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Bus Control (AREA)
- Small-Scale Networks (AREA)
Abstract
PURPOSE:To obtain an input and output bus device of hierarchy type bus-loop constitution which has a function of controlling triangular transfer, by controlling a transfer path with a signal stored at an interbus coupling part. CONSTITUTION:For triangular transfer by an input-output bus device having processors 51-53 looped, for example, as shown in the figure, when the 1st processor starts data transfer from one input-output equipment to the 2nd processor, a signal showing that the 2nd processor is to receive data from the said input-output equipment is stored at interbus coupling parts 59-61 which connects a bus loop, where the 2nd processor belongs, to another bus loop. With this signal, the route from the actuated input-output equipment to the 2nd processor is controlled.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55134326A JPS5759234A (en) | 1980-09-29 | 1980-09-29 | Input and output bus device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55134326A JPS5759234A (en) | 1980-09-29 | 1980-09-29 | Input and output bus device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5759234A true JPS5759234A (en) | 1982-04-09 |
Family
ID=15125701
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55134326A Pending JPS5759234A (en) | 1980-09-29 | 1980-09-29 | Input and output bus device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5759234A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5960634A (en) * | 1982-09-30 | 1984-04-06 | Toshiba Corp | System for transmitting display data |
JPS6132161A (en) * | 1984-07-24 | 1986-02-14 | Fuji Photo Film Co Ltd | Information transfer device of processing system |
JPS62219843A (en) * | 1986-03-20 | 1987-09-28 | Toyota Motor Corp | Trouble information transmitting method |
-
1980
- 1980-09-29 JP JP55134326A patent/JPS5759234A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5960634A (en) * | 1982-09-30 | 1984-04-06 | Toshiba Corp | System for transmitting display data |
JPS6132161A (en) * | 1984-07-24 | 1986-02-14 | Fuji Photo Film Co Ltd | Information transfer device of processing system |
JPS62219843A (en) * | 1986-03-20 | 1987-09-28 | Toyota Motor Corp | Trouble information transmitting method |
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