JPS5757329A - Controller of virtual input-output device - Google Patents

Controller of virtual input-output device

Info

Publication number
JPS5757329A
JPS5757329A JP55133557A JP13355780A JPS5757329A JP S5757329 A JPS5757329 A JP S5757329A JP 55133557 A JP55133557 A JP 55133557A JP 13355780 A JP13355780 A JP 13355780A JP S5757329 A JPS5757329 A JP S5757329A
Authority
JP
Japan
Prior art keywords
input
output
virtual input
abnormal state
storage part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55133557A
Other languages
Japanese (ja)
Inventor
Tetsuo Kaneko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55133557A priority Critical patent/JPS5757329A/en
Publication of JPS5757329A publication Critical patent/JPS5757329A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To realize easy simulation for various types of input/output devices, by providing a storage part where the information defining the input/output action to a virtual input/output device is stored, a setting part of an abnormal state and an executing part where the contents are executed for both the storage part and the executing part. CONSTITUTION:When a new input/output device is developed, the action defining firmware of the input/output device is loaded to a control information storage part 204 at the storage part of a virtual input/output device controller 102 from a prescribed external storage part. At an executing part 203, the setting contents of an abnormal state setting part 202 are read every time the virtual input/output is executed based on the information of the part 204, and the virtual input/output is completed with an abnormal state if an abnormal state is indicated on a channel during process. At the same time, the queuing information of an external storage device 103 is stored in the part 204 for each device to guarantee the data. And the device position of the end of an input/output request is stored in a present position storage region 205 at the storage part. At the part 203, an input/output end signal is transmitted to an input/output controller 101 through a requested channel 104 when a series of virtual input/output actions are over.
JP55133557A 1980-09-25 1980-09-25 Controller of virtual input-output device Pending JPS5757329A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55133557A JPS5757329A (en) 1980-09-25 1980-09-25 Controller of virtual input-output device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55133557A JPS5757329A (en) 1980-09-25 1980-09-25 Controller of virtual input-output device

Publications (1)

Publication Number Publication Date
JPS5757329A true JPS5757329A (en) 1982-04-06

Family

ID=15107586

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55133557A Pending JPS5757329A (en) 1980-09-25 1980-09-25 Controller of virtual input-output device

Country Status (1)

Country Link
JP (1) JPS5757329A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6361046U (en) * 1986-10-02 1988-04-22
JPH05216712A (en) * 1991-10-23 1993-08-27 Internatl Business Mach Corp <Ibm> Computer system, method for performing inner-viewing task on computer system and i/o processor assembly

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6361046U (en) * 1986-10-02 1988-04-22
JPH05216712A (en) * 1991-10-23 1993-08-27 Internatl Business Mach Corp <Ibm> Computer system, method for performing inner-viewing task on computer system and i/o processor assembly

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