JPS5753805A - Processor of digital signal - Google Patents
Processor of digital signalInfo
- Publication number
- JPS5753805A JPS5753805A JP12831680A JP12831680A JPS5753805A JP S5753805 A JPS5753805 A JP S5753805A JP 12831680 A JP12831680 A JP 12831680A JP 12831680 A JP12831680 A JP 12831680A JP S5753805 A JPS5753805 A JP S5753805A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- supplied
- given
- error
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
- G11B20/1806—Pulse code modulation systems for audio signals
- G11B20/1809—Pulse code modulation systems for audio signals by interleaving
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
Abstract
PURPOSE:To prevent a detecting mistake of errors, by discriminating a code error in a state of relation under which an output given from each of a syndrome growing circuit, a comparator, an error pointer pattern detecting circuit, etc. is set. CONSTITUTION:The output supplied from a waveform shaping circuit is given to an error detecting circuit 26 via an input terminal 40. A decision signal Ep given from the circuit 26 is supplied to an error pointer pattern detecting circuit 30 via a buffer memory 27 and then a shift register 41 of 7 bits D. Here the output from each of the circuit 30, a syndrome growing circuit 28 and a comparator 45 is supplied to a matrix circuit 47. Then the signal EP is delivered from a correction control circui 48 regardless of the circuit 26 when a prescribed relation is satisfied among those outputs. With such constitution, the detecting mistake of errors can be prevented.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12831680A JPS5753805A (en) | 1980-09-16 | 1980-09-16 | Processor of digital signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12831680A JPS5753805A (en) | 1980-09-16 | 1980-09-16 | Processor of digital signal |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5753805A true JPS5753805A (en) | 1982-03-31 |
JPH026149B2 JPH026149B2 (en) | 1990-02-07 |
Family
ID=14981751
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12831680A Granted JPS5753805A (en) | 1980-09-16 | 1980-09-16 | Processor of digital signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5753805A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07170201A (en) * | 1993-12-14 | 1995-07-04 | Nec Corp | Interleave circuit |
-
1980
- 1980-09-16 JP JP12831680A patent/JPS5753805A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07170201A (en) * | 1993-12-14 | 1995-07-04 | Nec Corp | Interleave circuit |
Also Published As
Publication number | Publication date |
---|---|
JPH026149B2 (en) | 1990-02-07 |
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