JPS5745953A - Electrode structure for semiconductor device and forming method thereof - Google Patents

Electrode structure for semiconductor device and forming method thereof

Info

Publication number
JPS5745953A
JPS5745953A JP55121166A JP12116680A JPS5745953A JP S5745953 A JPS5745953 A JP S5745953A JP 55121166 A JP55121166 A JP 55121166A JP 12116680 A JP12116680 A JP 12116680A JP S5745953 A JPS5745953 A JP S5745953A
Authority
JP
Japan
Prior art keywords
film
solder
wire
aluminum
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55121166A
Other languages
Japanese (ja)
Inventor
Toru Kawanobe
Keiji Miyamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55121166A priority Critical patent/JPS5745953A/en
Publication of JPS5745953A publication Critical patent/JPS5745953A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To obtain efficiently an electrode having no stepwise disconnection by superposing a metallic film having good adherence with a protective film on a semiconductor wafer and aluminum or aluminum alloy and a metallic film having good conductivity and solder wettability on the protective film and forming a solder film and a solder projection electrode. CONSTITUTION:An aluminum film 14 and an Si3N4 film 16 are superposed on an SiO2 film 12 of an Si wafer 10, and a connecting hole is formed at a junction pad 18. Then, Ti film 20, Cu film 22 and Cr film 24 which is not wet with solder are sequentially deposited thereon, a wiring pattern of Cr film 24 is formed with a resist mask, and a Cu film 22 is exposed widely at the inside of the wire. A resist mask 26 is formed, a wire is formed thinly, and a bump forming part is increased. Solder 26 is electrically plated, and the solder 26 is reflowed by removing the mask. Then, the solder is wet on the Cu fim 22 at the wire part, is spread so that a solder film 28 is thin and the solder is collected on the Cr film 24 at the bump, thereby forming a spherical solder projection electrode 30. Then, with the fims 28, 24 as masks, the Cu film 22 and the Ti film 20 are etched to complete it.
JP55121166A 1980-09-03 1980-09-03 Electrode structure for semiconductor device and forming method thereof Pending JPS5745953A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55121166A JPS5745953A (en) 1980-09-03 1980-09-03 Electrode structure for semiconductor device and forming method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55121166A JPS5745953A (en) 1980-09-03 1980-09-03 Electrode structure for semiconductor device and forming method thereof

Publications (1)

Publication Number Publication Date
JPS5745953A true JPS5745953A (en) 1982-03-16

Family

ID=14804471

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55121166A Pending JPS5745953A (en) 1980-09-03 1980-09-03 Electrode structure for semiconductor device and forming method thereof

Country Status (1)

Country Link
JP (1) JPS5745953A (en)

Similar Documents

Publication Publication Date Title
EP0819318B1 (en) A solder bump structure for a microelectronic substrate
ES2106194T3 (en) MANUFACTURE METHOD OF WELDING PEARLS AND WELDING PEARLS FORMED THROUGH THE SAME.
GB2322970A (en) Process for single mask C4 solder bump fabrication
KR960705348A (en) Method for Forming Solder Bumps
SG145522A1 (en) A residue-free solder bumping process
JPS57143838A (en) Manufacture of semiconductor device
JPS5745953A (en) Electrode structure for semiconductor device and forming method thereof
TW200418160A (en) Wafer surface processing
JPS5518056A (en) Semiconductor device
JPS62263645A (en) Construction of electric contact and method of forming the same
JPS5524414A (en) Electrode forming process
JPS54160166A (en) Electrode forming method for semiconductor device
JPS56105653A (en) Gold bump forming method of semiconductor device
JPS54121669A (en) Manufacture of semiconductor element
JPS5645043A (en) Forming method for electrode lead
JPS57114255A (en) Semiconductor integrated circuit and manufacture thereof
JPS56148846A (en) Manufacture of circuit pattern
TW594895B (en) Method for forming redistribution layer on semiconductor device
JPS5450163A (en) Method of manufacturing semiconductor unit
JPS57138160A (en) Formation of electrode
JPS52150965A (en) Semiconductor device
JPS5295171A (en) Electrode for semi-conductor
JPS56161664A (en) Manufacture of lead for connecting semiconductor device
JPS54162458A (en) Manufacture for semiconductor device
JPS5513948A (en) Structure of electrode