JPS5742886A - Programmable timer - Google Patents

Programmable timer

Info

Publication number
JPS5742886A
JPS5742886A JP55118109A JP11810980A JPS5742886A JP S5742886 A JPS5742886 A JP S5742886A JP 55118109 A JP55118109 A JP 55118109A JP 11810980 A JP11810980 A JP 11810980A JP S5742886 A JPS5742886 A JP S5742886A
Authority
JP
Japan
Prior art keywords
circuit
mark card
set information
mark
card
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55118109A
Other languages
Japanese (ja)
Inventor
Shoei Kotani
Hideki Abe
Hiroaki Muroi
Hidetoshi Kasai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP55118109A priority Critical patent/JPS5742886A/en
Priority to PCT/JP1981/000190 priority patent/WO1982000724A1/en
Publication of JPS5742886A publication Critical patent/JPS5742886A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/045—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using logic state machines, consisting only of a memory or a programmable logic device containing the logic for the controlled machine and in which the state of its outputs is dependent on the state of its inputs or part of its own output states, e.g. binary decision controllers, finite state controllers
    • G—PHYSICS
    • G04—HOROLOGY
    • G04G—ELECTRONIC TIME-PIECES
    • G04G15/00—Time-pieces comprising means to be operated at preselected times or after preselected time intervals
    • G04G15/006—Time-pieces comprising means to be operated at preselected times or after preselected time intervals for operating at a number of different times
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/12—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using record carriers
    • G05B19/124—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using record carriers using tapes, cards or discs with optically sensed marks or codes

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Electric Clocks (AREA)

Abstract

PURPOSE:To set many program timers and facilitate and secure timer operation, by handling set information in entry frames on a mark card as one circuit for every mark card. CONSTITUTION:Pieces of set information on specified days of the week, on and off times, circuit specification, etc., entered into entry frames on a mark card with a pencile are read by a card reader and a comparator circuit part 12. Those pieces of information are stored temporarily in the RAM of the control circuit part 1 through a multiplexer 14, etc., and then the number of a specified circuit is discriminated to store the set information in corresponding external memories 20.... On the basis of the storage contents, each memory 20... is handled as one circuit and timer operation which corresponds to the set information is performed, mark card by mark card, through the circuit part 1. Therefore, more than one mark cards are used to set many program timers and also to perform corresponding timer operations easily and securely.
JP55118109A 1980-08-27 1980-08-27 Programmable timer Pending JPS5742886A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP55118109A JPS5742886A (en) 1980-08-27 1980-08-27 Programmable timer
PCT/JP1981/000190 WO1982000724A1 (en) 1980-08-27 1981-08-25 Programmable timer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55118109A JPS5742886A (en) 1980-08-27 1980-08-27 Programmable timer

Publications (1)

Publication Number Publication Date
JPS5742886A true JPS5742886A (en) 1982-03-10

Family

ID=14728235

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55118109A Pending JPS5742886A (en) 1980-08-27 1980-08-27 Programmable timer

Country Status (1)

Country Link
JP (1) JPS5742886A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4828131A (en) * 1971-08-13 1973-04-13
JPS5134848B2 (en) * 1972-02-03 1976-09-29

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4828131A (en) * 1971-08-13 1973-04-13
JPS5134848B2 (en) * 1972-02-03 1976-09-29

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