JPS5741737A - Dividing device - Google Patents

Dividing device

Info

Publication number
JPS5741737A
JPS5741737A JP55115532A JP11553280A JPS5741737A JP S5741737 A JPS5741737 A JP S5741737A JP 55115532 A JP55115532 A JP 55115532A JP 11553280 A JP11553280 A JP 11553280A JP S5741737 A JPS5741737 A JP S5741737A
Authority
JP
Japan
Prior art keywords
supplied
register
quotient
output
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55115532A
Other languages
Japanese (ja)
Other versions
JPS6155691B2 (en
Inventor
Hajime Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55115532A priority Critical patent/JPS5741737A/en
Publication of JPS5741737A publication Critical patent/JPS5741737A/en
Publication of JPS6155691B2 publication Critical patent/JPS6155691B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52Multiplying; Dividing
    • G06F7/535Dividing only
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52Multiplying; Dividing

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)

Abstract

PURPOSE:To quickly calculate the quotient without error, by constituting a dividing device with a multiplying means, a rounding means, a partial dividing means and a quotient means respectively. CONSTITUTION:Both a dividend N and the output of a multiplying circuit 3 are supplied to a partial residue register 1; a divisor D and the output of the circuit 3 are supplied to a correcting divisor register 2; and the outputs of the registers 1 and 2 are selectively supplied to the circuit 3. A part of the output of the register 2 is supplied to a reciprocal number table memory 4; the output of a multiplier register 5 is supplied to a partial quotient register 6; and the outputs of the registers 6 and 5 are supplied to a quotient correcting circuit 7 respectively.
JP55115532A 1980-08-22 1980-08-22 Dividing device Granted JPS5741737A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55115532A JPS5741737A (en) 1980-08-22 1980-08-22 Dividing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55115532A JPS5741737A (en) 1980-08-22 1980-08-22 Dividing device

Publications (2)

Publication Number Publication Date
JPS5741737A true JPS5741737A (en) 1982-03-09
JPS6155691B2 JPS6155691B2 (en) 1986-11-28

Family

ID=14664856

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55115532A Granted JPS5741737A (en) 1980-08-22 1980-08-22 Dividing device

Country Status (1)

Country Link
JP (1) JPS5741737A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0149248A2 (en) * 1983-12-30 1985-07-24 Hitachi, Ltd. Method and apparatus for division using interpolation approximation
JPS60164837A (en) * 1984-02-07 1985-08-27 Nec Corp Divider
JP2007257225A (en) * 2006-03-23 2007-10-04 Hitachi Ltd Computing apparatus, and computing method
JP2020160704A (en) * 2019-03-26 2020-10-01 日本電産株式会社 Integer division device and motor control device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0149248A2 (en) * 1983-12-30 1985-07-24 Hitachi, Ltd. Method and apparatus for division using interpolation approximation
JPS60164837A (en) * 1984-02-07 1985-08-27 Nec Corp Divider
EP0154182A2 (en) * 1984-02-07 1985-09-11 Nec Corporation Electronic circuit capable of carrying out a succession of divisions at a high speed without an objectionable error
JPH0368416B2 (en) * 1984-02-07 1991-10-28 Nippon Electric Co
JP2007257225A (en) * 2006-03-23 2007-10-04 Hitachi Ltd Computing apparatus, and computing method
JP2020160704A (en) * 2019-03-26 2020-10-01 日本電産株式会社 Integer division device and motor control device

Also Published As

Publication number Publication date
JPS6155691B2 (en) 1986-11-28

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