JPS5739567A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5739567A
JPS5739567A JP55098580A JP9858080A JPS5739567A JP S5739567 A JPS5739567 A JP S5739567A JP 55098580 A JP55098580 A JP 55098580A JP 9858080 A JP9858080 A JP 9858080A JP S5739567 A JPS5739567 A JP S5739567A
Authority
JP
Japan
Prior art keywords
film
type
base
regions
base region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55098580A
Other languages
Japanese (ja)
Inventor
Kimimaro Yoshikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55098580A priority Critical patent/JPS5739567A/en
Publication of JPS5739567A publication Critical patent/JPS5739567A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0823Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only including vertical bipolar transistors only
    • H01L27/0825Combination of vertical direct transistors of the same conductivity type having different characteristics,(e.g. Darlington transistors)

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

PURPOSE:To form more than two types of vertical transistors of different characteristics in one integrated circuit by covering one hole of an insulating film with a thin film when a base region is formed and then injecting an impurity. CONSTITUTION:An N<+> type buried layer 2 is formed in a P type silicon substrate 1, and N type epitaxial layer 3 is then formed, an oxidized film 8 is further formed, and an insulating region 4 is formed. Then, the film 8 on the part to become the base region is opened, only the base region 5' of a transistor reduced in the base width is covered with a thin oxidized film, and P type impurity is injected to simultaneously form the base regions 5, 5'. Then, oxidized film is formed on the overall surface, then a hole is opened to inject N type impurity, and emitter regions 6, 6' and collector contacting regions 7, 7' are formed.
JP55098580A 1980-07-18 1980-07-18 Manufacture of semiconductor device Pending JPS5739567A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55098580A JPS5739567A (en) 1980-07-18 1980-07-18 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55098580A JPS5739567A (en) 1980-07-18 1980-07-18 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5739567A true JPS5739567A (en) 1982-03-04

Family

ID=14223588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55098580A Pending JPS5739567A (en) 1980-07-18 1980-07-18 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5739567A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL1007898C2 (en) * 1996-12-26 2001-06-07 Sony Corp A method of manufacturing a semiconductor device.

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5169987A (en) * 1974-11-08 1976-06-17 Itt
JPS5338990A (en) * 1976-09-22 1978-04-10 Hitachi Ltd Iil semiconductor device
JPS54113276A (en) * 1978-02-24 1979-09-04 Hitachi Ltd Rpoduction of semiconductor device
JPS54150984A (en) * 1978-05-19 1979-11-27 Hitachi Ltd Semiconductor integrated circuit device and its manufacture

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5169987A (en) * 1974-11-08 1976-06-17 Itt
JPS5338990A (en) * 1976-09-22 1978-04-10 Hitachi Ltd Iil semiconductor device
JPS54113276A (en) * 1978-02-24 1979-09-04 Hitachi Ltd Rpoduction of semiconductor device
JPS54150984A (en) * 1978-05-19 1979-11-27 Hitachi Ltd Semiconductor integrated circuit device and its manufacture

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL1007898C2 (en) * 1996-12-26 2001-06-07 Sony Corp A method of manufacturing a semiconductor device.

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