JPS5739548A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5739548A
JPS5739548A JP55115069A JP11506980A JPS5739548A JP S5739548 A JPS5739548 A JP S5739548A JP 55115069 A JP55115069 A JP 55115069A JP 11506980 A JP11506980 A JP 11506980A JP S5739548 A JPS5739548 A JP S5739548A
Authority
JP
Japan
Prior art keywords
bonding
film
bonding pad
pad
aluminum alloy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55115069A
Other languages
Japanese (ja)
Inventor
Takao Fujizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55115069A priority Critical patent/JPS5739548A/en
Publication of JPS5739548A publication Critical patent/JPS5739548A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05556Shape in side view
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    • H01L2224/05624Aluminium [Al] as principal constituent
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/485Material
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    • H01L2224/48599Principal constituent of the connecting portion of the wire connector being Gold (Au)
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    • H01L2224/48638Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To increase the bonding strength of a bonding pad in a semiconductor device by forming uneven surface on the bonding pad formed via an insulating film on a semiconductor substrate. CONSTITUTION:A CVD SiO2 film 13 is formed via a thermally oxidized film 12 on an Si substrate 11, uneven shape is formed by etching on the surface, aluminum alloy is then deposited to form a bonding pad 14 having uneven shape on the surface, the peripheral edge of the pad 14 is covered with a passivation film 15, e.g., a PSG or the like, and a spherical part 17 formed at the end of a bonding wire 16 made of Au or the like is bonded. Since the surface is readily deformed if the bonding pad of aluminum alloy or the like is used and the oxidized film is damaged to expose the new surface in this manner, the bonding strength to the bonding wire can be sufficiently increased.
JP55115069A 1980-08-21 1980-08-21 Semiconductor device Pending JPS5739548A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55115069A JPS5739548A (en) 1980-08-21 1980-08-21 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55115069A JPS5739548A (en) 1980-08-21 1980-08-21 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5739548A true JPS5739548A (en) 1982-03-04

Family

ID=14653404

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55115069A Pending JPS5739548A (en) 1980-08-21 1980-08-21 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5739548A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6249640A (en) * 1985-08-29 1987-03-04 Mitsubishi Electric Corp Gold electrode structure
US7030496B2 (en) 2003-07-11 2006-04-18 Denso Corporation Semiconductor device having aluminum and metal electrodes and method for manufacturing the same
JP2009131665A (en) * 2009-03-16 2009-06-18 Hitachi Appliances Inc Vacuum cleaner
USRE40819E1 (en) 1995-12-21 2009-07-07 Micron Technology, Inc. Semiconductor device with improved bond pads
EP1132961B1 (en) * 1991-07-24 2011-01-05 Denki Kagaku Kogyo Kabushiki Kaisha Method for producing a circuit substrate having a mounted semiconductor element
US11437290B2 (en) * 2019-05-09 2022-09-06 Ibiden Co., Ltd. Electronic component built-in wiring board and method for manufacturing the same

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6249640A (en) * 1985-08-29 1987-03-04 Mitsubishi Electric Corp Gold electrode structure
JPH0525176B2 (en) * 1985-08-29 1993-04-12 Mitsubishi Electric Corp
EP1132961B1 (en) * 1991-07-24 2011-01-05 Denki Kagaku Kogyo Kabushiki Kaisha Method for producing a circuit substrate having a mounted semiconductor element
USRE40819E1 (en) 1995-12-21 2009-07-07 Micron Technology, Inc. Semiconductor device with improved bond pads
US7030496B2 (en) 2003-07-11 2006-04-18 Denso Corporation Semiconductor device having aluminum and metal electrodes and method for manufacturing the same
JP2009131665A (en) * 2009-03-16 2009-06-18 Hitachi Appliances Inc Vacuum cleaner
US11437290B2 (en) * 2019-05-09 2022-09-06 Ibiden Co., Ltd. Electronic component built-in wiring board and method for manufacturing the same
US11935801B2 (en) 2019-05-09 2024-03-19 Ibiden Co., Ltd. Electronic component built-in wiring board and method for manufacturing the same

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